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Searched refs:DDR_CTL_CONFIG_WMAC_SRAM_SYNC_SET (Results 1 – 1 of 1) sorted by relevance

/u-boot/arch/mips/mach-ath79/qca956x/
A Dddr.c40 #define DDR_CTL_CONFIG_WMAC_SRAM_SYNC_SET(x) \ macro
182 DDR_CTL_CONFIG_WMAC_SRAM_SYNC_SET(0x1) | \

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