| /u-boot/drivers/gpio/ |
| A D | kona_gpio.c | 11 #define GPIO_BASE (void *)GPIO2_BASE_ADDR macro
53 writel(value, GPIO_BASE + off); in gpio_request()
65 writel(value, GPIO_BASE + off); in gpio_free()
74 val = readl(GPIO_BASE + GPIO_CONTROL(gpio)); in gpio_direction_input()
77 writel(val, GPIO_BASE + GPIO_CONTROL(gpio)); in gpio_direction_input()
88 val = readl(GPIO_BASE + GPIO_CONTROL(gpio)); in gpio_direction_output()
94 val = readl(GPIO_BASE + off); in gpio_direction_output()
96 writel(val, GPIO_BASE + off); in gpio_direction_output()
114 val = readl(GPIO_BASE + off); in gpio_get_value()
138 val = readl(GPIO_BASE + off); in gpio_set_value()
[all …]
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| A D | lpc32xx_gpio.c | 306 gpio_priv->regs = (struct gpio_regs *)GPIO_BASE; in lpc32xx_gpio_probe()
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| /u-boot/arch/mips/mach-jz47xx/jz4780/ |
| A D | gpio.c | 11 void __iomem *gpio_regs = (void __iomem *)GPIO_BASE; in jz47xx_gpio_get_value()
20 void __iomem *gpio_regs = (void __iomem *)GPIO_BASE; in jz47xx_gpio_direction_input()
31 void __iomem *gpio_regs = (void __iomem *)GPIO_BASE; in jz47xx_gpio_direction_output()
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| /u-boot/board/imgtec/ci20/ |
| A D | ci20.c | 32 void __iomem *gpio_regs = (void __iomem *)GPIO_BASE; in ci20_mux_mmc()
47 void __iomem *gpio_regs = (void __iomem *)GPIO_BASE; in ci20_mux_eth()
74 void __iomem *gpio_regs = (void __iomem *)GPIO_BASE; in ci20_mux_jtag()
86 void __iomem *gpio_regs = (void __iomem *)GPIO_BASE; in ci20_mux_nand()
110 void __iomem *gpio_regs = (void __iomem *)GPIO_BASE; in ci20_mux_uart()
221 void __iomem *gpio_regs = (void __iomem *)GPIO_BASE; in ci20_revision()
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| /u-boot/drivers/pch/ |
| A D | pch9.c | 11 #define GPIO_BASE 0x48 macro
39 dm_pci_read_config32(dev, GPIO_BASE, &base); in pch9_get_gpio_base()
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| A D | pch7.c | 11 #define GPIO_BASE 0x44 macro
55 dm_pci_read_config32(dev, GPIO_BASE, &base); in pch7_get_gpio_base()
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| /u-boot/arch/arm/cpu/arm920t/ep93xx/ |
| A D | led.c | 17 register struct gpio_regs *gpio = (struct gpio_regs *)GPIO_BASE; in switch_LED_on()
25 register struct gpio_regs *gpio = (struct gpio_regs *)GPIO_BASE; in switch_LED_off()
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| /u-boot/arch/arm/include/asm/arch-lpc32xx/ |
| A D | cpu.h | 28 #define GPIO_BASE 0x40028000 /* GPIO registers base */ macro
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| /u-boot/board/timll/devkit3250/ |
| A D | devkit3250_spl.c | 16 static struct gpio_regs *gpio = (struct gpio_regs *)GPIO_BASE;
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| /u-boot/arch/x86/cpu/ivybridge/ |
| A D | bd82x6x.c | 27 #define GPIO_BASE 0x48 macro
206 dm_pci_read_config32(dev, GPIO_BASE, &base); in bd82x6x_get_gpio_base()
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| A D | lpc.c | 498 dm_pci_write_config32(dev->parent, GPIO_BASE, DEFAULT_GPIOBASE | 1); in bd82x6x_lpc_early_init()
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| /u-boot/arch/arm/mach-s5pc1xx/include/mach/ |
| A D | cpu.h | 93 SAMSUNG_BASE(gpio, GPIO_BASE)
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| /u-boot/arch/x86/include/asm/arch-ivybridge/ |
| A D | pch.h | 72 #define GPIO_BASE 0x48 /* LPC GPIO Base Address Register */ macro
95 #define GPIO_BASE 0x48 /* LPC GPIO Base Address Register */ macro
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| /u-boot/arch/mips/mach-jz47xx/include/mach/ |
| A D | jz4780.h | 23 #define GPIO_BASE 0xb0010000 macro
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| /u-boot/arch/x86/include/asm/arch-broadwell/ |
| A D | pch.h | 13 #define GPIO_BASE 0x48 /* LPC GPIO Base Address Register */ macro
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| /u-boot/arch/sh/include/asm/ |
| A D | cpu_sh7753.h | 193 #define GPIO_BASE ((struct gpio_regs *)0xffec0000) macro
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| A D | cpu_sh7752.h | 193 #define GPIO_BASE ((struct gpio_regs *)0xffec0000) macro
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| /u-boot/arch/x86/cpu/broadwell/ |
| A D | pch.c | 50 dm_pci_write_config32(dev, GPIO_BASE, GPIO_BASE_ADDRESS | 1); in broadwell_pch_early_init()
636 dm_pci_read_config32(dev, GPIO_BASE, gbasep); in broadwell_get_gpio_base()
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| /u-boot/arch/x86/cpu/quark/ |
| A D | Kconfig | 104 config GPIO_BASE config
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| /u-boot/arch/arm/mach-rmobile/include/mach/ |
| A D | r8a7740.h | 18 #define GPIO_BASE 0xE6050000 macro
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| /u-boot/arch/arm/include/asm/arch-ep93xx/ |
| A D | ep93xx.h | 465 #define GPIO_BASE (EP93XX_APB_BASE | GPIO_OFFSET) macro
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