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Searched refs:I2C3_BASE_ADDR (Results 1 – 15 of 15) sorted by relevance

/u-boot/arch/arm/mach-imx/
A Di2c-mxv7.c67 #ifdef I2C3_BASE_ADDR
68 (void *)I2C3_BASE_ADDR,
/u-boot/arch/arm/include/asm/arch-ls102xa/
A Dconfig.h54 #define I2C3_BASE_ADDR (CONFIG_SYS_IMMR + 0x011a0000) macro
/u-boot/drivers/i2c/
A Dmxc_i2c.c350 #if !defined(I2C3_BASE_ADDR)
351 #define I2C3_BASE_ADDR 0 macro
379 { 2, I2C3_BASE_ADDR, I2C_QUIRK_FLAG },
388 { 2, I2C3_BASE_ADDR, 0 },
/u-boot/arch/arm/mach-imx/mx6/
A Dmodule_fuse.c299 case I2C3_BASE_ADDR: in i2c_fused()
/u-boot/arch/arm/include/asm/arch-mx35/
A Dimx-regs.h30 #define I2C3_BASE_ADDR 0x43F84000 macro
/u-boot/arch/arm/cpu/armv8/fsl-layerscape/
A Dsoc.c344 #ifdef I2C3_BASE_ADDR in erratum_a009203()
345 ptr = (u8 __iomem *)(I2C3_BASE_ADDR + I2C_DEBUG_REG); in erratum_a009203()
/u-boot/arch/arm/include/asm/arch-mx5/
A Dimx-regs.h84 #define I2C3_BASE_ADDR (AIPS1_BASE_ADDR + 0x000EC000) macro
/u-boot/arch/arm/include/asm/arch-mx25/
A Dimx-regs.h284 #define I2C3_BASE_ADDR (0x43F84000) macro
/u-boot/arch/arm/include/asm/arch-fsl-layerscape/
A Dimmap_lsch3.h60 #define I2C3_BASE_ADDR (CONFIG_SYS_IMMR + 0x01020000) macro
A Dimmap_lsch2.h78 #define I2C3_BASE_ADDR (CONFIG_SYS_IMMR + 0x011a0000) macro
/u-boot/arch/arm/include/asm/arch-imx8m/
A Dimx-regs.h43 #define I2C3_BASE_ADDR 0x30A40000 macro
/u-boot/arch/arm/include/asm/arch-vf610/
A Dimx-regs.h79 #define I2C3_BASE_ADDR (AIPS0_BASE_ADDR + 0x000E6000) macro
/u-boot/arch/arm/include/asm/arch-mx6/
A Dimx-regs.h265 #define I2C3_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x28000) macro
/u-boot/arch/arm/include/asm/arch-mx31/
A Dimx-regs.h605 #define I2C3_BASE_ADDR 0x43f84000 macro
/u-boot/arch/arm/include/asm/arch-mx7/
A Dimx-regs.h175 #define I2C3_BASE_ADDR (AIPS3_OFF_BASE_ADDR+0x40000) macro

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