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Searched refs:IDE_TIM_PRI (Results 1 – 3 of 3) sorted by relevance

/u-boot/arch/x86/include/asm/
A Dpch_common.h15 #define IDE_TIM_PRI 0x40 /* IDE timings, primary */ macro
/u-boot/arch/x86/cpu/ivybridge/
A Dsata.c63 dm_pci_write_config16(dev, IDE_TIM_PRI, IDE_DECODE_ENABLE | in bd82x6x_sata_init()
113 dm_pci_write_config16(dev, IDE_TIM_PRI, IDE_DECODE_ENABLE | in bd82x6x_sata_init()
142 dm_pci_write_config16(dev, IDE_TIM_PRI, IDE_DECODE_ENABLE | in bd82x6x_sata_init()
/u-boot/arch/x86/cpu/broadwell/
A Dsata.c54 dm_pci_write_config16(dev, IDE_TIM_PRI, IDE_DECODE_ENABLE); in broadwell_sata_init()

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