IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET (reference) in projects: u-boot

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Searched refs:IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET (Results 1 – 14 of 14) sorted by relevance

/u-boot/board/engicam/imx6q/
A D	imx6q.c	`185 IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET); in setup_display()`
/u-boot/board/kosagi/novena/
A D	video.c	`429 IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET) \| in setup_display_clock()`
/u-boot/board/technexion/pico-imx6/
A D	pico-imx6.c	`290 << IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET); in setup_display()`
/u-boot/board/ge/bx50v3/
A D	bx50v3.c	`280 IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET)); in setup_display_bx50v3()`
/u-boot/board/aristainetos/
A D	aristainetos.c	`195 << IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET); in enable_lvds()`
/u-boot/board/ge/b1x5v2/
A D	b1x5v2.c	`309 IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET)); in setup_display()`
/u-boot/arch/arm/include/asm/arch-mx6/
A D	imx-regs.h	`566 #define IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET 6 macro 567 #define IOMUXC_GPR3_LVDS0_MUX_CTL_MASK (3<<IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET)`
/u-boot/board/embest/mx6boards/
A D	mx6boards.c	`503 << IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET); in setup_display()`
/u-boot/board/advantech/dms-ba16/
A D	dms-ba16.c	`436 IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET)); in setup_display()`
/u-boot/board/freescale/mx6sabreauto/
A D	mx6sabreauto.c	`482 IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET) \| in setup_display()`
/u-boot/board/toradex/apalis_imx6/
A D	apalis_imx6.c	`639 <<IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET); in setup_display()`
/u-boot/board/toradex/colibri_imx6/
A D	colibri_imx6.c	`546 <<IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET); in setup_display()`
/u-boot/board/boundary/nitrogen6x/
A D	nitrogen6x.c	`753 <<IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET); in setup_display()`
/u-boot/board/gateworks/gw_ventana/
A D	gw_ventana.c	`503 <<IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET); in setup_display()`

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