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Searched refs:MV_ETH_REGS_BASE (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/arm/mach-mvebu/serdes/axp/
A Dboard_env_spec.h147 #define MV_ETH_REGS_BASE(port) MV_ETH_REGS_OFFSET(port) macro
150 #define SGMII_PWR_PLL_CTRL_REG(port) (MV_ETH_REGS_BASE(port) + 0xE04)
151 #define SGMII_DIG_LP_ENA_REG(port) (MV_ETH_REGS_BASE(port) + 0xE8C)
152 #define SGMII_REF_CLK_SEL_REG(port) (MV_ETH_REGS_BASE(port) + 0xF18)
153 #define SGMII_SERDES_CFG_REG(port) (MV_ETH_REGS_BASE(port) + 0x4A0)
154 #define SGMII_SERDES_STAT_REG(port) (MV_ETH_REGS_BASE(port) + 0x4A4)
155 #define SGMII_COMPHY_CTRL_REG(port) (MV_ETH_REGS_BASE(port) + 0xF20)
156 #define QSGMII_GEN_1_SETTING_REG(port) (MV_ETH_REGS_BASE(port) + 0xE38)
157 #define QSGMII_SERDES_CFG_REG(port) (MV_ETH_REGS_BASE(port) + 0x4a0)
A Dhigh_speed_env_lib.c1145 reg_write(MV_ETH_REGS_BASE in serdes_phy_config()
1149 DEBUG_WR_REG(MV_ETH_REGS_BASE in serdes_phy_config()
1154 reg_write(MV_ETH_REGS_BASE in serdes_phy_config()
1158 DEBUG_WR_REG(MV_ETH_REGS_BASE in serdes_phy_config()

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