Home
last modified time | relevance | path

Searched refs:MV_OK (Results 1 – 25 of 30) sorted by relevance

12

/u-boot/drivers/ddr/marvell/a38x/
A Dddr3_init.c49 if (mv_ddr_early_init2() != MV_OK) in ddr3_init()
54 if (MV_OK != status) in ddr3_init()
68 if (MV_OK != status) { in ddr3_init()
75 if (MV_OK != status) { in ddr3_init()
91 return MV_OK; in ddr3_init()
142 if (MV_OK != status) { in mv_ddr_training_params_set()
147 return MV_OK; in mv_ddr_training_params_set()
A Dddr3_training_bist.c68 return MV_OK; in ddr3_tip_bist_activate()
112 return MV_OK; in ddr3_tip_bist_read_result()
160 return MV_OK; in hws_ddr3_run_bist()
176 return MV_OK; in ddr3_tip_bist_operation()
242 return MV_OK; in mv_ddr_tip_bist()
290 return MV_OK; in interval_init()
302 return MV_OK; in interval_set()
392 return MV_OK; in interval_proc()
420 return MV_OK; in mv_ddr_dm_to_dq_diff_get()
436 return MV_OK; in mv_ddr_bist_tx()
[all …]
A Dmv_ddr_plat.c239 return MV_OK; in ddr3_tip_a38x_get_freq_config()
303 return MV_OK; in mv_ddr_is_odpg_done()
348 return MV_OK; in mv_ddr_is_training_done()
378 return MV_OK; in ddr3_tip_a38x_select_ddr_controller()
480 return MV_OK; in mv_ddr_sar_freq_get()
557 return MV_OK; in ddr3_tip_a38x_get_medium_freq()
565 return MV_OK; in ddr3_tip_a38x_get_device_info()
584 return MV_OK; in is_prfa_done()
607 return MV_OK; in prfa_write()
633 return MV_OK; in prfa_read()
[all …]
A Dddr3_training.c222 return MV_OK; in ddr3_tip_pad_inv()
270 return MV_OK; in ddr3_tip_tune_training_params()
332 return MV_OK; in ddr3_tip_configure_cs()
673 return MV_OK; in hws_ddr3_tip_init_controller()
730 return MV_OK; in ddr3_tip_rev2_rank_control()
763 return MV_OK; in ddr3_tip_rev3_rank_control()
875 return MV_OK; in ddr3_pre_algo_config()
900 return MV_OK; in ddr3_post_algo_config()
947 int ret = MV_OK, ret_tune = MV_OK; in odt_test()
999 return MV_OK; in ddr3_tip_if_write()
[all …]
A Dxor.c162 return MV_OK; in mv_xor_ctrl_set()
219 return MV_OK; in mv_xor_mem_init()
308 return MV_OK; in mv_xor_command_set()
314 return MV_OK; in mv_xor_command_set()
321 return MV_OK; in mv_xor_command_set()
327 return MV_OK; in mv_xor_command_set()
330 return MV_OK; in mv_xor_command_set()
463 return MV_OK; in mv_xor_transfer()
A Dddr3_training_leveling.c309 return MV_OK; in ddr3_tip_dynamic_read_leveling()
350 return MV_OK; in ddr3_tip_legacy_dynamic_write_leveling()
391 return MV_OK; in ddr3_tip_legacy_dynamic_read_leveling()
761 return MV_OK; in ddr3_tip_dynamic_per_bit_read_leveling()
799 return MV_OK; in ddr3_tip_calc_cs_mask()
1166 return MV_OK; in ddr3_tip_dynamic_write_leveling()
1279 return MV_OK; in ddr3_tip_dynamic_write_leveling_supp()
1519 return MV_OK; in ddr3_tip_dynamic_write_leveling_seq()
1557 return MV_OK; in ddr3_tip_dynamic_read_leveling_seq()
1596 return MV_OK; in ddr3_tip_dynamic_per_bit_read_leveling_seq()
[all …]
A Dddr3_training_ip_engine.c565 return MV_OK; in ddr3_tip_ip_training()
619 return MV_OK; in ddr3_tip_load_pattern_to_odpg()
643 return MV_OK; in ddr3_tip_configure_odpg()
686 return MV_OK; in ddr3_tip_process_result()
841 return MV_OK; in ddr3_tip_read_training_result()
871 return MV_OK; in ddr3_tip_load_all_pattern_to_mem()
952 return MV_OK; in ddr3_tip_load_pattern_to_mem()
1056 return MV_OK; in ddr3_tip_ip_training_wrapper_int()
1445 return MV_OK; in ddr3_tip_ip_training_wrapper()
1519 return MV_OK; in ddr3_tip_load_phy_values()
[all …]
A Dmv_ddr_common.c46 return MV_OK; in round_div()
A Dddr3_debug.c163 return MV_OK; in ddr3_tip_reg_dump()
178 return MV_OK; in ddr3_tip_init_config_func()
310 return MV_OK; in print_device_info()
504 return MV_OK; in ddr3_tip_print_log()
656 return MV_OK; in ddr3_tip_print_stability_log()
666 return MV_OK; in ddr3_tip_register_xsb_info()
860 return MV_OK; in ddr3_tip_print_adll()
882 return MV_OK; in print_adll()
898 return MV_OK; in print_ph()
1343 int ret = MV_OK, ret_tmp; in run_xsb_test()
[all …]
A Dddr3_training_centralization.c37 return MV_OK; in ddr3_tip_centralization_rx()
47 return MV_OK; in ddr3_tip_centralization_tx()
513 return MV_OK; in ddr3_tip_special_rx()
690 return MV_OK; in ddr3_tip_special_rx()
715 return MV_OK; in ddr3_tip_print_centralization_result()
A Dddr_ml_wrapper.h86 #define MV_OK (0x00) /* Operation succeeded */ macro
/u-boot/drivers/ddr/marvell/axp/
A Dddr3_hw_training.c206 if (MV_OK != in ddr3_hw_training()
231 if (MV_OK != in ddr3_hw_training()
239 if (MV_OK != in ddr3_hw_training()
483 return MV_OK; in ddr3_hw_training()
683 return MV_OK; in ddr3_load_patterns()
861 return MV_OK; in ddr3_read_training_results()
972 return MV_OK; in ddr3_training_suspend_resume()
1044 return MV_OK; in ddr3_get_min_max_read_sample_delay()
1066 return MV_OK; in ddr3_get_min_max_rl_phase()
1084 return MV_OK; in ddr3_odt_activate()
[all …]
A Dxor.c152 return MV_OK; in mv_xor_ctrl_set()
206 return MV_OK; in mv_xor_mem_init()
317 return MV_OK; in mv_xor_transfer()
407 return MV_OK; in mv_xor_cmd_set()
413 return MV_OK; in mv_xor_cmd_set()
419 return MV_OK; in mv_xor_cmd_set()
425 return MV_OK; in mv_xor_cmd_set()
429 return MV_OK; in mv_xor_cmd_set()
A Dddr3_dqs.c203 return MV_OK; in ddr3_dqs_centralization_rx()
283 return MV_OK; in ddr3_dqs_centralization_tx()
815 return MV_OK; in ddr3_find_adll_limits()
839 return MV_OK; in ddr3_check_window_limits()
876 return MV_OK; in ddr3_check_window_limits()
925 if (MV_OK != in ddr3_center_calc()
934 if (MV_OK != in ddr3_center_calc()
1102 return MV_OK; in ddr3_special_pattern_i_search()
1251 return MV_OK; in ddr3_special_pattern_ii_search()
1322 return MV_OK; in ddr3_set_dqs_centralization_results()
[all …]
A Dddr3_pbs.c393 return MV_OK; in ddr3_pbs_tx()
510 return MV_OK; in ddr3_tx_shift_dqs_adll_step_before_fail()
905 return MV_OK; in ddr3_pbs_rx()
1080 return MV_OK; in ddr3_rx_shift_dqs_to_first_fail()
1240 if (MV_OK != in ddr3_pbs_per_bit()
1365 return MV_OK; in ddr3_pbs_per_bit()
1407 return MV_OK; in ddr3_pbs_per_bit()
1505 return MV_OK; in ddr3_set_pbs_results()
1571 if (MV_OK != in ddr3_load_pbs_patterns()
1581 if (MV_OK != in ddr3_load_pbs_patterns()
[all …]
A Dddr3_sdram.c200 return MV_OK; in ddr3_sdram_compare()
264 return MV_OK; in ddr3_sdram_dm_compare()
422 return MV_OK; in ddr3_sdram_pbs_compare()
481 return MV_OK; in ddr3_sdram_direct_compare()
536 if (mv_xor_transfer(chan, MV_DMA, channel.desc_phys_addr) != MV_OK) in ddr3_dram_sram_burst()
547 return MV_OK; in ddr3_dram_sram_burst()
596 return MV_OK; in ddr3_dram_sram_read()
633 return MV_OK; in ddr3_sdram_dqs_compare()
A Dddr3_write_leveling.c172 return MV_OK; in ddr3_write_leveling_hw()
268 if (MV_OK != ddr3_dram_sram_burst((u32) in ddr3_wl_supplement()
275 if (MV_OK != in ddr3_wl_supplement()
463 return MV_OK; in ddr3_wl_supplement()
617 return MV_OK; in ddr3_write_leveling_hw_reg_dimm()
769 if (MV_OK != in ddr3_write_leveling_sw()
871 return MV_OK; in ddr3_write_leveling_sw()
1010 if (MV_OK != in ddr3_write_leveling_sw_reg_dimm()
1112 return MV_OK; in ddr3_write_leveling_sw_reg_dimm()
1334 return MV_OK; in ddr3_write_leveling_single_cs()
A Dddr3_read_leveling.c164 return MV_OK; in ddr3_read_leveling_hw()
249 if (MV_OK != status) in ddr3_read_leveling_sw()
257 if (MV_OK != status) in ddr3_read_leveling_sw()
328 return MV_OK; in ddr3_read_leveling_sw()
459 if (MV_OK != in ddr3_read_leveling_single_cs_rl_mode()
737 return MV_OK; in ddr3_read_leveling_single_cs_rl_mode()
813 if (MV_OK != in ddr3_read_leveling_single_cs_window_mode()
1212 return MV_OK; in ddr3_read_leveling_single_cs_window_mode()
A Dddr3_spd.c495 return MV_OK; in ddr3_spd_init()
510 return MV_OK; in ddr3_spd_sum_init()
564 return MV_OK; in ddr3_spd_sum_init()
599 if (MV_OK != status)
607 if (MV_OK != status)
628 if (MV_OK != status)
631 if (MV_OK != status)
1238 return MV_OK;
A Dddr3_init.c453 return MV_OK; in ddr3_init_main()
503 if (MV_OK != status) { in ddr3_init_main()
607 if (MV_OK != status) { in ddr3_init_main()
630 if (MV_OK != status) { in ddr3_init_main()
679 return MV_OK; in ddr3_init_main()
/u-boot/arch/arm/mach-mvebu/serdes/a38x/
A Dseq_exec.c41 return MV_OK; in write_op_execute()
67 return MV_OK; in write_op_execute()
81 return MV_OK; in delay_op_execute()
98 return MV_OK; in poll_op_execute()
124 return MV_OK; in poll_op_execute()
168 return MV_OK; in mv_seq_exec()
A Dhigh_speed_env_spec-38x.c39 if (hws_serdes_seq_db_init() != MV_OK) { in hws_serdes_seq_init()
44 return MV_OK; in hws_serdes_seq_init()
115 return MV_OK; in hws_get_ext_base_addr()
A Dhigh_speed_env_spec.c867 return MV_OK; in hws_serdes_topology_verify()
1300 return MV_OK; in hws_serdes_seq_db_init()
1404 return MV_OK; in hws_pre_serdes_init_config()
1448 return MV_OK; in serdes_phy_config()
1462 return MV_OK; in serdes_polarity_config()
1549 return MV_OK; in hws_power_up_serdes_lanes()
1581 return MV_OK; in serdes_pex_usb3_pipe_delay_w_a()
1632 return MV_OK; in hws_serdes_pex_ref_clock_satr_get()
1904 return MV_OK; in serdes_power_up_ctrl()
2002 return MV_OK; in hws_update_serdes_phy_selectors()
[all …]
A Dctrl_pex.c226 return MV_OK; in hws_pex_config()
247 return MV_OK; in pex_local_bus_num_set()
262 return MV_OK; in pex_local_dev_num_set()
/u-boot/arch/arm/mach-mvebu/serdes/axp/
A Dhigh_speed_env_lib.c147 return MV_OK; in board_modules_scan()
249 int status = MV_OK; in serdes_phy_config()
274 return MV_OK; in serdes_phy_config()
290 return MV_OK; in serdes_phy_config()
939 status = MV_OK; in serdes_phy_config()
997 if (status == MV_OK) in serdes_phy_config()
1416 return MV_OK; in serdes_phy_config()
1575 return MV_OK; in pex_local_bus_num_set()
1610 return MV_OK; in pex_local_dev_num_set()

Completed in 69 milliseconds

12