| /u-boot/arch/arm/cpu/arm1136/mx35/ |
| A D | generic.c | 141 fi *= decode_pll(readl(&ccm->mpctl), MXC_HCLK); in get_mcu_main_clk()
186 freq = decode_pll(readl(&ccm->ppctl), MXC_HCLK); in imx_get_uartclk()
244 pll = decode_pll(readl(&ccm->ppctl), MXC_HCLK); in mxc_get_main_clock()
271 decode_pll(readl(&ccm->ppctl), MXC_HCLK)) / (pdf + 1); in mxc_get_peri_clock()
278 decode_pll(readl(&ccm->ppctl), MXC_HCLK)) / in mxc_get_peri_clock()
286 decode_pll(readl(&ccm->ppctl), MXC_HCLK)) / in mxc_get_peri_clock()
293 decode_pll(readl(&ccm->ppctl), MXC_HCLK)) / (pdf + 1); in mxc_get_peri_clock()
301 decode_pll(readl(&ccm->ppctl), MXC_HCLK)) / in mxc_get_peri_clock()
308 decode_pll(readl(&ccm->ppctl), MXC_HCLK)) / (pdf + 1); in mxc_get_peri_clock()
314 decode_pll(readl(&ccm->ppctl), MXC_HCLK)) / (pdf + 1); in mxc_get_peri_clock()
[all …]
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| /u-boot/arch/arm/include/asm/arch-mx25/ |
| A D | clock.h | 13 #define MXC_HCLK CONFIG_MX25_HCLK_FREQ macro
15 #define MXC_HCLK 24000000 macro
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| /u-boot/arch/arm/include/asm/arch-mx35/ |
| A D | clock.h | 11 #define MXC_HCLK CONFIG_MX35_HCLK_FREQ macro
13 #define MXC_HCLK 24000000 macro
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| /u-boot/arch/arm/mach-imx/mx6/ |
| A D | clock.c | 244 return MXC_HCLK; in decode_pll()
263 return MXC_HCLK; in decode_pll()
317 freq = decode_pll(PLL_SYS, MXC_HCLK); in get_mcu_main_clk()
340 freq = MXC_HCLK; in get_periph_clk()
352 freq = decode_pll(PLL_BUS, MXC_HCLK); in get_periph_clk()
391 return MXC_HCLK; /* OSC 24Mhz */ in get_ipg_per_clk()
408 freq = MXC_HCLK; in get_uart_clk()
428 return MXC_HCLK / (cspi_podf + 1); in get_cspi_clk()
497 freq = MXC_HCLK; in get_mmdc_ch0_clk()
622 u32 hck = MXC_HCLK / 1000; in mxs_set_lcdclk()
[all …]
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| /u-boot/arch/arm/include/asm/arch-mx5/ |
| A D | clock.h | 11 #define MXC_HCLK CONFIG_SYS_MX5_HCLK macro
13 #define MXC_HCLK 24000000 macro
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| /u-boot/arch/arm/mach-imx/mx5/ |
| A D | clock.c | 59 {MXC_HCLK, 24 * 16},
246 ret_val = MXC_HCLK; in get_lp_apm()
259 freq = decode_pll(mxc_plls[PLL1_CLOCK], MXC_HCLK); in get_mcu_main_clk()
272 return decode_pll(mxc_plls[PLL2_CLOCK], MXC_HCLK); in get_periph_clk()
276 return decode_pll(mxc_plls[PLL1_CLOCK], MXC_HCLK); in get_periph_clk()
278 return decode_pll(mxc_plls[PLL3_CLOCK], MXC_HCLK); in get_periph_clk()
330 freq = decode_pll(mxc_plls[PLL1_CLOCK], MXC_HCLK); in get_standard_pll_sel_clk()
333 freq = decode_pll(mxc_plls[PLL2_CLOCK], MXC_HCLK); in get_standard_pll_sel_clk()
336 freq = decode_pll(mxc_plls[PLL3_CLOCK], MXC_HCLK); in get_standard_pll_sel_clk()
953 freq = decode_pll(mxc_plls[PLL1_CLOCK], MXC_HCLK); in do_mx5_showclocks()
[all …]
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| /u-boot/arch/arm/mach-imx/mx7/ |
| A D | clock.c | 125 return MXC_HCLK; in decode_pll()
139 return MXC_HCLK; in decode_pll()
154 return MXC_HCLK; in decode_pll()
168 return MXC_HCLK; in decode_pll()
193 freq = decode_pll(PLL_SYS, MXC_HCLK); in mxc_get_pll_sys_derive()
303 freq = decode_pll(PLL_ENET, MXC_HCLK); in mxc_get_pll_enet_derive()
347 freq = decode_pll(PLL_DDR, MXC_HCLK); in mxc_get_pll_ddr_derive()
386 return decode_pll(PLL_CORE, MXC_HCLK); in get_root_src_clk()
423 return decode_pll(PLL_USB, MXC_HCLK); in get_root_src_clk()
897 u32 hck = MXC_HCLK/1000; in mxs_set_lcdclk()
[all …]
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| /u-boot/arch/arm/include/asm/arch-mx6/ |
| A D | clock.h | 13 #define MXC_HCLK CONFIG_SYS_MX6_HCLK macro
15 #define MXC_HCLK 24000000 macro
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| /u-boot/arch/arm/include/asm/arch-mx31/ |
| A D | clock.h | 10 #define MXC_HCLK CONFIG_MX31_HCLK_FREQ macro
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| /u-boot/arch/arm/include/asm/arch-mx7/ |
| A D | clock.h | 15 #define MXC_HCLK CONFIG_SYS_MX7_HCLK macro
17 #define MXC_HCLK 24000000 macro
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| /u-boot/arch/arm/cpu/arm926ejs/mx25/ |
| A D | generic.c | 60 ulong fref = MXC_HCLK; in imx_get_mpllclk()
68 ulong fref = MXC_HCLK; in imx_get_upllclk()
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| /u-boot/arch/arm/mach-imx/ |
| A D | timer.c | 59 return MXC_HCLK >> 3; in gpt_get_clk()
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| /u-boot/board/k+p/kp_imx53/ |
| A D | kp_imx53.c | 78 u32 ref_clk = MXC_HCLK; in setup_clocks()
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| /u-boot/board/ge/mx53ppd/ |
| A D | mx53ppd.c | 102 u32 ref_clk = MXC_HCLK; in clock_1GHz()
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| /u-boot/board/menlo/m53menlo/ |
| A D | m53menlo.c | 183 ret = mxc_set_clock(MXC_HCLK, hclk, MXC_LDB_CLK); in enable_lvds_clock()
454 const u32 ref_clk = MXC_HCLK; in m53_set_clock()
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| /u-boot/board/freescale/mx53loco/ |
| A D | mx53loco.c | 189 u32 ref_clk = MXC_HCLK; in clock_1GHz()
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| /u-boot/arch/arm/cpu/arm1136/mx31/ |
| A D | generic.c | 38 infreq = MXC_HCLK; in mx31_get_mpl_dpdgck_clk()
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| /u-boot/board/beckhoff/mx53cx9020/ |
| A D | mx53cx9020.c | 143 u32 ref_clk = MXC_HCLK; in clock_1GHz()
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| /u-boot/board/inversepath/usbarmory/ |
| A D | usbarmory.c | 374 u32 ref_clk = MXC_HCLK; in set_clock()
|