Searched refs:PLL_POSTDIV1_MASK (Results 1 – 12 of 12) sorted by relevance
| /u-boot/arch/arm/include/asm/arch-rockchip/ |
| A D | cru_rk3036.h | 69 PLL_POSTDIV1_MASK = 7 << PLL_POSTDIV1_SHIFT, enumerator
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| A D | cru_rk3128.h | 76 PLL_POSTDIV1_MASK = 7 << PLL_POSTDIV1_SHIFT, enumerator
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| A D | cru_rk322x.h | 71 PLL_POSTDIV1_MASK = 7 << PLL_POSTDIV1_SHIFT, enumerator
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| A D | cru_px30.h | 120 PLL_POSTDIV1_MASK = 7 << PLL_POSTDIV1_SHIFT, enumerator
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| /u-boot/drivers/clk/rockchip/ |
| A D | clk_rk3036.c | 70 PLL_POSTDIV1_MASK | PLL_FBDIV_MASK, in rkclk_set_pll()
203 postdiv1 = (con & PLL_POSTDIV1_MASK) >> PLL_POSTDIV1_SHIFT; in rkclk_pll_get_rate()
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| A D | clk_rk322x.c | 69 PLL_POSTDIV1_MASK | PLL_FBDIV_MASK, in rkclk_set_pll()
205 postdiv1 = (con & PLL_POSTDIV1_MASK) >> PLL_POSTDIV1_SHIFT; in rkclk_pll_get_rate()
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| A D | clk_rk3128.c | 64 PLL_POSTDIV1_MASK | PLL_FBDIV_MASK, in rkclk_set_pll()
270 postdiv1 = (con & PLL_POSTDIV1_MASK) >> PLL_POSTDIV1_SHIFT; in rkclk_pll_get_rate()
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| A D | clk_rk3328.c | 56 PLL_POSTDIV1_MASK = 0x7 << PLL_POSTDIV1_SHIFT, enumerator
268 PLL_FBDIV_MASK | PLL_POSTDIV1_MASK, in rkclk_set_pll()
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| A D | clk_rk3399.c | 85 PLL_POSTDIV1_MASK = 0x7 << PLL_POSTDIV1_SHIFT, enumerator
353 PLL_POSTDIV2_MASK | PLL_POSTDIV1_MASK | in rkclk_set_pll()
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| A D | clk_px30.c | 242 PLL_POSTDIV1_MASK | PLL_FBDIV_MASK, in rkclk_set_pll()
277 postdiv1 = (con & PLL_POSTDIV1_MASK) >> PLL_POSTDIV1_SHIFT; in rkclk_pll_get_rate()
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| /u-boot/arch/arm/include/asm/arch-rk3308/ |
| A D | cru_rk3308.h | 97 PLL_POSTDIV1_MASK = 7 << PLL_POSTDIV1_SHIFT, enumerator
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| /u-boot/arch/arm/mach-rockchip/rk3036/ |
| A D | sdram_rk3036.c | 340 PLL_POSTDIV1_MASK | PLL_FBDIV_MASK, in rkdclk_init()
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