Home
last modified time | relevance | path

Searched refs:PTR_ALIGN (Results 1 – 7 of 7) sorted by relevance

/u-boot/test/dm/
A Dacpi.c314 ut_asserteq(map_to_sysmem(PTR_ALIGN(buf + 4, 16)), gd->arch.acpi_start); in dm_test_acpi_setup_base_tables()
323 rsdt = PTR_ALIGN((void *)rsdp + sizeof(*rsdp), 16); in dm_test_acpi_setup_base_tables()
329 xsdt = PTR_ALIGN((void *)rsdt + sizeof(*rsdt), 16); in dm_test_acpi_setup_base_tables()
335 end = PTR_ALIGN((void *)xsdt + sizeof(*xsdt), 64); in dm_test_acpi_setup_base_tables()
/u-boot/lib/zstd/
A Dzstd_internal.h226 #define ZSTD_PTR_ALIGN(p) PTR_ALIGN(p, sizeof(size_t))
/u-boot/lib/
A Dof_live.c24 *mem = PTR_ALIGN(*mem, align); in unflatten_dt_alloc()
/u-boot/include/linux/
A Dkernel.h52 #define PTR_ALIGN(p, a) ((typeof(p))ALIGN((unsigned long)(p), (a))) macro
/u-boot/drivers/net/
A Dmvneta.c1037 WARN_ON(rxq->descs != PTR_ALIGN(rxq->descs, ARCH_DMA_MINALIGN)); in mvneta_rxq_init()
1075 WARN_ON(txq->descs != PTR_ALIGN(txq->descs, ARCH_DMA_MINALIGN)); in mvneta_txq_init()
A Dmvpp2.c4054 PTR_ALIGN(aggr_txq->descs, MVPP2_CPU_D_CACHE_LINE_SIZE)); in mvpp2_aggr_txq_init()
4093 PTR_ALIGN(rxq->descs, MVPP2_CPU_D_CACHE_LINE_SIZE)); in mvpp2_rxq_init()
4178 PTR_ALIGN(txq->descs, MVPP2_CPU_D_CACHE_LINE_SIZE)); in mvpp2_txq_init()
/u-boot/drivers/usb/dwc3/
A Dcore.c692 dwc = PTR_ALIGN(mem, DWC3_ALIGN_MASK + 1); in dwc3_uboot_init()

Completed in 50 milliseconds