Home
last modified time | relevance | path

Searched refs:REG_DDR_IO_ADDR (Results 1 – 5 of 5) sorted by relevance

/u-boot/drivers/ddr/marvell/axp/
A Dddr3_dfs.c351 reg = reg_read(REG_DDR_IO_ADDR) & ~(1 << REG_DDR_IO_CLK_RATIO_OFFS); in ddr3_dfs_high_2_low()
352 dfs_reg_write(REG_DDR_IO_ADDR, reg); /* 0x1524 - DDR IO Register */ in ddr3_dfs_high_2_low()
638 reg = reg_read(REG_DDR_IO_ADDR) & ~(1 << REG_DDR_IO_CLK_RATIO_OFFS); in ddr3_dfs_high_2_low()
640 dfs_reg_write(REG_DDR_IO_ADDR, reg); /* 0x1524 - DDR IO Regist */ in ddr3_dfs_high_2_low()
956 reg = reg_read(REG_DDR_IO_ADDR) | in ddr3_dfs_low_2_high()
963 reg = reg_read(REG_DDR_IO_ADDR) & in ddr3_dfs_low_2_high()
966 dfs_reg_write(REG_DDR_IO_ADDR, reg); /* 0x1524 - DDR IO Register */ in ddr3_dfs_low_2_high()
1260 reg = reg_read(REG_DDR_IO_ADDR) | in ddr3_dfs_low_2_high()
1264 reg = reg_read(REG_DDR_IO_ADDR) & in ddr3_dfs_low_2_high()
1267 dfs_reg_write(REG_DDR_IO_ADDR, reg); /* 0x1524 - DDR IO Register */ in ddr3_dfs_low_2_high()
A Dddr3_axp.h184 #define REG_DDR_IO_ADDR 0x1524 macro
A Dddr3_spd.c690 if (reg_read(REG_DDR_IO_ADDR) & (1 << REG_DDR_IO_CLK_RATIO_OFFS))
963 if (reg_read(REG_DDR_IO_ADDR) & (1 << REG_DDR_IO_CLK_RATIO_OFFS))
1083 if (reg_read(REG_DDR_IO_ADDR) & (1 << REG_DDR_IO_CLK_RATIO_OFFS))
A Dddr3_init.c536 if ((ddr_width == 64) && (reg_read(REG_DDR_IO_ADDR) & in ddr3_init_main()
A Dddr3_hw_training.c172 if (reg_read(REG_DDR_IO_ADDR) & (1 << REG_DDR_IO_CLK_RATIO_OFFS)) in ddr3_hw_training()

Completed in 13 milliseconds