Home
last modified time | relevance | path

Searched refs:REG_DRAM_TRAINING_1_TRNBPOINT_OFFS (Results 1 – 5 of 5) sorted by relevance

/u-boot/drivers/ddr/marvell/axp/
A Dddr3_axp.h229 #define REG_DRAM_TRAINING_1_TRNBPOINT_OFFS 16 macro
A Dddr3_dqs.c200 (1 << REG_DRAM_TRAINING_1_TRNBPOINT_OFFS); in ddr3_dqs_centralization_rx()
280 (1 << REG_DRAM_TRAINING_1_TRNBPOINT_OFFS); in ddr3_dqs_centralization_tx()
A Dddr3_pbs.c388 (1 << REG_DRAM_TRAINING_1_TRNBPOINT_OFFS); in ddr3_pbs_tx()
900 (1 << REG_DRAM_TRAINING_1_TRNBPOINT_OFFS); in ddr3_pbs_rx()
A Dddr3_hw_training.c651 (1 << REG_DRAM_TRAINING_1_TRNBPOINT_OFFS); in ddr3_load_patterns()
A Dddr3_write_leveling.c458 (1 << REG_DRAM_TRAINING_1_TRNBPOINT_OFFS); in ddr3_wl_supplement()

Completed in 16 milliseconds