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Searched refs:REG_READ_DATA_SAMPLE_DELAYS_OFFS (Results 1 – 4 of 4) sorted by relevance

/u-boot/drivers/ddr/marvell/axp/
A Dddr3_read_leveling.c222 (REG_READ_DATA_SAMPLE_DELAYS_OFFS * cs)); in ddr3_read_leveling_sw()
224 (REG_READ_DATA_SAMPLE_DELAYS_OFFS * cs)); in ddr3_read_leveling_sw()
619 << (REG_READ_DATA_SAMPLE_DELAYS_OFFS in ddr3_read_leveling_single_cs_rl_mode()
622 (REG_READ_DATA_SAMPLE_DELAYS_OFFS * in ddr3_read_leveling_single_cs_rl_mode()
1024 (REG_READ_DATA_SAMPLE_DELAYS_OFFS in ddr3_read_leveling_single_cs_window_mode()
1027 (REG_READ_DATA_SAMPLE_DELAYS_OFFS * in ddr3_read_leveling_single_cs_window_mode()
A Dddr3_dfs.c710 (REG_READ_DATA_SAMPLE_DELAYS_OFFS * cs)); in ddr3_dfs_high_2_low()
711 reg |= (5 << (REG_READ_DATA_SAMPLE_DELAYS_OFFS * cs)); in ddr3_dfs_high_2_low()
1510 (REG_READ_DATA_SAMPLE_DELAYS_OFFS * cs)); in ddr3_dfs_low_2_high()
1512 (REG_READ_DATA_SAMPLE_DELAYS_OFFS * cs)); in ddr3_dfs_low_2_high()
1520 (REG_READ_DATA_SAMPLE_DELAYS_OFFS * cs)); in ddr3_dfs_low_2_high()
A Dddr3_axp.h200 #define REG_READ_DATA_SAMPLE_DELAYS_OFFS 8 macro
A Dddr3_spd.c1038 reg |= (cl << (REG_READ_DATA_SAMPLE_DELAYS_OFFS * cs));

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