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Searched refs:SZ_8K (Results 1 – 24 of 24) sorted by relevance

/u-boot/drivers/mtd/nand/raw/
A Dnand_ids.c33 LEGACY_ID_NAND("NAND 4MiB 3,3V 8-bit", 0xd5, 4, SZ_8K, SP_OPTIONS),
35 LEGACY_ID_NAND("NAND 8MiB 3,3V 8-bit", 0xe6, 8, SZ_8K, SP_OPTIONS),
57 SZ_8K, SZ_4K, SZ_1M, 0, 8, 640, NAND_ECC_INFO(40, SZ_1K) },
60 SZ_8K, SZ_8K, SZ_2M, 0, 8, 640, NAND_ECC_INFO(40, SZ_1K) },
63 SZ_16K, SZ_8K, SZ_4M, 0, 6, 1280, NAND_ECC_INFO(40, SZ_1K) },
66 SZ_8K, SZ_4K, SZ_2M, NAND_NEED_SCRAMBLING, 6, 640,
70 SZ_8K, SZ_8K, SZ_2M, NAND_NEED_SCRAMBLING, 6, 640,
74 SZ_16K, SZ_8K, SZ_4M, NAND_NEED_SCRAMBLING, 6, 1664,
77 LEGACY_ID_NAND("NAND 4MiB 5V 8-bit", 0x6B, 4, SZ_8K, SP_OPTIONS),
78 LEGACY_ID_NAND("NAND 4MiB 3,3V 8-bit", 0xE3, 4, SZ_8K, SP_OPTIONS),
[all …]
A Dcortina_nand.c532 } else if (mtd->writesize == SZ_8K) { in set_bus_width_page_size()
/u-boot/include/configs/
A Dbmips_bcm3380.h22 #define CONFIG_SYS_INIT_SP_OFFSET SZ_8K
A Dbmips_bcm6838.h22 #define CONFIG_SYS_INIT_SP_OFFSET SZ_8K
A Dbmips_bcm6338.h22 #define CONFIG_SYS_INIT_SP_OFFSET SZ_8K
A Dbmips_bcm6318.h31 #define CONFIG_SYS_INIT_SP_OFFSET SZ_8K
A Dbmips_bcm63268.h31 #define CONFIG_SYS_INIT_SP_OFFSET SZ_8K
A Dbmips_bcm6328.h31 #define CONFIG_SYS_INIT_SP_OFFSET SZ_8K
A Dbmips_bcm6362.h31 #define CONFIG_SYS_INIT_SP_OFFSET SZ_8K
A Dbmips_bcm6348.h29 #define CONFIG_SYS_INIT_SP_OFFSET SZ_8K
A Dbmips_bcm6358.h31 #define CONFIG_SYS_INIT_SP_OFFSET SZ_8K
A Dbmips_bcm6368.h31 #define CONFIG_SYS_INIT_SP_OFFSET SZ_8K
A Dimx8mn_evk.h25 #define CONFIG_SPL_BSS_MAX_SIZE SZ_8K /* 8 KB */
A Dimx8mm_beacon.h22 #define CONFIG_SPL_BSS_MAX_SIZE SZ_8K /* 8 KB */
A Dimx8mn_beacon.h23 #define CONFIG_SPL_BSS_MAX_SIZE SZ_8K
A Dphycore_imx8mm.h25 #define CONFIG_SPL_BSS_MAX_SIZE SZ_8K
A Dimx8mm_evk.h24 #define CONFIG_SPL_BSS_MAX_SIZE SZ_8K /* 8 KB */
A Dimx8mm_venice.h22 #define CONFIG_SPL_BSS_MAX_SIZE SZ_8K /* 8 KB */
A Dverdin-imx8mm.h22 #define CONFIG_SPL_BSS_MAX_SIZE SZ_8K /* 8 KB */
/u-boot/include/linux/
A Dsizes.h27 #define SZ_8K 0x00002000 macro
/u-boot/arch/arm/mach-uniphier/
A Dbase-address.c58 sg_base = ioremap(base, SZ_8K); in uniphier_base_address_init()
/u-boot/drivers/pci/
A Dpcie_layerscape.h99 #define PCIE_BAR1_SIZE SZ_8K
A Dpcie_layerscape_rc.c319 if (cfg_size < SZ_8K) { in ls_pcie_probe()
321 PCIE_SRDS_PRTCL(pcie->idx), dev->name, (u64)cfg_size, SZ_8K); in ls_pcie_probe()
/u-boot/arch/arm/mach-stm32mp/cmd_stm32prog/
A Dstm32prog.c880 const int buflen = SZ_8K; in create_gpt_partitions()

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