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Searched refs:additive_latency (Results 1 – 7 of 7) sorted by relevance

/u-boot/drivers/ddr/fsl/
A Dlc_common_dimm_params.c259 unsigned int additive_latency = 0; in compute_lowest_common_dimm_parameters() local
524 additive_latency = 0; in compute_lowest_common_dimm_parameters()
530 additive_latency = picos_to_mclk(ctrl_num, trcd_ps) - in compute_lowest_common_dimm_parameters()
532 if (mclk_to_picos(ctrl_num, additive_latency) > trcd_ps) { in compute_lowest_common_dimm_parameters()
533 additive_latency = picos_to_mclk(ctrl_num, trcd_ps); in compute_lowest_common_dimm_parameters()
535 " greater than tRCD_ps\n", additive_latency); in compute_lowest_common_dimm_parameters()
545 if (mclk_to_picos(ctrl_num, additive_latency) > trcd_ps) { in compute_lowest_common_dimm_parameters()
563 outpdimm->additive_latency = additive_latency; in compute_lowest_common_dimm_parameters()
A Dctrl_regs.c460 unsigned int additive_latency) in set_timing_cfg_3() argument
483 ext_add_lat = additive_latency >> 4; in set_timing_cfg_3()
640 unsigned int additive_latency) in set_timing_cfg_2() argument
661 add_lat_mclk = additive_latency; in set_timing_cfg_2()
1354 unsigned int additive_latency, in set_ddr_sdram_mode() argument
1525 unsigned int additive_latency, in set_ddr_sdram_mode() argument
1763 al = additive_latency; in set_ddr_sdram_mode()
2359 unsigned int additive_latency; in compute_fsl_memctl_config_regs() local
2385 : common_dimm->additive_latency; in compute_fsl_memctl_config_regs()
2526 additive_latency); in compute_fsl_memctl_config_regs()
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A Dinteractive.c197 COMMON_TIMING(additive_latency), in lowest_common_dimm_parameters_edit()
471 COMMON_TIMING(additive_latency), in print_lowest_common_dimm_parameters()
/u-boot/include/
A Dcommon_timing_params.h55 unsigned int additive_latency; member
/u-boot/drivers/ram/
A Dmpc83xx_sdram.c339 u32 additive_latency, mcas_to_preamble_override, write_latency, in mpc83xx_sdram_probe() local
697 additive_latency = dev_read_u32_default(dev, "additive_latency", 0); in mpc83xx_sdram_probe()
698 if (additive_latency > 5) { in mpc83xx_sdram_probe()
700 dev->name, additive_latency); in mpc83xx_sdram_probe()
781 timing_cfg_2 = additive_latency << TIMING_CFG2_ADD_LAT_SHIFT | in mpc83xx_sdram_probe()
/u-boot/doc/device-tree-bindings/ram/
A Dfsl,mpc83xx-mem-controller.txt105 - additive_latency: Additive latency; possible values:
280 additive_latency = <0>;
/u-boot/arch/powerpc/dts/gdsys/
A Dmpc8308.dtsi116 additive_latency = <0>;

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