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Searched refs:ccr (Results 1 – 25 of 54) sorted by relevance

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/u-boot/drivers/rtc/
A Dm48t35ax.c30 ccr = rtc_read(0); in rtc_get()
31 ccr = ccr | 0x40; in rtc_get()
32 rtc_write(0, ccr); in rtc_get()
43 ccr = rtc_read(0); in rtc_get()
44 ccr = ccr & 0xBF; in rtc_get()
45 rtc_write(0, ccr); in rtc_get()
79 ccr = rtc_read(0); in rtc_set()
80 ccr = ccr | 0x80; in rtc_set()
81 rtc_write(0, ccr); in rtc_set()
95 ccr = rtc_read(0); in rtc_set()
[all …]
/u-boot/arch/sh/cpu/sh4/
A Dcache.c41 unsigned long ccr; in cache_control() local
44 ccr = inl(CCR); in cache_control()
46 if (ccr & CCR_CACHE_ENABLE) in cache_control()
/u-boot/arch/arm/cpu/armv7m/
A Dcache.c214 setbits_le32(&V7M_SCB->ccr, BIT(V7M_CCR_DCACHE)); in dcache_enable()
232 clrbits_le32(&V7M_SCB->ccr, BIT(V7M_CCR_DCACHE)); in dcache_disable()
241 return (readl(&V7M_SCB->ccr) & BIT(V7M_CCR_DCACHE)) != 0; in dcache_status()
322 setbits_le32(&V7M_SCB->ccr, BIT(V7M_CCR_ICACHE)); in icache_enable()
331 return (readl(&V7M_SCB->ccr) & BIT(V7M_CCR_ICACHE)) != 0; in icache_status()
340 clrbits_le32(&V7M_SCB->ccr, BIT(V7M_CCR_ICACHE)); in icache_disable()
/u-boot/drivers/spi/
A Dstm32_qspi.c33 u32 ccr; /* 0x14 */ member
249 u32 cr, ccr, addr_max; in stm32_qspi_exec_op() local
274 ccr = (mode << STM32_QSPI_CCR_FMODE_SHIFT); in stm32_qspi_exec_op()
275 ccr |= op->cmd.opcode; in stm32_qspi_exec_op()
276 ccr |= (_stm32_qspi_get_mode(op->cmd.buswidth) in stm32_qspi_exec_op()
280 ccr |= ((op->addr.nbytes - 1) << STM32_QSPI_CCR_ADSIZE_SHIFT); in stm32_qspi_exec_op()
281 ccr |= (_stm32_qspi_get_mode(op->addr.buswidth) in stm32_qspi_exec_op()
286 ccr |= (op->dummy.nbytes * 8 / op->dummy.buswidth in stm32_qspi_exec_op()
290 ccr |= (_stm32_qspi_get_mode(op->data.buswidth) in stm32_qspi_exec_op()
293 writel(ccr, &priv->regs->ccr); in stm32_qspi_exec_op()
/u-boot/arch/m68k/cpu/mcf5445x/
A Dspeed.c78 bootmod_ccr = (in_be16(&ccm->ccr) & CCM_CCR_BOOTMOD) >> 14; in setup_5441x_clocks()
150 if (((in_be16(&ccm->ccr) & CCM_CCR_360_FBCONFIG_MASK) == 0x00e0) || in setup_5445x_clocks()
151 ((in_be16(&ccm->ccr) & CCM_CCR_360_FBCONFIG_MASK) == 0x0060)) { in setup_5445x_clocks()
172 fbtemp = pPllmult[ccm->ccr & fbpll_mask]; in setup_5445x_clocks()
230 pcrvalue |= pPllmult[in_be16(&ccm->ccr) & fbpll_mask] << 24; in setup_5445x_clocks()
241 if ((in_be16(&ccm->ccr) & CCM_MISCCR_LIMP) == CCM_MISCCR_LIMP) { in setup_5445x_clocks()
/u-boot/arch/arm/mach-sunxi/
A Ddram_sun4i.c117 clrsetbits_le32(&dram->ccr, DRAM_CCR_INIT, DRAM_CCR_ITM_OFF); in mctl_itm_disable()
124 clrbits_le32(&dram->ccr, DRAM_CCR_ITM_OFF); in mctl_itm_enable()
393 setbits_le32(&dram->ccr, DRAM_CCR_DATA_TRAINING); in dramc_scan_readpipe()
396 await_bits_clear(&dram->ccr, DRAM_CCR_DATA_TRAINING); in dramc_scan_readpipe()
505 setbits_le32(&dram->ccr, DRAM_CCR_INIT); in mctl_ddr3_initialize()
506 await_bits_clear(&dram->ccr, DRAM_CCR_INIT); in mctl_ddr3_initialize()
632 await_bits_clear(&dram->ccr, DRAM_CCR_INIT); in dramc_init_helper()
657 clrsetbits_le32(&dram->ccr, DRAM_CCR_DQS_DRIFT_COMP, DRAM_CCR_DQS_GATE); in dramc_init_helper()
662 setbits_le32(&dram->ccr, DRAM_CCR_COMMAND_RATE_1T); in dramc_init_helper()
682 clrbits_le32(&dram->ccr, DRAM_CCR_DQS_GATE); in dramc_init_helper()
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A Ddram_sun6i.c178 clrbits_le32(&mctl_com->ccr, MCTL_CCR_CH1_CLK_EN); in mctl_channel_init()
353 setbits_le32(&mctl_com->ccr, MCTL_CCR_CH0_CLK_EN); in sunxi_dram_init()
357 setbits_le32(&mctl_com->ccr, MCTL_CCR_CH1_CLK_EN); in sunxi_dram_init()
360 setbits_le32(&mctl_com->ccr, MCTL_CCR_MASTER_CLK_EN); in sunxi_dram_init()
A Ddram_sun9i.c302 setbits_le32(&mctl_com->ccr, (1 << 14) | (1 << 30)); in mctl_sys_init()
332 clrbits_le32(&mctl_com->ccr, MCTL_CCR_CH0_CLK_EN | MCTL_CCR_CH1_CLK_EN); in mctl_sys_init()
335 setbits_le32(&mctl_com->ccr, MCTL_CCR_CH0_CLK_EN); in mctl_sys_init()
337 setbits_le32(&mctl_com->ccr, MCTL_CCR_CH1_CLK_EN); in mctl_sys_init()
A Drsb.c55 writel((cd_odly << 8) | div, &rsb->ccr); in rsb_set_clk()
/u-boot/arch/arm/mach-at91/arm920t/
A Dtimer.c42 writel(AT91_TC_CCR_CLKDIS, &tc->tc[0].ccr); in timer_init()
50 writel(AT91_TC_CCR_SWTRG | AT91_TC_CCR_CLKEN, &tc->tc[0].ccr); in timer_init()
/u-boot/board/ronetix/pm9g45/
A Dpm9g45.c45 csa = readl(&matrix->ccr[6]) | AT91_MATRIX_CSA_EBI_CS3A; in pm9g45_nand_hw_init()
46 writel(csa, &matrix->ccr[6]); in pm9g45_nand_hw_init()
/u-boot/arch/powerpc/lib/
A Dkgdb.c174 *ptr++ = regs->ccr; in kgdb_getregs()
207 case 66: regs->ccr = *ptr; break; in kgdb_putreg()
244 regs->ccr = *ptr++; in kgdb_putregs()
/u-boot/arch/arm/mach-at91/include/mach/
A Dat91_tc.h10 u32 ccr; /* 0x00 Channel Control Register */ member
/u-boot/arch/arm/include/asm/arch-sunxi/
A Drsb.h18 u32 ccr; /* 0x04 */ member
/u-boot/drivers/watchdog/
A Dcdns_wdt.c21 u32 ccr; /* Counter Control Register offset - 0x4 */ member
177 cdns_wdt_writereg(&priv->regs->ccr, data); in cdns_wdt_start()
/u-boot/arch/arm/include/asm/arch-lpc32xx/
A Dtimer.h20 u32 ccr; /* Capture Control Register */ member
/u-boot/arch/arm/include/asm/
A Darmv7m.h32 uint32_t ccr; /* offset 0x14: Config and Control Register */ member
/u-boot/arch/powerpc/include/asm/
A Dptrace.h34 PPC_REG ccr; member
/u-boot/drivers/mmc/
A Dftsdc010_mci.c148 writel(FTSDC010_CCR_CLK_DIV(div), &regs->ccr); in ftsdc010_clkset()
151 setbits_le32(&regs->ccr, FTSDC010_CCR_CLK_SD); in ftsdc010_clkset()
154 setbits_le32(&regs->ccr, FTSDC010_CCR_CLK_HISPD); in ftsdc010_clkset()
156 clrbits_le32(&regs->ccr, FTSDC010_CCR_CLK_HISPD); in ftsdc010_clkset()
/u-boot/arch/nds32/lib/
A Dasm-offsets.c60 OFFSET(DWCDDR21MCTL_CCR, dwcddr21mctl, ccr); /* 0x04 */ in main()
/u-boot/arch/m68k/cpu/mcf5227x/
A Dspeed.c109 if ((in_be16(&ccm->ccr) & CCM_MISCCR_LIMP) == CCM_MISCCR_LIMP) { in get_clocks()
/u-boot/arch/m68k/include/asm/coldfire/
A Dssi.h22 u32 ccr; member
/u-boot/board/dhelectronics/dh_stm32mp1/
A Dboard.c126 u32 reg, ccr; in setup_mac_address() local
132 ccr = readw(reg); in setup_mac_address()
133 if (ccr & KS_CCR_EEPROM) { in setup_mac_address()
/u-boot/include/faraday/
A Dftsdc010.h31 unsigned int ccr; /* 0x38 - clock contorl reg */ member
/u-boot/arch/arm/include/asm/arch-armada100/
A Dcpu.h43 u32 ccr; /* 0x004 */ member

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