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Searched refs:cm_coreaon_usb_phy1_core_clkctrl (Results 1 – 5 of 5) sorted by relevance

/u-boot/arch/arm/mach-omap2/omap4/
A Dprcm-regs.c131 .cm_coreaon_usb_phy1_core_clkctrl = 0x4a008640,
A Dhw_data.c385 setbits_le32((*prcm)->cm_coreaon_usb_phy1_core_clkctrl, in enable_basic_clocks()
/u-boot/arch/arm/mach-omap2/omap5/
A Dhw_data.c567 setbits_le32((*prcm)->cm_coreaon_usb_phy1_core_clkctrl, in enable_usb_clocks()
622 clrbits_le32((*prcm)->cm_coreaon_usb_phy1_core_clkctrl, in disable_usb_clocks()
A Dprcm-regs.c591 .cm_coreaon_usb_phy1_core_clkctrl = 0x4A008640,
820 .cm_coreaon_usb_phy1_core_clkctrl = 0x4a008640,
/u-boot/arch/arm/include/asm/
A Domap_common.h147 u32 cm_coreaon_usb_phy1_core_clkctrl; member

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