Searched refs:ddr_sdram_cfg_2 (Results 1 – 14 of 14) sorted by relevance
| /u-boot/board/freescale/corenet_ds/ |
| A D | p4080ds_ddr.c | 92 .ddr_sdram_cfg_2 = CONFIG_SYS_DDR_SDRAM_CFG2,
124 .ddr_sdram_cfg_2 = CONFIG_SYS_DDR_SDRAM_CFG2,
156 .ddr_sdram_cfg_2 = CONFIG_SYS_DDR_SDRAM_CFG2,
188 .ddr_sdram_cfg_2 = CONFIG_SYS_DDR_SDRAM_CFG2,
220 .ddr_sdram_cfg_2 = CONFIG_SYS_DDR_SDRAM_CFG2,
252 .ddr_sdram_cfg_2 = CONFIG_SYS_DDR_SDRAM_CFG2,
284 .ddr_sdram_cfg_2 = CONFIG_SYS_DDR_SDRAM_CFG2,
316 .ddr_sdram_cfg_2 = CONFIG_SYS_DDR_SDRAM_CFG2,
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| /u-boot/drivers/ddr/fsl/ |
| A D | mpc85xx_ddr_gen3.c | 164 regs->ddr_sdram_cfg_2 & ~SDRAM_CFG2_D_INIT); in fsl_ddr_set_memctl_regs()
174 out_be32(&ddr->sdram_cfg_2, regs->ddr_sdram_cfg_2); in fsl_ddr_set_memctl_regs()
218 out_be32(&ddr->sdram_cfg_2, regs->ddr_sdram_cfg_2 & 0xffffffeb); in fsl_ddr_set_memctl_regs()
343 out_be32(&ddr->sdram_cfg_2, regs->ddr_sdram_cfg_2); in fsl_ddr_set_memctl_regs()
539 regs->ddr_sdram_cfg_2 & SDRAM_CFG2_ODT_CFG_MASK); in fsl_ddr_set_memctl_regs()
557 regs->ddr_sdram_cfg_2 & SDRAM_CFG2_D_INIT); in fsl_ddr_set_memctl_regs()
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| A D | fsl_ddr_gen4.c | 230 regs->ddr_sdram_cfg_2 & ~SDRAM_CFG2_D_INIT); in fsl_ddr_set_memctl_regs()
240 ddr_out32(&ddr->sdram_cfg_2, regs->ddr_sdram_cfg_2); in fsl_ddr_set_memctl_regs()
248 if (regs->ddr_sdram_cfg_2 & SDRAM_CFG2_AP_EN) { in fsl_ddr_set_memctl_regs()
294 regs->ddr_sdram_cfg_2 & ~SDRAM_CFG2_D_INIT); in fsl_ddr_set_memctl_regs()
426 if (regs->ddr_sdram_cfg_2 & SDRAM_CFG2_AP_EN) { in fsl_ddr_set_memctl_regs()
446 ddr_out32(&ddr->sdram_cfg_2, regs->ddr_sdram_cfg_2); in fsl_ddr_set_memctl_regs()
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| A D | mpc86xx_ddr.c | 57 out_be32(&ddr->sdram_cfg_2, regs->ddr_sdram_cfg_2); in fsl_ddr_set_memctl_regs()
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| A D | arm_ddr_gen3.c | 132 regs->ddr_sdram_cfg_2 & ~SDRAM_CFG2_D_INIT); in fsl_ddr_set_memctl_regs()
142 ddr_out32(&ddr->sdram_cfg_2, regs->ddr_sdram_cfg_2); in fsl_ddr_set_memctl_regs()
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| A D | mpc85xx_ddr_gen2.c | 71 out_be32(&ddr->sdram_cfg_2, regs->ddr_sdram_cfg_2); in fsl_ddr_set_memctl_regs()
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| A D | ctrl_regs.c | 952 ddr->ddr_sdram_cfg_2 = (0 in set_ddr_sdram_cfg_2()
971 debug("FSLDDR: ddr_sdram_cfg_2 = 0x%08x\n", ddr->ddr_sdram_cfg_2); in set_ddr_sdram_cfg_2()
1190 if ((ddr->ddr_sdram_cfg_2 & SDRAM_CFG2_AP_EN) && in set_ddr_sdram_mode_9()
1225 if ((ddr->ddr_sdram_cfg_2 & SDRAM_CFG2_AP_EN) && in set_ddr_sdram_mode_9()
2010 if (ddr->ddr_sdram_cfg_2 & SDRAM_CFG2_AP_EN && in set_timing_cfg_7()
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| A D | interactive.c | 637 CFG_REGS(ddr_sdram_cfg_2), in print_fsl_memctl_config_regs()
728 CFG_REGS(ddr_sdram_cfg_2), in fsl_ddr_regs_edit()
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| /u-boot/board/kontron/sl28/ |
| A D | ddr.c | 32 .ddr_sdram_cfg_2 = 0x24401111,
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| /u-boot/board/freescale/p1010rdb/ |
| A D | ddr.c | 31 .ddr_sdram_cfg_2 = CONFIG_SYS_DDR_CONTROL_2,
58 .ddr_sdram_cfg_2 = CONFIG_SYS_DDR_CONTROL_2,
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| /u-boot/board/freescale/ls1043ardb/ |
| A D | ddr.h | 64 .ddr_sdram_cfg_2 = 0x00401100,
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| /u-boot/board/Arcturus/ucp1020/ |
| A D | ddr.c | 96 .ddr_sdram_cfg_2 = CONFIG_SYS_DDR_CONTROL_2, in fixed_sdram()
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| /u-boot/board/freescale/p1_p2_rdb_pc/ |
| A D | ddr.c | 225 .ddr_sdram_cfg_2 = CONFIG_SYS_DDR_CONTROL_2, in fixed_sdram()
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| /u-boot/include/ |
| A D | fsl_ddr_sdram.h | 253 unsigned int ddr_sdram_cfg_2; member
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