Searched refs:ddr_sr_cntr (Results 1 – 11 of 11) sorted by relevance
| /u-boot/board/freescale/p1010rdb/ |
| A D | ddr.c | 44 .ddr_sr_cntr = CONFIG_SYS_DDR_SR_CNTR,
71 .ddr_sr_cntr = CONFIG_SYS_DDR_SR_CNTR,
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| /u-boot/board/freescale/ls1043ardb/ |
| A D | ddr.h | 97 .ddr_sr_cntr = 0,
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| /u-boot/drivers/ddr/fsl/ |
| A D | arm_ddr_gen3.c | 125 ddr_out32(&ddr->ddr_sr_cntr, regs->ddr_sr_cntr); in fsl_ddr_set_memctl_regs()
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| A D | mpc85xx_ddr_gen3.c | 157 out_be32(&ddr->ddr_sr_cntr, regs->ddr_sr_cntr); in fsl_ddr_set_memctl_regs()
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| A D | fsl_ddr_gen4.c | 220 ddr_out32(&ddr->ddr_sr_cntr, regs->ddr_sr_cntr); in fsl_ddr_set_memctl_regs()
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| A D | interactive.c | 674 CFG_REGS(ddr_sr_cntr), in print_fsl_memctl_config_regs()
765 CFG_REGS(ddr_sr_cntr), in fsl_ddr_regs_edit()
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| A D | ctrl_regs.c | 2306 ddr->ddr_sr_cntr = (sr_it & 0xF) << 16; in set_ddr_sr_cntr()
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| /u-boot/board/Arcturus/ucp1020/ |
| A D | ddr.c | 109 .ddr_sr_cntr = CONFIG_SYS_DDR_SR_CNTR, in fixed_sdram()
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| /u-boot/board/freescale/p1_p2_rdb_pc/ |
| A D | ddr.c | 238 .ddr_sr_cntr = CONFIG_SYS_DDR_SR_CNTR, in fixed_sdram()
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| /u-boot/include/ |
| A D | fsl_immap.h | 57 u32 ddr_sr_cntr; /* self refresh counter */ member
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| A D | fsl_ddr_sdram.h | 287 unsigned int ddr_sr_cntr; member
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