Searched refs:ddrphy_trained_csr (Results 1 – 19 of 19) sorted by relevance
| /u-boot/drivers/ddr/imx/imx8m/ |
| A D | ddrphy_csr.c | 10 struct dram_cfg_param ddrphy_trained_csr[] = { variable
732 uint32_t ddrphy_trained_csr_num = ARRAY_SIZE(ddrphy_trained_csr);
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| A D | helper.c | 168 saved_timing->ddrphy_trained_csr = cfg; in dram_config_save()
170 cfg->reg = ddrphy_trained_csr[i].reg; in dram_config_save()
171 cfg->val = ddrphy_trained_csr[i].val; in dram_config_save()
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| A D | ddrphy_train.c | 96 ddrphy_trained_csr_save(ddrphy_trained_csr, ddrphy_trained_csr_num); in ddr_cfg_phy()
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| /u-boot/board/gateworks/venice/ |
| A D | lpddr4_timing.c | 1984 .ddrphy_trained_csr = lpddr4_ddrphy_trained_csr,
2500 .ddrphy_trained_csr = lpddr4_ddrphy_trained_csr,
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| /u-boot/board/google/imx8mq_phanbell/ |
| A D | lpddr4_timing_1g.c | 1726 .ddrphy_trained_csr = ddr_ddrphy_trained_csr,
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| /u-boot/board/technexion/pico-imx8mq/ |
| A D | lpddr4_timing_1gb.c | 1728 .ddrphy_trained_csr = ddr_ddrphy_trained_csr,
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| A D | lpddr4_timing_2gb.c | 1728 .ddrphy_trained_csr = ddr_ddrphy_trained_csr,
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| A D | lpddr4_timing_3gb.c | 1728 .ddrphy_trained_csr = ddr_ddrphy_trained_csr,
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| A D | lpddr4_timing_4gb.c | 1728 .ddrphy_trained_csr = ddr_ddrphy_trained_csr,
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| /u-boot/board/freescale/imx8mn_evk/ |
| A D | ddr4_timing.c | 1208 .ddrphy_trained_csr = ddr_ddrphy_trained_csr,
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| /u-boot/board/beacon/imx8mn/ |
| A D | lpddr4_timing.c | 1428 .ddrphy_trained_csr = ddr_ddrphy_trained_csr,
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| A D | lpddr4_2g_timing.c | 1435 .ddrphy_trained_csr = ddr_ddrphy_trained_csr,
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| /u-boot/board/phytec/phycore_imx8mm/ |
| A D | lpddr4_timing.c | 1841 .ddrphy_trained_csr = ddr_ddrphy_trained_csr,
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| /u-boot/board/phytec/phycore_imx8mp/ |
| A D | lpddr4_timing.c | 1844 .ddrphy_trained_csr = ddr_ddrphy_trained_csr,
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| /u-boot/board/freescale/imx8mp_evk/ |
| A D | lpddr4_timing.c | 1843 .ddrphy_trained_csr = ddr_ddrphy_trained_csr,
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| /u-boot/board/toradex/verdin-imx8mm/ |
| A D | lpddr4_timing.c | 1845 .ddrphy_trained_csr = ddr_ddrphy_trained_csr,
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| /u-boot/board/beacon/imx8mm/ |
| A D | lpddr4_timing.c | 1976 .ddrphy_trained_csr = lpddr4_ddrphy_trained_csr,
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| /u-boot/board/freescale/imx8mm_evk/ |
| A D | lpddr4_timing.c | 1976 .ddrphy_trained_csr = lpddr4_ddrphy_trained_csr,
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| /u-boot/arch/arm/include/asm/arch-imx8m/ |
| A D | ddr.h | 696 struct dram_cfg_param *ddrphy_trained_csr; member
747 extern struct dram_cfg_param ddrphy_trained_csr[];
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