div2 (reference) in projects: u-boot - OpenGrok search results

Searched refs:div2 (Results 1 – 9 of 9) sorted by relevance

/u-boot/drivers/clk/imx/
A D	clk-composite-8m.c	`62 int div1, div2; in imx8m_clk_composite_compute_dividers() local 70 for (div2 = 1; div2 <= PCG_DIV_MAX; div2++) { in imx8m_clk_composite_compute_dividers() 71 int new_error = ((parent_rate / div1) / div2) - rate; in imx8m_clk_composite_compute_dividers() 75 *postdiv = div2; in imx8m_clk_composite_compute_dividers()`
/u-boot/arch/arm/mach-sunxi/
A D	clock_sun8i_a83t.c	`112 unsigned int div1 = 0, div2 = 0; in clock_set_pll5() local 117 div2 << CCM_PLL5_DIV2_SHIFT \| in clock_set_pll5() 133 int div2 = ((rval & CCM_PLL6_CTRL_DIV2_MASK) >> in clock_get_pll6() local 135 return 24000000 * n / div1 / div2; in clock_get_pll6()`
A D	clock_sun50i_h6.c	`100 int div2 = ((rval & CCM_PLL6_CTRL_DIV2_MASK) >> in clock_get_pll6() local 103 return 24000000 / m * n / div1 / div2; in clock_get_pll6()`
/u-boot/arch/arm/mach-s5pc1xx/include/mach/
A D	clock.h	`30 unsigned int div2; member 66 unsigned int div2; member`
/u-boot/arch/arm/mach-keystone/include/mach/
A D	clock_defs.h	`25 u32 div2; /* 1c */ member`
/u-boot/arch/arm/dts/
A D	ls1021a.dtsi	`163 clock-output-names = "cga-pll1", "cga-pll1-div2", 172 clock-output-names = "platform-clk", "platform-clk-div2"; 179 clock-names = "pll1cga", "pll1cga-div2", "pll1cga-div4";`
A D	stih410-clock.dtsi	`203 clock-output-names = "clk-m-a9-ext2f-div2";`
A D	stih407-clock.dtsi	`195 clock-output-names = "clk-m-a9-ext2f-div2";`
A D	socfpga_agilex.dtsi	`112 cb_intosc_hs_div2_clk: cb-intosc-hs-div2-clk {`

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