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Searched refs:div_cpu0 (Results 1 – 6 of 6) sorted by relevance

/u-boot/arch/arm/mach-exynos/
A Dclock_init_exynos4.c62 writel(CLK_DIV_CPU0_VAL, &clk->div_cpu0); in system_clock_init()
A Dclock.c579 div = readl(&clk->div_cpu0); in exynos4_get_arm_clk()
601 div = readl(&clk->div_cpu0); in exynos4x12_get_arm_clk()
623 div = readl(&clk->div_cpu0); in exynos5_get_arm_clk()
A Dclock_init_exynos5.c607 writel(val, &clk->div_cpu0); in exynos5250_system_clock_init()
813 writel(CLK_DIV_CPU0_VAL, &clk->div_cpu0); in exynos5420_system_clock_init()
/u-boot/board/samsung/trats/
A Dtrats.c79 writel(0x00000100, &clk->div_cpu0); in trats_low_power_mode()
325 writel(CLK_DIV_CPU0_VAL, (unsigned int)&clk->div_cpu0); in board_clock_init()
/u-boot/arch/arm/mach-exynos/include/mach/
A Dclock.h196 unsigned int div_cpu0; member
446 unsigned int div_cpu0; member
526 unsigned int div_cpu0; member
871 unsigned int div_cpu0; /* 0x10010500 */ member
/u-boot/board/samsung/odroid/
A Dodroid.c166 clrsetbits_le32(&clk->div_cpu0, clr, set); in board_clock_init()

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