Searched refs:hmc_readl (Results 1 – 4 of 4) sorted by relevance
| /u-boot/drivers/ddr/altera/ |
| A D | sdram_s10.c | 164 u32 ctrlcfg0 = hmc_readl(plat, CTRLCFG0); in sdram_mmr_init_full()
165 u32 ctrlcfg1 = hmc_readl(plat, CTRLCFG1); in sdram_mmr_init_full()
166 u32 dramaddrw = hmc_readl(plat, DRAMADDRW); in sdram_mmr_init_full()
167 u32 dramtim0 = hmc_readl(plat, DRAMTIMING0); in sdram_mmr_init_full()
168 u32 caltim0 = hmc_readl(plat, CALTIMING0); in sdram_mmr_init_full()
169 u32 caltim1 = hmc_readl(plat, CALTIMING1); in sdram_mmr_init_full()
170 u32 caltim2 = hmc_readl(plat, CALTIMING2); in sdram_mmr_init_full()
171 u32 caltim3 = hmc_readl(plat, CALTIMING3); in sdram_mmr_init_full()
172 u32 caltim4 = hmc_readl(plat, CALTIMING4); in sdram_mmr_init_full()
173 u32 caltim9 = hmc_readl(plat, CALTIMING9); in sdram_mmr_init_full()
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| A D | sdram_agilex.c | 77 update_value = hmc_readl(plat, NIOSRESERVED0); in sdram_mmr_init_full()
81 update_value |= (hmc_readl(plat, CTRLCFG3) & 0x4); in sdram_mmr_init_full()
85 hmc_ecc_writel(plat, hmc_readl(plat, DRAMADDRW), DRAMADDRWIDTH); in sdram_mmr_init_full()
132 u32 ctrlcfg1 = hmc_readl(plat, CTRLCFG1); in sdram_mmr_init_full()
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| A D | sdram_soc64.c | 31 u32 hmc_readl(struct altera_sdram_plat *plat, u32 reg) in hmc_readl() function
71 c2s, s2c, hmc_readl(plat, NIOSRESERVED0), in emif_reset()
72 hmc_readl(plat, NIOSRESERVED1), hmc_readl(plat, NIOSRESERVED2), in emif_reset()
73 hmc_readl(plat, DRAMSTS)); in emif_reset()
220 u32 dramaddrw = hmc_readl(plat, DRAMADDRW); in sdram_calculate_size()
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| A D | sdram_soc64.h | 172 u32 hmc_readl(struct altera_sdram_plat *plat, u32 reg);
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