Searched refs:input_clk (Results 1 – 5 of 5) sorted by relevance
44 unsigned long input_clk; /* master clock (Hz) */ member61 priv->input_clk = IOBUS_FREQ; in uniphier_i2c_probe()187 writel((priv->input_clk / speed / 2 << 16) | (priv->input_clk / speed), in uniphier_i2c_set_bus_speed()
165 static int cdns_i2c_calc_divs(unsigned long *f, unsigned long input_clk, in cdns_i2c_calc_divs() argument173 temp = input_clk / (22 * fscl); in cdns_i2c_calc_divs()184 div_b = DIV_ROUND_UP(input_clk, 22 * fscl * (div_a + 1)); in cdns_i2c_calc_divs()190 actual_fscl = input_clk / (22 * (div_a + 1) * (div_b + 1)); in cdns_i2c_calc_divs()
149 uint input_clk; /* Input clock to MMC controller */ member
32 uint input_clk; /* Input clock to MMC controller */ member59 sysclk2 = host->input_clk;485 priv->input_clk = clk_get(DAVINCI_MMCSD_CLKID);
351 mmc_sd0.input_clk = clk_get(DAVINCI_MMCSD_CLKID); in board_mmc_init()
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