Searched refs:interface_params (Results 1 – 7 of 7) sorted by relevance
193 if (tm->interface_params[0]. in ddr3_tip_pad_inv()376 tm->interface_params[if_id]. in hws_ddr3_tip_init_controller()388 tm->interface_params[if_id]. in hws_ddr3_tip_init_controller()476 (tm->interface_params[if_id]. in hws_ddr3_tip_init_controller()485 tm->interface_params[if_id]. in hws_ddr3_tip_init_controller()514 tm->interface_params[if_id]. in hws_ddr3_tip_init_controller()517 tm->interface_params[if_id]. in hws_ddr3_tip_init_controller()556 ((tm->interface_params[if_id]. in hws_ddr3_tip_init_controller()1296 tm->interface_params[if_id]. in ddr3_tip_freq_set()1781 tm->interface_params[if_id]. in ddr3_tip_write_cs_result()[all …]
49 struct if_params *iface_params = &(tm->interface_params[0]); in mv_ddr_topology_map_update()212 struct if_params *iface_params = &(tm->interface_params[0]); in mv_ddr_cs_num_get()267 struct if_params *iface_params = &(tm->interface_params[0]); in mv_ddr_mem_sz_per_cs_get()
354 freq = tm->interface_params[first_active_if].memory_freq; in ddr3_tip_print_log()1299 interface_params[ui].memory_freq)); in print_topology()1301 topology_db->interface_params[ui].speed_bin_index); in print_topology()1306 interface_params[ui].memory_size)); in print_topology()1308 topology_db->interface_params[ui].cas_wl); in print_topology()1310 topology_db->interface_params[ui].cas_l); in print_topology()1312 topology_db->interface_params[ui].interface_temp); in print_topology()1316 topology_db->interface_params[ui]. in print_topology()1319 topology_db->interface_params[ui]. in print_topology()1323 interface_params[ui].as_bus_params[uj]. in print_topology()[all …]
113 struct if_params interface_params[MV_DDR_MAX_IFACE_NUM]; member
680 enum mv_ddr_freq ddr_freq = tm->interface_params[0].memory_freq; in mv_ddr_training_mask_set()885 if (tm->interface_params[0].memory_freq != MV_DDR_FREQ_SAR) in mv_ddr_early_init()1046 [tm->interface_params[0].memory_size]; in ddr3_fast_path_dynamic_cs_size_config()1157 cs_ena = tm->interface_params[0].as_bus_params[0].cs_bitmask; in ddr3_save_and_set_training_windows()
121 tm->interface_params[if_id].speed_bin_index; in ddr3_tip_dynamic_read_leveling()493 tm->interface_params[if_id].speed_bin_index; in ddr3_tip_dynamic_per_bit_read_leveling()786 all_bus_cs |= tm->interface_params[if_id]. in ddr3_tip_calc_cs_mask()788 same_bus_cs &= tm->interface_params[if_id]. in ddr3_tip_calc_cs_mask()792 *cs_mask &= ~tm->interface_params[if_id]. in ddr3_tip_calc_cs_mask()1676 int cl_val = tm->interface_params[0].cas_l; in mv_ddr_rl_dqs_burst()
155 struct if_params *ifp = &board_topology_map.interface_params[0]; in mv_ddr_topology_map_get()
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