| /u-boot/arch/arm/mach-at91/arm920t/ |
| A D | clock.c | 44 unsigned i, div = 0, mul = 0, diff = 1 << 30; in at91_pll_calc() local
78 mul = mul1; in at91_pll_calc()
85 return ret | ((mul - 1) << 16) | div; in at91_pll_calc()
93 unsigned mul, div; in at91_pll_rate() local
96 mul = (reg >> 16) & 0x7ff; in at91_pll_rate()
97 if (div && mul) { in at91_pll_rate()
99 freq *= mul + 1; in at91_pll_rate()
|
| /u-boot/arch/arm/lib/ |
| A D | muldi3.S | 29 mul xh, yl, xh
36 mul yh, xl, yh
37 mul xl, yl, xl
38 mul ip, yl, ip
|
| A D | lib1funcs.S | 327 mul r3, r0, r2
343 mul r3, r0, r2
|
| /u-boot/include/linux/ |
| A D | math64.h | 150 static inline u64 mul_u64_u32_shr(u64 a, u32 mul, unsigned int shift) in mul_u64_u32_shr() argument
152 return (u64)(((unsigned __int128)a * mul) >> shift); in mul_u64_u32_shr()
157 static inline u64 mul_u64_u64_shr(u64 a, u64 mul, unsigned int shift) in mul_u64_u64_shr() argument
159 return (u64)(((unsigned __int128)a * mul) >> shift); in mul_u64_u64_shr()
166 static inline u64 mul_u64_u32_shr(u64 a, u32 mul, unsigned int shift) in mul_u64_u32_shr() argument
174 ret = mul_u32_u32(al, mul) >> shift; in mul_u64_u32_shr()
176 ret += mul_u32_u32(ah, mul) << (32 - shift); in mul_u64_u32_shr()
229 static inline u64 mul_u64_u32_div(u64 a, u32 mul, u32 divisor) in mul_u64_u32_div() argument
243 rl.ll = mul_u32_u32(u.l.low, mul); in mul_u64_u32_div()
244 rh.ll = mul_u32_u32(u.l.high, mul) + rl.l.high; in mul_u64_u32_div()
|
| /u-boot/arch/arm/mach-at91/arm926ejs/ |
| A D | clock.c | 44 unsigned i, div = 0, mul = 0, diff = 1 << 30; in at91_pll_calc() local
72 if (mul > 63) in at91_pll_calc()
86 mul = mul1; in at91_pll_calc()
93 return ret | ((mul - 1) << 16) | div; in at91_pll_calc()
101 unsigned mul, div; in at91_pll_rate() local
104 mul = (reg >> 16) & 0x7ff; in at91_pll_rate()
105 if (div && mul) { in at91_pll_rate()
107 freq *= mul + 1; in at91_pll_rate()
|
| /u-boot/drivers/clk/ |
| A D | clk_boston.c | 32 uint32_t in_rate, mul, div; in clk_boston_get_rate() local
41 mul = ext_field(mmcmdiv, BOSTON_PLAT_MMCMDIV_MUL); in clk_boston_get_rate()
54 return (in_rate * mul * 1000000) / div; in clk_boston_get_rate()
|
| A D | clk_zynq.c | 136 u32 clk_ctrl, reset, pwrdwn, mul, bypass; in zynq_clk_get_pll_rate() local
147 mul = 1; in zynq_clk_get_pll_rate()
149 mul = (clk_ctrl & PLLCTRL_FBDIV_MASK) >> PLLCTRL_FBDIV_SHIFT; in zynq_clk_get_pll_rate()
151 return priv->ps_clk_freq * mul; in zynq_clk_get_pll_rate()
|
| A D | clk_pic32.c | 286 u32 v, idiv, mul; in pic32_get_mpll_rate() local
292 mul = (v >> MPLL_MULT_SHIFT) & MPLL_MULT; in pic32_get_mpll_rate()
296 rate = (SYS_POSC_CLK_HZ / idiv) * mul; in pic32_get_mpll_rate()
|
| A D | clk_zynqmp.c | 349 u32 clk_ctrl, reset, mul; in zynqmp_clk_get_pll_rate() local
368 mul = (clk_ctrl & PLLCTRL_FBDIV_MASK) >> PLLCTRL_FBDIV_SHIFT; in zynqmp_clk_get_pll_rate()
370 freq *= mul; in zynqmp_clk_get_pll_rate()
|
| /u-boot/arch/arm/mach-at91/armv7/ |
| A D | clock.c | 43 unsigned mul, div; in at91_pll_rate() local
46 mul = (reg >> 18) & 0x7f; in at91_pll_rate()
47 if (div && mul) { in at91_pll_rate()
49 freq *= mul + 1; in at91_pll_rate()
|
| /u-boot/arch/mips/lib/ |
| A D | cache_init.S | 64 mul \sz, \sz, \line_sz
77 mul \sz, \sz, $1
173 mul R_L2_SIZE, R_L2_LINE, t2
178 mul R_L2_SIZE, R_L2_SIZE, t2
216 mul R_L2_SIZE, R_L2_LINE, t1
222 mul R_L2_SIZE, R_L2_SIZE, t1
|
| /u-boot/board/xilinx/microblaze-generic/ |
| A D | config.mk | 11 CPUFLAGS-$(CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL) += -mno-xl-soft-mul
|
| /u-boot/post/lib_powerpc/fpu/ |
| A D | Makefile | 7 acc1.o compare-fp-1.o fpu.o mul-subnormal-single-1.o darwin-ldouble.o
|
| /u-boot/doc/device-tree-bindings/cpu/ |
| A D | nios2.txt | 25 - altr,has-mul: Specifies CPU hardware multipy support.
48 altr,has-mul = <1>;
|
| /u-boot/drivers/clk/at91/ |
| A D | clk-sam9x60-pll.c | 59 static long sam9x60_frac_pll_compute_mul_frac(u32 *mul, u32 *frac, ulong rate, in sam9x60_frac_pll_compute_mul_frac() argument
89 *mul = nmul - 1; in sam9x60_frac_pll_compute_mul_frac()
145 u32 mul, frac, val; in sam9x60_frac_pll_get_rate() local
153 mul = (val & pll->layout->mul_mask) >> pll->layout->mul_shift; in sam9x60_frac_pll_get_rate()
156 return (parent_rate * (mul + 1) + ((u64)parent_rate * frac >> 22)); in sam9x60_frac_pll_get_rate()
|
| /u-boot/arch/arm/cpu/armv8/bcmns3/ |
| A D | lowlevel.S | 19 mul w0, w0, w6
|
| /u-boot/arch/x86/cpu/ |
| A D | sipi_vector.S | 111 mul %ecx
|
| /u-boot/board/armltd/integrator/ |
| A D | lowlevel_init.S | 126 mul r5, r4, r3 /* size of SDRAM (MB divided by 4) */
|
| /u-boot/arch/nios2/dts/ |
| A D | 3c120_devboard.dts | 37 altr,has-mul = <1>;
|
| A D | 10m50_devboard.dts | 32 altr,has-mul = <1>;
|
| /u-boot/drivers/clk/aspeed/ |
| A D | clk_ast2600.c | 145 uint32_t mul = 1, div = 1; in ast2600_get_pll_rate() local
198 mul = (pll_reg.b.m + 1) / (pll_reg.b.n + 1); in ast2600_get_pll_rate()
202 return ((CLKIN_25M * mul) / div); in ast2600_get_pll_rate()
|
| /u-boot/arch/arm/cpu/armv7/ls102xa/ |
| A D | psci.S | 155 mul r6, r6, r1
|
| /u-boot/arch/arm/cpu/arm920t/ep93xx/ |
| A D | lowlevel_init.S | 419 mul r1, r8, r10
|
| /u-boot/arch/arm/cpu/armv8/ |
| A D | psci.S | 215 mul x9, x10, x9
|
| /u-boot/arch/arm/cpu/armv8/fsl-layerscape/ |
| A D | lowlevel.S | 260 mul x14, \xreg, x16
|