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Searched refs:nr (Results 1 – 25 of 81) sorted by relevance

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/u-boot/arch/arm/mach-omap2/am33xx/
A Dddr.c65 static void configure_mr(int nr, u32 cs) in configure_mr() argument
71 set_mr(nr, cs, LPDDR2_MR10, 0x56); in configure_mr()
73 set_mr(nr, cs, LPDDR2_MR1, 0x43); in configure_mr()
74 set_mr(nr, cs, LPDDR2_MR2, 0x2); in configure_mr()
77 set_mr(nr, cs, mr_addr, 0x2); in configure_mr()
175 configure_mr(nr, 0); in config_sdram_emif4d5()
176 configure_mr(nr, 1); in config_sdram_emif4d5()
342 &emif_reg[nr]->emif_sdram_ref_ctrl); in config_ddr_phy()
345 &emif_reg[nr]->emif_ddr_phy_ctrl_1); in config_ddr_phy()
351 ext_phy_settings_hwlvl(regs, nr); in config_ddr_phy()
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A Demif4.c51 static void config_vtp(int nr) in config_vtp() argument
54 &vtpreg[nr]->vtp0ctrlreg); in config_vtp()
56 &vtpreg[nr]->vtp0ctrlreg); in config_vtp()
58 &vtpreg[nr]->vtp0ctrlreg); in config_vtp()
75 config_vtp(nr); in config_ddr()
76 config_cmd_ctrl(ctrl, nr); in config_ddr()
78 config_ddr_data(data, nr); in config_ddr()
107 config_ddr_phy(regs, nr); in config_ddr()
108 set_sdram_timings(regs, nr); in config_ddr()
110 config_sdram_emif4d5(regs, nr); in config_ddr()
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/u-boot/arch/nds32/include/asm/
A Dbitops.h42 a += nr >> 5; in __set_bit()
57 a += nr >> 5; in __clear_bit()
73 ADDR += nr >> 5; in __change_bit()
85 a += nr >> 5; in __test_and_set_bit()
99 a += nr >> 5; in __test_and_clear_bit()
113 a += nr >> 5; in __test_and_change_bit()
128 return ((unsigned char *) addr)[nr >> 3] & (1U << (nr & 7)); in test_bit()
186 #define minix_test_and_set_bit(nr, addr) test_and_set_bit(nr, addr) argument
187 #define minix_set_bit(nr, addr) set_bit(nr, addr) argument
188 #define minix_test_and_clear_bit(nr, addr) test_and_clear_bit(nr, addr) argument
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/u-boot/arch/microblaze/include/asm/
A Dbitops.h42 a += nr >> 5; in set_bit()
54 a += nr >> 5; in __set_bit()
72 a += nr >> 5; in clear_bit()
79 #define __clear_bit(nr, addr) clear_bit(nr, addr) argument
111 a += nr >> 5; in test_and_set_bit()
126 a += nr >> 5; in __test_and_set_bit()
139 a += nr >> 5; in test_and_clear_bit()
154 a += nr >> 5; in __test_and_clear_bit()
167 a += nr >> 5; in test_and_change_bit()
357 #define minix_set_bit(nr,addr) set_bit(nr,addr) argument
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/u-boot/arch/mips/include/asm/
A Dbitops.h204 a += nr >> 5; in __test_and_set_bit()
256 a += nr >> 5; in __test_and_clear_bit()
307 a += nr >> 5; in __test_and_change_bit()
333 a += nr >> 5; in set_bit()
354 a += nr >> 5; in __set_bit()
375 a += nr >> 5; in clear_bit()
397 a += nr >> 5; in change_bit()
434 a += nr >> 5; in test_and_set_bit()
885 #define ext2_test_bit(nr, addr) test_bit((nr), (addr)) argument
898 #define minix_set_bit(nr,addr) set_bit(nr,addr) argument
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/u-boot/arch/sandbox/include/asm/
A Dbitops.h45 unsigned long mask = BIT_MASK(nr); in __change_bit()
53 unsigned long mask = BIT_MASK(nr); in __test_and_set_bit()
67 out = __test_and_set_bit(nr, addr); in test_and_set_bit()
75 unsigned long mask = BIT_MASK(nr); in __test_and_clear_bit()
89 out = __test_and_clear_bit(nr, addr); in test_and_clear_bit()
99 unsigned long mask = BIT_MASK(nr); in __test_and_change_bit()
115 return ((unsigned char *) addr)[nr >> 3] & (1U << (nr & 7)); in test_bit()
161 #define minix_test_and_set_bit(nr, addr) test_and_set_bit(nr, addr) argument
162 #define minix_set_bit(nr, addr) set_bit(nr, addr) argument
163 #define minix_test_and_clear_bit(nr, addr) test_and_clear_bit(nr, addr) argument
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/u-boot/include/
A Dsh_pfc.h144 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_IN)
148 PORT##nr##_IN, PORT##nr##_IN_PD)
152 PORT##nr##_IN, PORT##nr##_IN_PU)
156 PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
159 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT)
162 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
166 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
167 PORT##nr##_IN, PORT##nr##_IN_PD)
170 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
174 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
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/u-boot/arch/riscv/include/asm/
A Dbitops.h40 a += nr >> 5; in __set_bit()
52 a += nr >> 5; in __clear_bit()
64 ADDR += nr >> 5; in __change_bit()
74 a += nr >> 5; in __test_and_set_bit()
86 a += nr >> 5; in __test_and_clear_bit()
98 a += nr >> 5; in __test_and_change_bit()
110 return ((unsigned char *)addr)[nr >> 3] & (1U << (nr & 7)); in test_bit()
168 #define minix_test_and_set_bit(nr, addr) test_and_set_bit(nr, addr) argument
169 #define minix_set_bit(nr, addr) set_bit(nr, addr) argument
170 #define minix_test_and_clear_bit(nr, addr) test_and_clear_bit(nr, addr) argument
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/u-boot/arch/nios2/include/asm/bitops/
A Dnon-atomic.h17 unsigned long mask = BIT_MASK(nr); in __set_bit()
18 unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr); in __set_bit()
27 unsigned long mask = BIT_MASK(nr); in __clear_bit()
28 unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr); in __clear_bit()
46 unsigned long mask = BIT_MASK(nr); in __change_bit()
47 unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr); in __change_bit()
63 unsigned long mask = BIT_MASK(nr); in __test_and_set_bit()
82 unsigned long mask = BIT_MASK(nr); in __test_and_clear_bit()
91 static inline int __test_and_change_bit(int nr, in __test_and_change_bit() argument
94 unsigned long mask = BIT_MASK(nr); in __test_and_change_bit()
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A Datomic.h67 unsigned long mask = BIT_MASK(nr); in set_bit()
68 unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr); in set_bit()
88 unsigned long mask = BIT_MASK(nr); in clear_bit()
89 unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr); in clear_bit()
109 unsigned long mask = BIT_MASK(nr); in change_bit()
110 unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr); in change_bit()
129 unsigned long mask = BIT_MASK(nr); in test_and_set_bit()
130 unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr); in test_and_set_bit()
153 unsigned long mask = BIT_MASK(nr); in test_and_clear_bit()
154 unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr); in test_and_clear_bit()
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/u-boot/arch/x86/include/asm/
A Dbitops.h44 :"Ir" (nr)); in set_bit()
61 :"Ir" (nr)); in __set_bit()
81 :"Ir" (nr)); in clear_bit()
100 :"Ir" (nr)); in __change_bit()
117 :"Ir" (nr)); in change_bit()
155 :"Ir" (nr)); in __test_and_set_bit()
194 :"Ir" (nr)); in __test_and_clear_bit()
402 #define minix_test_and_set_bit(nr,addr) __test_and_set_bit(nr,addr) argument
403 #define minix_set_bit(nr,addr) __set_bit(nr,addr) argument
404 #define minix_test_and_clear_bit(nr,addr) __test_and_clear_bit(nr,addr) argument
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/u-boot/include/asm-generic/
A Dioctl.h68 ((nr) << _IOC_NRSHIFT) | \
83 #define _IO(type,nr) _IOC(_IOC_NONE,(type),(nr),0) argument
84 #define _IOR(type,nr,size) _IOC(_IOC_READ,(type),(nr),(_IOC_TYPECHECK(size))) argument
85 #define _IOW(type,nr,size) _IOC(_IOC_WRITE,(type),(nr),(_IOC_TYPECHECK(size))) argument
87 #define _IOR_BAD(type,nr,size) _IOC(_IOC_READ,(type),(nr),sizeof(size)) argument
88 #define _IOW_BAD(type,nr,size) _IOC(_IOC_WRITE,(type),(nr),sizeof(size)) argument
89 #define _IOWR_BAD(type,nr,size) _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),sizeof(size)) argument
92 #define _IOC_DIR(nr) (((nr) >> _IOC_DIRSHIFT) & _IOC_DIRMASK) argument
93 #define _IOC_TYPE(nr) (((nr) >> _IOC_TYPESHIFT) & _IOC_TYPEMASK) argument
94 #define _IOC_NR(nr) (((nr) >> _IOC_NRSHIFT) & _IOC_NRMASK) argument
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/u-boot/arch/arm/include/asm/
A Dbitops.h44 unsigned long mask = BIT_MASK(nr); in __change_bit()
52 unsigned long mask = BIT_MASK(nr); in __test_and_set_bit()
66 out = __test_and_set_bit(nr, addr); in test_and_set_bit()
74 unsigned long mask = BIT_MASK(nr); in __test_and_clear_bit()
88 out = __test_and_clear_bit(nr, addr); in test_and_clear_bit()
98 unsigned long mask = BIT_MASK(nr); in __test_and_change_bit()
111 return ((unsigned char *) addr)[nr >> 3] & (1U << (nr & 7)); in test_bit()
177 #define minix_test_and_set_bit(nr,addr) test_and_set_bit(nr,addr) argument
178 #define minix_set_bit(nr,addr) set_bit(nr,addr) argument
179 #define minix_test_and_clear_bit(nr,addr) test_and_clear_bit(nr,addr) argument
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/u-boot/arch/powerpc/include/asm/
A Dbitops.h144 return ((p[nr >> 5] >> (nr & 0x1f)) & 1) != 0; in test_bit()
281 #define ext2_set_bit(nr, addr) test_and_set_bit((nr) ^ 0x18, addr) argument
282 #define ext2_clear_bit(nr, addr) test_and_clear_bit((nr) ^ 0x18, addr) argument
291 ADDR += nr >> 3; in ext2_set_bit()
292 mask = 1 << (nr & 0x07); in ext2_set_bit()
304 ADDR += nr >> 3; in ext2_clear_bit()
316 return (ADDR[nr >> 3] >> (nr & 7)) & 1; in ext2_test_bit()
364 #define minix_test_and_set_bit(nr,addr) ext2_set_bit(nr,addr) argument
365 #define minix_set_bit(nr,addr) ((void)ext2_set_bit(nr,addr)) argument
366 #define minix_test_and_clear_bit(nr,addr) ext2_clear_bit(nr,addr) argument
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/u-boot/arch/sh/include/asm/
A Dbitops.h20 a += nr >> 5; in set_bit()
21 mask = 1 << (nr & 0x1f); in set_bit()
38 a += nr >> 5; in clear_bit()
39 mask = 1 << (nr & 0x1f); in clear_bit()
51 a += nr >> 5; in change_bit()
52 mask = 1 << (nr & 0x1f); in change_bit()
64 a += nr >> 5; in test_and_set_bit()
65 mask = 1 << (nr & 0x1f); in test_and_set_bit()
80 a += nr >> 5; in test_and_clear_bit()
81 mask = 1 << (nr & 0x1f); in test_and_clear_bit()
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/u-boot/arch/m68k/include/asm/
A Dbitops.h14 extern void set_bit(int nr, volatile void *addr);
15 extern void clear_bit(int nr, volatile void *addr);
16 extern void change_bit(int nr, volatile void *addr);
17 extern int test_and_clear_bit(int nr, volatile void *addr);
18 extern int test_and_change_bit(int nr, volatile void *addr);
23 static inline int test_bit(int nr, __const__ volatile void *addr) in test_bit() argument
27 return (p[nr >> 5] & (1UL << (nr & 31))) != 0; in test_bit()
30 static inline int test_and_set_bit(int nr, volatile void *vaddr) in test_and_set_bit() argument
34 volatile char *p = &((volatile char *)vaddr)[(nr^31) >> 3]; in test_and_set_bit()
37 : "di" (nr & 7), "m" (*p), "a" (p)); in test_and_set_bit()
/u-boot/include/linux/
A Dbitops.h11 #define BIT(nr) (1UL << (nr)) argument
12 #define BIT_ULL(nr) (1ULL << (nr)) argument
13 #define BIT_MASK(nr) (1UL << ((nr) % BITS_PER_LONG)) argument
14 #define BIT_WORD(nr) ((nr) / BITS_PER_LONG) argument
15 #define BIT_ULL_MASK(nr) (1ULL << ((nr) % BITS_PER_LONG_LONG)) argument
16 #define BIT_ULL_WORD(nr) ((nr) / BITS_PER_LONG_LONG) argument
18 #define BITS_TO_LONGS(nr) DIV_ROUND_UP(nr, BITS_PER_BYTE * sizeof(long)) argument
209 unsigned long mask = BIT_MASK(nr); in generic_set_bit()
210 unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr); in generic_set_bit()
217 unsigned long mask = BIT_MASK(nr); in generic_clear_bit()
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/u-boot/arch/arm/mach-imx/mx6/
A Dmp.c33 int cpu_reset(u32 nr) in cpu_reset() argument
36 src->scr |= cpu_reset_mask[nr]; in cpu_reset()
40 int cpu_status(u32 nr) in cpu_status() argument
42 printf("core %d => %d\n", nr, !!(src->scr & cpu_ctrl_mask[nr])); in cpu_status()
46 int cpu_release(u32 nr, int argc, char *const argv[]) in cpu_release() argument
52 switch (nr) { in cpu_release()
67 src->scr |= cpu_ctrl_mask[nr]; in cpu_release()
82 int cpu_disable(u32 nr) in cpu_disable() argument
85 src->scr &= ~cpu_ctrl_mask[nr]; in cpu_disable()
/u-boot/arch/xtensa/include/asm/
A Dbitops.h16 static inline int test_bit(int nr, const void *addr) in test_bit() argument
18 return ((unsigned char *)addr)[nr >> 3] & (1u << (nr & 7)); in test_bit()
21 static inline int test_and_set_bit(int nr, volatile void *addr) in test_and_set_bit() argument
25 unsigned char mask = 1u << (nr & 7); in test_and_set_bit()
28 tmp = ((unsigned char *)addr)[nr >> 3]; in test_and_set_bit()
29 ((unsigned char *)addr)[nr >> 3] |= mask; in test_and_set_bit()
/u-boot/arch/arm/include/asm/xen/
A Dsystem.h24 u8 *byte = ((u8 *)addr) + (nr >> 3); in synch_test_and_clear_bit()
25 u8 bit = 1 << (nr & 7); in synch_test_and_clear_bit()
34 static inline int synch_test_and_set_bit(int nr, volatile void *base) in synch_test_and_set_bit() argument
36 u8 *byte = ((u8 *)base) + (nr >> 3); in synch_test_and_set_bit()
37 u8 bit = 1 << (nr & 7); in synch_test_and_set_bit()
46 static inline void synch_set_bit(int nr, volatile void *addr) in synch_set_bit() argument
48 synch_test_and_set_bit(nr, addr); in synch_set_bit()
52 static inline void synch_clear_bit(int nr, volatile void *addr) in synch_clear_bit() argument
54 synch_test_and_clear_bit(nr, addr); in synch_clear_bit()
59 static inline int synch_test_bit(int nr, const void *addr) in synch_test_bit() argument
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/u-boot/arch/powerpc/cpu/mpc86xx/
A Dmp.c18 int cpu_reset(u32 nr) in cpu_reset() argument
28 int cpu_status(u32 nr) in cpu_status() argument
34 int cpu_disable(u32 nr) in cpu_disable() argument
39 switch (nr) { in cpu_disable()
47 printf("Invalid cpu number for disable %d\n", nr); in cpu_disable()
54 int is_core_disabled(int nr) { in is_core_disabled() argument
59 switch (nr) { in is_core_disabled()
65 printf("Invalid cpu number for disable %d\n", nr); in is_core_disabled()
71 int cpu_release(u32 nr, int argc, char *const argv[]) in cpu_release() argument
/u-boot/arch/arm/mach-zynqmp/
A Dmp.c51 int cpu_reset(u32 nr) in cpu_reset() argument
137 int cpu_disable(u32 nr) in cpu_disable() argument
139 if (nr >= ZYNQMP_CORE_APU0 && nr <= ZYNQMP_CORE_APU3) { in cpu_disable()
141 val |= 1 << nr; in cpu_disable()
150 int cpu_status(u32 nr) in cpu_status() argument
152 if (nr >= ZYNQMP_CORE_APU0 && nr <= ZYNQMP_CORE_APU3) { in cpu_status()
155 nr * 8); in cpu_status()
157 val &= 1 << nr; in cpu_status()
162 val &= 1 << (nr - 4); in cpu_status()
228 if (nr >= ZYNQMP_CORE_APU0 && nr <= ZYNQMP_CORE_APU3) { in cpu_release()
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/u-boot/arch/powerpc/cpu/mpc85xx/
A Dmp.c51 int cpu_reset(u32 nr) in cpu_reset() argument
54 out_be32(&pic->pir, 1 << nr); in cpu_reset()
62 int cpu_status(u32 nr) in cpu_status() argument
69 if (nr == id) { in cpu_status()
88 int cpu_disable(u32 nr) in cpu_disable() argument
97 int is_core_disabled(int nr) { in is_core_disabled() argument
104 int cpu_disable(u32 nr) in cpu_disable() argument
108 switch (nr) { in cpu_disable()
123 int is_core_disabled(int nr) { in is_core_disabled() argument
127 switch (nr) { in is_core_disabled()
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/u-boot/arch/arm/mach-mvebu/
A Defuse.c48 static struct mvebu_hd_efuse *get_efuse_line(int nr) in get_efuse_line() argument
50 if (nr < 0 || nr > 63 || !efuse_initialised) in get_efuse_line()
53 return efuses + nr; in get_efuse_line()
96 static int prog_efuse(int nr, struct efuse_val *new_val, u32 mask0, u32 mask1) in prog_efuse() argument
105 efuse = get_efuse_line(nr); in prog_efuse()
150 int mvebu_read_efuse(int nr, struct efuse_val *val) in mvebu_read_efuse() argument
159 efuse = get_efuse_line(nr); in mvebu_read_efuse()
172 int mvebu_write_efuse(int nr, struct efuse_val *val) in mvebu_write_efuse() argument
174 return prog_efuse(nr, val, ~0, ~0); in mvebu_write_efuse()
177 int mvebu_lock_efuse(int nr) in mvebu_lock_efuse() argument
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/u-boot/arch/arm/cpu/armv8/fsl-layerscape/
A Dmp.c234 int cpu_reset(u32 nr) in cpu_reset() argument
241 int cpu_disable(u32 nr) in cpu_disable() argument
248 static int core_to_pos(int nr) in core_to_pos() argument
253 if (nr == 0) { in core_to_pos()
255 } else if (nr >= hweight32(cores)) { in core_to_pos()
263 if (count == nr) in core_to_pos()
268 if (count != nr) in core_to_pos()
274 int cpu_status(u32 nr) in cpu_status() argument
279 if (nr == 0) { in cpu_status()
282 pos = core_to_pos(nr); in cpu_status()
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