| /u-boot/drivers/net/ |
| A D | uli526x.c | 459 outl(0, dev->iobase + DCR7); in uli526x_start_xmit()
696 outl(cr6_data, ioaddr + DCR6); in update_cr6()
739 outl(CR9_SROM_READ, cr9_ioaddr); in read_srom_word()
764 outl(CR9_SROM_READ, cr9_ioaddr); in read_srom_word()
915 outl(cr10_value, ioaddr); in phy_readby_cr10()
934 outl(cr10_value, ioaddr); in phy_writeby_cr10()
959 outl(0x50000 , ioaddr); in phy_read_1bit()
962 outl(0x40000 , ioaddr); in phy_read_1bit()
979 outl(0x1c0, db->ioaddr + DCR13); in set_mac_addr()
985 outl(0x1b0, db->ioaddr + DCR13); in set_mac_addr()
[all …]
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| A D | rtl8139.c | 296 outl(rtl8139_rx_config | rx_mode, priv->ioaddr + RTL_REG_RXCONFIG); in rtl8139_set_rx_mode()
298 outl(0xffffffff, priv->ioaddr + RTL_REG_MAR0 + 0); in rtl8139_set_rx_mode()
299 outl(0xffffffff, priv->ioaddr + RTL_REG_MAR0 + 4); in rtl8139_set_rx_mode()
336 outl(rtl8139_rx_config, priv->ioaddr + RTL_REG_RXCONFIG); in rtl8139_reset()
337 outl((TX_DMA_BURST << 8) | 0x03000000, priv->ioaddr + RTL_REG_TXCONFIG); in rtl8139_reset()
352 outl(phys_to_bus(priv->devno, (int)rx_ring), priv->ioaddr + RTL_REG_RXBUF); in rtl8139_reset()
363 outl(rtl8139_rx_config, priv->ioaddr + RTL_REG_RXCONFIG); in rtl8139_reset()
366 outl(0, priv->ioaddr + RTL_REG_RXMISSED); in rtl8139_reset()
394 outl(phys_to_bus(priv->devno, (unsigned long)tx_buffer), in rtl8139_send_common()
396 outl(((TX_FIFO_THRESH << 11) & 0x003f0000) | len, in rtl8139_send_common()
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| A D | sh_eth.h | 25 #define outl writel macro
671 outl(data, sh_eth_reg_addr(port, enum_index)); in sh_eth_write()
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| /u-boot/board/intel/galileo/ |
| A D | galileo.c | 33 outl(val, port); in board_assert_perst()
39 outl(val, port); in board_assert_perst()
45 outl(val, port); in board_assert_perst()
60 outl(val, port); in board_deassert_perst()
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| /u-boot/arch/sh/cpu/sh4/ |
| A D | watchdog.c | 24 outl((unsigned short)value | 0x5A00, WDT_BASE + 0x00); in cnt_write()
29 outl((unsigned short)value | 0xA500, WDT_BASE + 0x04); in csr_write()
34 outl(0x55000000, WDT_BASE + 0x08); in watchdog_reset()
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| A D | cache.c | 30 outl(data, addr); in cache_wback_all()
50 outl(CCR_CACHE_STOP, CCR); in cache_control()
52 outl(CCR_CACHE_INIT, CCR); in cache_control()
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| /u-boot/arch/x86/cpu/broadwell/ |
| A D | pinctrl_broadwell.c | 178 outl(val, ®s->config[gpio].conf_a); in broadwell_pinctrl_commit()
179 outl(pin->sense_disable << CONFB_SENSE_SHIFT, in broadwell_pinctrl_commit()
201 outl(owner_gpio[set], ®s->own[set]); in broadwell_pinctrl_commit()
202 outl(route_smi[set], ®s->gpi_route[set]); in broadwell_pinctrl_commit()
203 outl(irq_enable[set], ®s->gpi_ie[set]); in broadwell_pinctrl_commit()
204 outl(reset_rsmrst[set], ®s->rst_sel[set]); in broadwell_pinctrl_commit()
207 outl(pirq2apic, ®s->pirq_to_ioxapic); in broadwell_pinctrl_commit()
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| A D | pch.c | 138 outl(set1, ACPI_BASE_ADDRESS + GPE0_EN(GPE_31_0)); in enable_all_gpe()
139 outl(set2, ACPI_BASE_ADDRESS + GPE0_EN(GPE_63_32)); in enable_all_gpe()
140 outl(set3, ACPI_BASE_ADDRESS + GPE0_EN(GPE_94_64)); in enable_all_gpe()
141 outl(set4, ACPI_BASE_ADDRESS + GPE0_EN(GPE_STD)); in enable_all_gpe()
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| A D | power_state.c | 35 outl(ps->pm1_cnt & ~(SLP_TYP), ACPI_BASE_ADDRESS + PM1_CNT); in prev_sleep_state()
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| /u-boot/arch/x86/cpu/ |
| A D | pci.c | 23 outl(bdf | (offset & 0xfc) | PCI_CFG_EN, PCI_REG_ADDR); in pci_x86_read_config()
42 outl(bdf | (offset & 0xfc) | PCI_CFG_EN, PCI_REG_ADDR); in pci_x86_write_config()
51 outl(value, PCI_REG_DATA); in pci_x86_write_config()
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| A D | acpi_gpe.c | 48 outl(mask, priv->acpi_base + GPE0_STS(bank)); in acpi_gpe_read_and_clear()
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| /u-boot/drivers/sysreset/ |
| A D | sysreset_x86.c | 51 outl(0x00000000, pm.base + pm.gpio0_en_ofs); in pch_sysreset_power_off()
62 outl(reg32, pm.base + pm.pm1_cnt_ofs); in pch_sysreset_power_off()
66 outl(reg32, pm.base + pm.pm1_cnt_ofs); in pch_sysreset_power_off()
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| /u-boot/arch/x86/include/asm/arch-quark/ |
| A D | quark.h | 211 outl(dev | offset | PCI_CFG_EN, PCI_REG_ADDR); in qrk_pci_read_config_dword()
227 outl(dev | offset | PCI_CFG_EN, PCI_REG_ADDR); in qrk_pci_write_config_dword()
228 outl(value, PCI_REG_DATA); in qrk_pci_write_config_dword()
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| /u-boot/arch/microblaze/include/asm/ |
| A D | io.h | 51 #define outl(x, addr) ((void)writel(x, addr)) macro
77 #define outl_p(val, port) outl((val), (port))
136 outl(*p++, port); in io_outsl()
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| /u-boot/drivers/gpio/ |
| A D | intel_ich6_gpio.c | 73 outl(val, bank->lvl); in _ich6_gpio_set_value()
87 outl(val, base); in _ich6_gpio_set_direction()
91 outl(val, base); in _ich6_gpio_set_direction()
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| /u-boot/arch/xtensa/include/asm/ |
| A D | io.h | 64 #define outl(val, port) writel((val), (u32 *)((unsigned long)(port))) macro
71 #define outl_p(val, port) outl((val), (port))
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| /u-boot/arch/sh/include/asm/ |
| A D | io.h | 86 #define outl(v, p) __raw_writel(cpu_to_le32(v), p) macro
102 #define outl_p(val, port) outl((val), (port))
117 #define out_le32(port, val) outl(val, port)
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| /u-boot/cmd/ |
| A D | io.c | 109 outl((u32) val, addr); in do_io_iow()
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| /u-boot/arch/x86/cpu/qemu/ |
| A D | qemu.c | 51 outl(cpu_to_be32((uintptr_t)dma), FW_DMA_PORT_HIGH); in qemu_x86_fwcfg_read_entry_dma()
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| /u-boot/arch/nios2/include/asm/ |
| A D | io.h | 80 #define outl(val, addr) writel(val,addr) macro
112 while (count--) outl (*p++, port); in outsl()
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| /u-boot/drivers/bios_emulator/include/ |
| A D | x86emu.h | 95 void (X86APIP outl) (X86EMU_pioAddr addr, u32 val);
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| /u-boot/arch/m68k/include/asm/ |
| A D | io.h | 59 #define outl(val, port) out_be32((u32 *)((port)+_IO_BASE), (val)) macro
64 #define outl(val, port) out_le32((u32 *)((port)+_IO_BASE), (val)) macro
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| /u-boot/drivers/bios_emulator/ |
| A D | biosemui.h | 136 #define PM_outpd(port,val) outl(val,port+VIDEO_IO_OFFSET)
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| /u-boot/drivers/bios_emulator/x86emu/ |
| A D | sys.c | 273 sys_outl = funcs->outl; in X86EMU_setupPioFuncs()
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| /u-boot/include/ |
| A D | usbdevice.h | 69 #ifndef outl
70 #define outl(val,p) (*(volatile u32*)(p) = (val)) macro
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