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Searched refs:pci (Results 1 – 25 of 196) sorted by relevance

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/u-boot/drivers/pci/
A Dpcie_dw_ti.c147 void __iomem *base = pci->atu_base; in dw_pcie_writel_ob_unroll()
155 void __iomem *base = pci->atu_base; in dw_pcie_readl_ob_unroll()
442 while (!is_link_up(pci)) { in wait_link_up()
454 if (is_link_up(pci)) { in pcie_dw_ti_pcie_link_up()
468 if (!wait_link_up(pci)) in pcie_dw_ti_pcie_link_up()
638 pci->first_busno = dev_seq(dev); in pcie_dw_ti_probe()
639 pci->dev = dev; in pcie_dw_ti_probe()
641 pcie_dw_setup_host(pci); in pcie_dw_ti_probe()
642 pcie_dw_init_id(pci); in pcie_dw_ti_probe()
668 pci->mem.phys_start, in pcie_dw_ti_probe()
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A Dfsl_pci_init.c88 pci_setup_indirect(hose, (u32)&pci->cfg_addr, (u32)&pci->cfg_data); in fsl_setup_hose()
342 pi = &pci->pit[2]; /* 0xDC0 */ in fsl_pci_init()
344 pi = &pci->pit[3]; /* 0xDE0 */ in fsl_pci_init()
466 (void) in_be32(&pci->pdb_stat); in fsl_pci_init()
489 (void) in_be32(&pci->pdb_stat); in fsl_pci_init()
492 &pci->pdb_stat, in_be32(&pci->pdb_stat)); in fsl_pci_init()
524 in_be32(&pci->pdb_stat); in fsl_pci_init()
605 out_be32(&pci->pedr, 0xffffffff); in fsl_pci_init()
647 volatile ccsr_fsl_pci_t *pci; in fsl_pci_init_port() local
658 if (in_be32(&pci->pme_msg_det)) { in fsl_pci_init_port()
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A DMakefile8 obj-$(CONFIG_PCI) += pci-uclass.o pci_auto.o
11 obj-$(CONFIG_SANDBOX) += pci-emul-uclass.o
14 obj-$(CONFIG_PCI) += pci.o pci_auto_old.o
27 obj-$(CONFIG_PCI_RCAR_GEN2) += pci-rcar-gen2.o
28 obj-$(CONFIG_PCI_RCAR_GEN3) += pci-rcar-gen3.o
34 obj-$(CONFIG_PCI_AARDVARK) += pci-aardvark.o
A Dpcie_dw_rockchip.c314 rk_pcie_dbi_write_enable(pci, true); in rk_pcie_configure()
316 clrsetbits_le32(pci->dbi_base + PCIE_LINK_CAPABILITY, in rk_pcie_configure()
319 clrsetbits_le32(pci->dbi_base + PCIE_LINK_CTL_2, in rk_pcie_configure()
322 rk_pcie_dbi_write_enable(pci, false); in rk_pcie_configure()
346 rk_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_LOWER_BASE, in rk_pcie_prog_outbound_atu_unroll()
348 rk_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_UPPER_BASE, in rk_pcie_prog_outbound_atu_unroll()
350 rk_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_LIMIT, in rk_pcie_prog_outbound_atu_unroll()
352 rk_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_LOWER_TARGET, in rk_pcie_prog_outbound_atu_unroll()
354 rk_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_UPPER_TARGET, in rk_pcie_prog_outbound_atu_unroll()
366 val = rk_pcie_readl_ob_unroll(pci, index, in rk_pcie_prog_outbound_atu_unroll()
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/u-boot/arch/m68k/cpu/mcf5445x/
A Dpci.c47 pci_t *pci = (pci_t *)MMAP_PCI; in pci_mcf5445x_init() local
63 setbits_be32(&pci->gscr, PCI_GSCR_PR); in pci_mcf5445x_init()
65 setbits_be32(&pci->tcr1, PCI_TCR1_P); in pci_mcf5445x_init()
68 out_be32(&pci->iw0btar, in pci_mcf5445x_init()
70 out_be32(&pci->iw1btar, in pci_mcf5445x_init()
72 out_be32(&pci->iw2btar, in pci_mcf5445x_init()
75 out_be32(&pci->iwcr, in pci_mcf5445x_init()
79 out_be32(&pci->icr, 0); in pci_mcf5445x_init()
86 out_be32(&pci->cr2, 0); in pci_mcf5445x_init()
119 out_be32(&pci->tcr2, barEn); in pci_mcf5445x_init()
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/u-boot/arch/m68k/cpu/mcf547x_8x/
A Dpci.c75 pci_t *pci = (pci_t *) MMAP_PCI; in pci_mcf547x_8x_init() local
89 setbits_be32(&pci->gscr, PCI_GSCR_PR); in pci_mcf547x_8x_init()
91 out_be32(&pci->tcr1, PCI_TCR1_P); in pci_mcf547x_8x_init()
94 out_be32(&pci->iw0btar, in pci_mcf547x_8x_init()
96 out_be32(&pci->iw1btar, in pci_mcf547x_8x_init()
98 out_be32(&pci->iw2btar, in pci_mcf547x_8x_init()
101 out_be32(&pci->iwcr, in pci_mcf547x_8x_init()
105 out_be32(&pci->icr, 0); in pci_mcf547x_8x_init()
112 out_be32(&pci->cr2, 0); in pci_mcf547x_8x_init()
124 clrbits_be32(&pci->gscr, PCI_GSCR_PR); in pci_mcf547x_8x_init()
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/u-boot/tools/patman/test/
A D0001-pci-Correct-cast-for-sandbox.patch4 Subject: [RFC 1/2] pci: Correct cast for sandbox
11 cmd/pci.c:152:11: warning: format ‘%llx’ expects argument of type
32 cmd/pci.c | 3 ++-
35 diff --git a/cmd/pci.c b/cmd/pci.c
37 --- a/cmd/pci.c
38 +++ b/cmd/pci.c
A D0000-cover-letter.patch12 pci: Correct cast for sandbox
15 cmd/pci.c | 3 ++-
/u-boot/arch/arm/cpu/armv8/fsl-layerscape/doc/
A DREADME.pci_iommu_extra11 The "pci_iommu_extra" env var or "pci-iommu-extra" device tree property (to be
19 The env var consists of a list of <bdf>,<action> pairs for a certain pci bus
23 pci_iommu_extra = pci@<addr1>,<bdf>,<action>,<bdf>,<action>,
24 pci@<addr2>,<bdf>,<action>,<bdf>,<action>,...
27 <addr> is the base register address of the pci controller for which the
40 pci-iommu-extra = "<bdf>,<action>,<bdf>,<action>,...";
46 => pci 6
55 => setenv pci_iommu_extra pci@0x3800000,6.0.0,vfs=3,6.0.1,vfs=3
59 pci-iommu-extra = "6.0.0,vfs=3,6.0.1,vfs=3";
63 => setenv pci_iommu_extra pci@0x3800000,2.16.0,hp
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/u-boot/doc/driver-model/
A Dpci-info.rst18 pcic: pci@0 {
19 compatible = "sandbox,pci";
51 pci {
54 compatible = "pci-x86";
63 compatible = "pci-bridge";
93 In this example, the root PCI bus node is the "/pci" which matches "pci-x86"
119 pci@1f,0 {
124 pci-emul {
136 The pci-emul node should go outside the pci bus node, since otherwise it will
141 `- * pci@0 @ 05c660c8, 0
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/u-boot/arch/arm/dts/
A Dtegra186-p2771-0000-000.dts17 pci@1,0 {
22 pci@2,0 {
27 pci@3,0 {
A Dtegra186-p2771-0000-500.dts17 pci@1,0 {
22 pci@2,0 {
27 pci@3,0 {
A Darmada-xp-mv78460.dtsi73 device_type = "pci";
117 device_type = "pci";
135 device_type = "pci";
153 device_type = "pci";
171 device_type = "pci";
189 device_type = "pci";
207 device_type = "pci";
225 device_type = "pci";
243 device_type = "pci";
261 device_type = "pci";
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A Darmada-380.dtsi40 device_type = "pci";
62 device_type = "pci";
81 device_type = "pci";
100 device_type = "pci";
/u-boot/arch/sh/dts/
A Dsh7751-r2dplus.dts36 pci@fe200000 {
37 compatible = "renesas,pci-sh7751";
38 device_type = "pci";
/u-boot/arch/x86/dts/
A Dslimbootloader.dts24 pci {
25 compatible = "pci-x86";
A Dqemu-x86_i440fx.dts49 pci {
50 compatible = "pci-x86";
66 intel,pirq-config = "pci";
A Defi-x86_payload.dts37 pci {
38 compatible = "pci-x86";
A Dcoreboot.dts37 pci {
38 compatible = "pci-x86";
/u-boot/doc/device-tree-bindings/pci/
A Dx86-pci.txt15 - pci,no-autoconfig : Don't automatically configure this PCI device at all.
26 pci {
27 compatible = "pci-x86";
45 pci,no-autoconfig;
/u-boot/arch/mips/dts/
A Dimg,boston.dts47 pci0: pci@10000000 {
50 device_type = "pci";
76 pci1: pci@12000000 {
79 device_type = "pci";
105 pci2: pci@14000000 {
107 device_type = "pci";
/u-boot/arch/sandbox/dts/
A Dsandbox64.dts70 pcic: pci@0 {
71 compatible = "sandbox,pci";
72 device_type = "pci";
A Dsandbox.dts75 pcic: pci@0 {
76 compatible = "sandbox,pci";
77 device_type = "pci";
/u-boot/arch/arm/mach-tegra/tegra210/
A Dxusb-padctl.c84 TEGRA210_LANE("pcie-0", 0x028, 12, 0x3, 1, pci),
85 TEGRA210_LANE("pcie-1", 0x028, 14, 0x3, 2, pci),
86 TEGRA210_LANE("pcie-2", 0x028, 16, 0x3, 3, pci),
87 TEGRA210_LANE("pcie-3", 0x028, 18, 0x3, 4, pci),
88 TEGRA210_LANE("pcie-4", 0x028, 20, 0x3, 5, pci),
89 TEGRA210_LANE("pcie-5", 0x028, 22, 0x3, 6, pci),
90 TEGRA210_LANE("pcie-6", 0x028, 24, 0x3, 7, pci),
91 TEGRA210_LANE("sata-0", 0x028, 30, 0x3, 8, pci),
/u-boot/arch/arm/mach-tegra/tegra124/
A Dxusb-padctl.c103 TEGRA124_LANE("pcie-0", 0x134, 16, 0x3, 1, pci),
104 TEGRA124_LANE("pcie-1", 0x134, 18, 0x3, 2, pci),
105 TEGRA124_LANE("pcie-2", 0x134, 20, 0x3, 3, pci),
106 TEGRA124_LANE("pcie-3", 0x134, 22, 0x3, 4, pci),
107 TEGRA124_LANE("pcie-4", 0x134, 24, 0x3, 5, pci),
108 TEGRA124_LANE("sata-0", 0x134, 26, 0x3, 6, pci),

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