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Searched refs:phy_read (Results 1 – 25 of 55) sorted by relevance

123

/u-boot/drivers/net/phy/
A Dgeneric_10g.c40 phy_read(phydev, devad, MDIO_STAT1); in gen10g_startup()
41 reg = phy_read(phydev, devad, MDIO_STAT1); in gen10g_startup()
57 stat2 = phy_read(phydev, mmd, MDIO_STAT2); in gen10g_discover_mmds()
63 devs1 = phy_read(phydev, mmd, MDIO_DEVS1); in gen10g_discover_mmds()
64 devs2 = phy_read(phydev, mmd, MDIO_DEVS2); in gen10g_discover_mmds()
A Dmarvell.c114 val = phy_read(phydev, MDIO_DEVAD_NONE, regnum); in m88e1xxx_phy_extread()
177 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, in m88e1xxx_parse_status()
228 reg = phy_read(phydev, in m88e1111s_config()
244 reg = phy_read(phydev, in m88e1111s_config()
259 reg = phy_read(phydev, in m88e1111s_config()
271 reg = phy_read(phydev, in m88e1111s_config()
277 reg = phy_read(phydev, MDIO_DEVAD_NONE, in m88e1111s_config()
288 reg = phy_read(phydev, MDIO_DEVAD_NONE, in m88e1111s_config()
320 reg = phy_read(phydev, MDIO_DEVAD_NONE, reg_num); in m88e151x_phy_writebits()
369 reg = phy_read(phydev, MDIO_DEVAD_NONE, in m88e151x_config()
[all …]
A Dvitesse.c90 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_CIS82xx_AUX_CONSTAT); in vitesse_parse_status()
150 ret = phy_read(phydev, MDIO_DEVAD_NONE, MII_VSC8601_EPHY_CTL); in vsc8601_add_skew()
178 val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8574_GENERAL19); in vsc8574_config()
195 val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8574_GENERAL18); in vsc8574_config()
198 val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8574_GENERAL18); in vsc8574_config()
223 val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8514_GENERAL19); in vsc8514_config()
238 val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8514_GENERAL18); in vsc8514_config()
241 val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8514_GENERAL18); in vsc8514_config()
251 val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8514_GENERAL23); in vsc8514_config()
275 val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8664_EPHY_CON); in vsc8664_config()
[all …]
A Drealtek.c76 int oldpage = phy_read(phydev, MDIO_DEVAD_NONE, in rtl8211f_phy_extread()
81 val = phy_read(phydev, MDIO_DEVAD_NONE, regnum); in rtl8211f_phy_extread()
90 int oldpage = phy_read(phydev, MDIO_DEVAD_NONE, in rtl8211f_phy_extwrite()
150 reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000); in rtl8211x_config()
164 reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211E_CONFREG); in rtl8211x_config()
174 phy_read(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211x_PHY_INER); in rtl8211x_config()
189 reg = phy_read(phydev, MDIO_DEVAD_NONE, RTL8201F_RMSR); in rtl8201f_config()
220 reg = phy_read(phydev, MDIO_DEVAD_NONE, 0x11); in rtl8211f_config()
232 reg = phy_read(phydev, MDIO_DEVAD_NONE, 0x15); in rtl8211f_config()
280 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, in rtl8211x_parse_status()
[all …]
A Det1011c.c30 ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); in et1011c_config()
46 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, ET1011C_STATUS_REG); in et1011c_parse_status()
57 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, ET1011C_CONFIG_REG); in et1011c_parse_status()
A Daquantia.c207 up_crc = phy_read(phydev, MDIO_MMD_VEND1, MAILBOX_CRC); in aquantia_load_memory()
356 reg = phy_read(phydev, MDIO_MMD_PMAPMD, in aquantia_dts_config()
401 phy_read(phydev, devad, regnum); in aquantia_link_is_up()
402 reg = phy_read(phydev, devad, regnum); in aquantia_link_is_up()
428 fault = phy_read(phydev, MDIO_MMD_VEND1, GLOBAL_FAULT); in aquantia_config()
452 reg_val1 = phy_read(phydev, MDIO_MMD_PHYXS, in aquantia_config()
483 val = phy_read(phydev, MDIO_MMD_PMAPMD, MII_BMCR); in aquantia_config()
509 reg_val1 = phy_read(phydev, MDIO_MMD_PHYXS, in aquantia_config()
579 phy_read(phydev, MDIO_MMD_AN, MDIO_STAT1); in aquantia_startup()
580 reg = phy_read(phydev, MDIO_MMD_AN, MDIO_STAT1); in aquantia_startup()
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A Dphy.c50 adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE); in genphy_config_advert()
83 bmsr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); in genphy_config_advert()
95 adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000); in genphy_config_advert()
157 ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); in genphy_restart_aneg()
232 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); in genphy_update_link()
315 gblpa &= phy_read(phydev, in genphy_parse_link()
337 lpa &= phy_read(phydev, MDIO_DEVAD_NONE, MII_LPA); in genphy_parse_link()
358 estatus = phy_read(phydev, MDIO_DEVAD_NONE, in genphy_parse_link()
396 val = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); in genphy_config()
879 reg = phy_read(phydev, devad, MII_BMCR); in phy_reset()
[all …]
A Dbroadcom.c45 reg_val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_BCM54xx_AUXCNTL); in bcm_phy_write_misc()
69 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_BCM54xx_AUXSTATUS); in bcm54xx_parse_status()
129 return (phy_read(phydev, MDIO_DEVAD_NONE, reg) & 0x8FFF) | 0x8010; in bcm5482_read_wirespeed()
137 reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); in bcm5482_config()
236 val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_BCM54XX_EXP_DATA); in bcm5482_is_serdes()
272 val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_BCM54XX_EXP_DATA); in bcm5482_parse_serdes_sr()
A Dca_phy.c46 data = phy_read(phydev, MDIO_DEVAD_NONE, 19); in __internal_phy_init()
49 data = phy_read(phydev, MDIO_DEVAD_NONE, 19); in __internal_phy_init()
73 val = phy_read(phydev, MDIO_DEVAD_NONE, 27); in __external_phy_init()
A Dmeson-gxl.c62 wol = phy_read(phydev, MDIO_DEVAD_NONE, 0x15); in meson_gxl_startup()
66 lpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_LPA); in meson_gxl_startup()
70 exp = phy_read(phydev, MDIO_DEVAD_NONE, MII_EXPANSION); in meson_gxl_startup()
A Dxilinx_phy.c48 status = phy_read(phydev, MDIO_DEVAD_NONE, MII_LPA); in xilinxphy_startup()
70 int bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); in xilinxphy_startup()
123 temp = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); in xilinxphy_config()
A Dnatsemi.c24 ptp_coc_reg = phy_read(phydev, MDIO_DEVAD_NONE, in dp83630_config()
68 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_DP83865_LANR); in dp83865_parse_status()
121 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); in dp83848_parse_status()
A Dteranetics.c30 phy_hwversion = (phy_read(phydev, 30, 32) >> 12) & 0xf; in tn2020_config()
57 int reg = phy_read(phydev, MDIO_MMD_PHYXS, MDIO_PHYXS_LNSTAT); in tn2020_startup()
A Dmscc.c672 addr = phy_read(phydev, MDIO_DEVAD_NONE, MSCC_PHY_EXT_PHY_CNTL_4); in vsc8574_config_pre_init()
675 reg = phy_read(phydev, MDIO_DEVAD_NONE, MSCC_PHY_ACTIPHY_CNTL); in vsc8574_config_pre_init()
875 addr = phy_read(phydev, MDIO_DEVAD_NONE, MSCC_PHY_EXT_PHY_CNTL_4); in vsc8584_config_pre_init()
878 reg = phy_read(phydev, MDIO_DEVAD_NONE, MSCC_PHY_ACTIPHY_CNTL); in vsc8584_config_pre_init()
1134 reg_val = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); in mscc_phy_soft_reset()
1137 reg_val = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); in mscc_phy_soft_reset()
1140 reg_val = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); in mscc_phy_soft_reset()
1198 reg_val = phy_read(phydev, MDIO_DEVAD_NONE, in vsc8531_vsc8541_mac_config()
1210 reg_val = phy_read(phydev, MDIO_DEVAD_NONE, in vsc8531_vsc8541_mac_config()
1424 addr = phy_read(phydev, MDIO_DEVAD_NONE, MSCC_PHY_EXT_PHY_CNTL_4); in vsc8584_config_init()
[all …]
A Dmicrel_ksz8xxx.c35 ret = phy_read(phydev, MDIO_DEVAD_NONE, MII_KSZPHY_OMSO); in ksz_genconfig_bcastoff()
68 val = phy_read(phydev, MDIO_DEVAD_NONE, MII_KSZ8051_PHY_OMSO); in ksz8051_config()
104 ret = phy_read(phydev, MDIO_DEVAD_NONE, MII_KSZPHY_OMSO); in ksz8081_config()
A Dmicrel_ksz90x1.c54 phy_ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_KSZ90xx_PHY_CTL); in ksz90xx_startup()
247 return phy_read(phydev, MDIO_DEVAD_NONE, MII_KSZ9021_EXTENDED_DATAR); in ksz9021_phy_extended_read()
332 return phy_read(phydev, MDIO_DEVAD_NONE, MII_KSZ9031_MMD_REG_DATA); in ksz9031_phy_extended_read()
372 bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); in ksz9031_config()
481 bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); in ksz9131_config()
/u-boot/board/k+p/kp_imx6q_tpc/
A Dkp_imx6q_tpc.c62 val = phy_read(phydev, MDIO_DEVAD_NONE, 0xe); in ar8031_phy_fixup()
69 val = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e); in ar8031_phy_fixup()
/u-boot/board/spear/x600/
A Dx600.c79 id1 = phy_read(phydev, MDIO_DEVAD_NONE, 2); in board_phy_config()
80 id2 = phy_read(phydev, MDIO_DEVAD_NONE, 3); in board_phy_config()
/u-boot/board/Marvell/db-mv784mp-gp/
A Ddb-mv784mp-gp.c106 reg = phy_read(phydev, MDIO_DEVAD_NONE, 0x4); in board_phy_config()
115 reg = phy_read(phydev, MDIO_DEVAD_NONE, ETH_PHY_CTRL_REG); in board_phy_config()
/u-boot/board/gdsys/a38x/
A Dihs_phys.c35 reg = phy_read(phydev, MDIO_DEVAD_NONE, 16); in ihs_phy_config()
43 reg = phy_read(phydev, MDIO_DEVAD_NONE, 26); in ihs_phy_config()
53 reg = phy_read(phydev, MDIO_DEVAD_NONE, 4); in ihs_phy_config()
56 reg = phy_read(phydev, MDIO_DEVAD_NONE, 9); in ihs_phy_config()
61 reg = phy_read(phydev, MDIO_DEVAD_NONE, 16); in ihs_phy_config()
/u-boot/board/compulab/cl-som-imx7/
A Dcl-som-imx7.c142 val = phy_read(phydev, MDIO_DEVAD_NONE, 0xe); in cl_som_imx7_rgmii_rework()
151 val = phy_read(phydev, MDIO_DEVAD_NONE, 0xe); in cl_som_imx7_rgmii_rework()
158 val = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e); in cl_som_imx7_rgmii_rework()
/u-boot/board/mscc/jr2/
A Djr2.c79 while (phy_read(phydev, 0, 18) & 0x8000) in board_phy_config()
86 while (phy_read(phydev, 0, 18) & 0x8000) in board_phy_config()
/u-boot/board/mscc/luton/
A Dluton.c45 while (phy_read(phydev, 0, 18) & 0x8000) in board_phy_config()
/u-boot/board/mscc/serval/
A Dserval.c38 while (phy_read(phydev, 0, 18) & 0x8000) in board_phy_config()
/u-boot/board/technexion/pico-imx7d/
A Dpico-imx7d.c144 val = phy_read(phydev, MDIO_DEVAD_NONE, 0xe); in board_phy_config()
151 val = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e); in board_phy_config()

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