Searched refs:ref_clock (Results 1 – 8 of 8) sorted by relevance
90 enum ref_clock { enum228 enum ref_clock ref_clock);233 enum ref_clock ref_clock);236 enum ref_clock *ref_clock);238 enum ref_clock ref_clock);
1468 enum ref_clock ref_clock; in hws_power_up_serdes_lanes() local1510 if (ref_clock == REF_CLOCK_UNSUPPORTED) { in hws_power_up_serdes_lanes()1519 serdes_mode, ref_clock)); in hws_power_up_serdes_lanes()1638 enum ref_clock ref_clock; in hws_serdes_get_ref_clock_val() local1650 return ref_clock; in hws_serdes_get_ref_clock_val()1661 return ref_clock; in hws_serdes_get_ref_clock_val()1673 enum serdes_mode serdes_mode, enum ref_clock ref_clock) in serdes_power_up_ctrl() argument2006 enum ref_clock ref_clock) in hws_ref_clock_set() argument2023 switch (ref_clock) { in hws_ref_clock_set()2043 if (ref_clock == REF_CLOCK_25MHZ) { in hws_ref_clock_set()[all …]
51 enum ref_clock ref_clock) in serdes_power_up_ctrl_ext() argument
39 const u64 ref_clock = PLL_REF_CLK; in get_clocks() local45 gd->cpu_clk = ref_clock * FIELD_GET(RST_BOOT_C_MUL, val); in get_clocks()46 gd->bus_clk = ref_clock * FIELD_GET(RST_BOOT_PNR_MUL, val); in get_clocks()
253 u32 ref_clock; in set_mpu_spreadspectrum() local273 ref_clock = V_OSCK / (predivider_n + 1); in set_mpu_spreadspectrum()274 pll_bandwidth = ref_clock / 70; in set_mpu_spreadspectrum()275 mod_freq_divider = ref_clock / (4 * pll_bandwidth); in set_mpu_spreadspectrum()
40 unsigned long ref_clock; member241 return pll->ref_clock; in clk_pllv3_enet_get_rate()289 pll->ref_clock = 500000000; in imx_clk_pllv3()
446 struct ref_clock { struct481 static inline struct ref_clock *to_ref_clk(struct clk *clock) in to_ref_clk()483 return container_of(clock, struct ref_clock, clk); in to_ref_clk()
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