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Searched refs:reg_data (Results 1 – 25 of 27) sorted by relevance

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/u-boot/drivers/phy/marvell/
A Dcomphy_core.h98 u32 reg_data; in reg_set_silent() local
100 reg_data = readl(addr); in reg_set_silent()
101 reg_data &= ~mask; in reg_set_silent()
102 reg_data |= data; in reg_set_silent()
103 writel(reg_data, addr); in reg_set_silent()
117 u16 reg_data; in reg_set_silent16() local
119 reg_data = readw(addr); in reg_set_silent16()
120 reg_data &= ~mask; in reg_set_silent16()
121 reg_data |= data; in reg_set_silent16()
122 writew(reg_data, addr); in reg_set_silent16()
/u-boot/arch/arm/mach-mvebu/serdes/a38x/
A Dseq_exec.c33 u32 unit_base_reg, unit_offset, data, mask, reg_data, reg_addr; in write_op_execute() local
55 reg_data = reg_read(reg_addr); in write_op_execute()
56 reg_data &= (~mask); in write_op_execute()
60 reg_data |= data; in write_op_execute()
61 reg_write(reg_addr, reg_data); in write_op_execute()
64 printf(" - 0x%x\n", reg_data); in write_op_execute()
88 u32 reg_addr, reg_data; in poll_op_execute() local
114 reg_data = reg_read(reg_addr) & mask; in poll_op_execute()
117 } while ((reg_data != data) && (poll_counter < num_of_loops)); in poll_op_execute()
119 if ((poll_counter >= num_of_loops) && (reg_data != data)) { in poll_op_execute()
A Dhigh_speed_env_spec.c1559 u32 reg_data; in serdes_pex_usb3_pipe_delay_w_a() local
1677 u32 reg_data; in serdes_power_up_ctrl() local
1726 reg_data = in serdes_power_up_ctrl()
1735 reg_data); in serdes_power_up_ctrl()
1737 reg_data = in serdes_power_up_ctrl()
1741 reg_data |= 0x2; in serdes_power_up_ctrl()
1743 reg_data); in serdes_power_up_ctrl()
1745 reg_data = in serdes_power_up_ctrl()
1751 reg_data); in serdes_power_up_ctrl()
2089 reg_data |= data1; in hws_ref_clock_set()
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/u-boot/drivers/gpio/
A Dbcm6345_gpio.c19 void __iomem *reg_data; member
26 return !!(readl(priv->reg_data) & BIT(offset)); in bcm6345_gpio_get_value()
35 setbits_32(priv->reg_data, BIT(offset)); in bcm6345_gpio_set_value()
37 clrbits_32(priv->reg_data, BIT(offset)); in bcm6345_gpio_set_value()
97 priv->reg_data = dev_remap_addr_index(dev, 1); in bcm6345_gpio_probe()
98 if (!priv->reg_data) in bcm6345_gpio_probe()
/u-boot/drivers/net/pfe_eth/
A Dpfe_mdio.c25 u32 reg_data; in pfe_write_addr() local
31 reg_data = (EMAC_MII_DATA_TA | phy | devadr | reg_addr); in pfe_write_addr()
33 writel(reg_data, reg_base + EMAC_MII_DATA_REG); in pfe_write_addr()
59 u32 reg_data; in pfe_phy_read() local
75 reg_data = (EMAC_MII_DATA_ST | EMAC_MII_DATA_OP_RD | in pfe_phy_read()
78 reg_data = (EMAC_MII_DATA_OP_CL45_RD | EMAC_MII_DATA_TA | in pfe_phy_read()
81 writel(reg_data, reg_base + EMAC_MII_DATA_REG); in pfe_phy_read()
114 u32 reg_data; in pfe_phy_write() local
129 reg_data = (EMAC_MII_DATA_ST | EMAC_MII_DATA_OP_WR | in pfe_phy_write()
132 reg_data = (EMAC_MII_DATA_OP_CL45_WR | EMAC_MII_DATA_TA | in pfe_phy_write()
[all …]
/u-boot/drivers/spi/
A Dca_sflash.c262 u32 reg_data; in _ca_sflash_read() local
270 *buf++ = reg_data & 0xFF; in _ca_sflash_read()
271 *buf++ = (reg_data >> 8) & 0xFF; in _ca_sflash_read()
276 __func__, reg_data); in _ca_sflash_read()
284 __func__, reg_data); in _ca_sflash_read()
289 *buf++ = reg_data & 0xFF; in _ca_sflash_read()
294 *buf++ = reg_data & 0xFF; in _ca_sflash_read()
298 *buf++ = reg_data & 0xFF; in _ca_sflash_read()
337 u32 reg_data; in _ca_sflash_write() local
342 reg_data = buf[0] in _ca_sflash_write()
[all …]
/u-boot/board/cortina/presidio-asic/
A Dpresidio.c84 unsigned int reg_data, jtag_id; in board_init() local
98 reg_data = readl(0xF3100064); in board_init()
102 reg_data |= (1 << 1); in board_init()
103 writel(reg_data, 0xf3100064); in board_init()
/u-boot/arch/arm/mach-omap2/
A Dvc.c94 int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data) in omap_vc_bypass_send_value() argument
105 reg_data &= PRM_VC_VAL_BYPASS_DATA_MASK; in omap_vc_bypass_send_value()
110 reg_data << PRM_VC_VAL_BYPASS_DATA_SHIFT; in omap_vc_bypass_send_value()
/u-boot/drivers/ddr/marvell/a38x/
A Dddr3_debug.c514 u32 reg_data; in ddr3_tip_print_stability_log() local
572 csindex, &reg_data); in ddr3_tip_print_stability_log()
580 &reg_data); in ddr3_tip_print_stability_log()
584 (reg_data & 0x1f), in ddr3_tip_print_stability_log()
600 &reg_data); in ddr3_tip_print_stability_log()
605 (reg_data & 0x1f), in ddr3_tip_print_stability_log()
613 &reg_data); in ddr3_tip_print_stability_log()
619 &reg_data); in ddr3_tip_print_stability_log()
626 &reg_data); in ddr3_tip_print_stability_log()
638 idx, &reg_data); in ddr3_tip_print_stability_log()
[all …]
A Dddr3_training_ip_engine.c349 reg_data, pup_id; in ddr3_tip_ip_training() local
423 reg_data |= 0xe << 14; in ddr3_tip_ip_training()
425 reg_data |= pup_num << 14; in ddr3_tip_ip_training()
429 reg_data |= (0 << 20); in ddr3_tip_ip_training()
431 reg_data |= (0 << 20); in ddr3_tip_ip_training()
433 reg_data |= (3 << 20); in ddr3_tip_ip_training()
475 reg_data = CTX_PHY_REG(effective_cs); in ddr3_tip_ip_training()
488 reg_data |= (0x6 << 28); in ddr3_tip_ip_training()
491 reg_data | (init_value << 8), in ddr3_tip_ip_training()
879 u32 reg_data, if_id; in ddr3_tip_load_pattern_to_mem() local
[all …]
A Dddr3_training_ip_def.h156 struct reg_data { struct
158 unsigned int reg_data; argument
A Dddr3_training_leveling.c917 reg_data = data_read[0]; in ddr3_tip_dynamic_write_leveling()
919 reg_data = 0; in ddr3_tip_dynamic_write_leveling()
920 if (reg_data != PASS) in ddr3_tip_dynamic_write_leveling()
930 reg_data = data_read[0]; in ddr3_tip_dynamic_write_leveling()
962 reg_data = (reg_data & 0x1f) | in ddr3_tip_dynamic_write_leveling()
1052 reg_data = in ddr3_tip_dynamic_write_leveling()
1060 reg_data = in ddr3_tip_dynamic_write_leveling()
1061 (reg_data & 0x1f) | in ddr3_tip_dynamic_write_leveling()
1063 (((reg_data & 0x1f) + in ddr3_tip_dynamic_write_leveling()
1085 reg_data); in ddr3_tip_dynamic_write_leveling()
[all …]
A Dmv_ddr_plat.h218 u32 reg_data; member
A Dddr3_training_hw_algo.c116 u32 reg_data; in get_valid_win_rx() local
129 &reg_data)); in get_valid_win_rx()
130 res[i] = (reg_data >> RESULT_PHY_RX_OFFS) & 0x1f; in get_valid_win_rx()
/u-boot/drivers/net/phy/
A Dcortina.c131 char reg_data[0x50] = {0}; in cs4340_upload_firmware() local
217 memcpy(reg_data, &line_temp[i], column_cnt - i); in cs4340_upload_firmware()
219 strim(reg_data); in cs4340_upload_firmware()
221 fw_temp.reg_value = (simple_strtoul(reg_data, NULL, 0)) & in cs4340_upload_firmware()
/u-boot/drivers/sound/
A Dwm8994.c293 unsigned short reg_data; in wm8994_hw_params() local
384 if (wm8994_i2c_read(priv, aif1_reg, &reg_data) != 0) { in wm8994_hw_params()
389 if ((channels == 1) && ((reg_data & 0x18) == 0x18)) in wm8994_hw_params()
655 unsigned short reg_data; in wm8994_device_init() local
660 ret = wm8994_i2c_read(priv, WM8994_SOFTWARE_RESET, &reg_data); in wm8994_device_init()
666 if (reg_data == WM8994_ID) { in wm8994_device_init()
675 ret = wm8994_i2c_read(priv, WM8994_CHIP_REVISION, &reg_data); in wm8994_device_init()
680 priv->revision = reg_data; in wm8994_device_init()
/u-boot/drivers/net/
A De1000.c1348 uint32_t reg_data = 0; in e1000_read_mac_addr_from_regs() local
1360 reg_data >>= 16; in e1000_read_mac_addr_from_regs()
1363 tmp = reg_data & 0xffff; in e1000_read_mac_addr_from_regs()
1854 uint32_t reg_data; in e1000_init_hw() local
2021 reg_data &= ~0x00100000; in e1000_init_hw()
2884 uint32_t reg_data; in e1000_copper_link_ggp_setup() local
3241 uint16_t reg_data; in e1000_setup_copper_link() local
3259 reg_data |= 0x3F; in e1000_setup_copper_link()
3275 reg_data = in e1000_setup_copper_link()
4046 uint16_t reg_data; in e1000_configure_kmrn_for_10_100() local
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A Dks8851_mll.c121 u16 reg_data = 0; in ks_read_config() local
124 reg_data = ks_rdreg8(ks, KS_CCR) & 0x00FF; in ks_read_config()
125 reg_data |= ks_rdreg8(ks, KS_CCR + 1) << 8; in ks_read_config()
128 ks->sharedbus = (reg_data & CCR_SHARED) == CCR_SHARED; in ks_read_config()
134 if (reg_data & CCR_8BIT) { in ks_read_config()
137 } else if (reg_data & CCR_16BIT) { in ks_read_config()
A Dmvgbe.c205 u32 reg_data; in stop_queue() local
207 reg_data = readl(qreg); in stop_queue()
209 if (reg_data & 0xFF) { in stop_queue()
211 writel((reg_data << 8), qreg); in stop_queue()
219 reg_data = readl(qreg); in stop_queue()
221 while (reg_data & 0xFF); in stop_queue()
A Dmvpp2.c3799 u32 reg_data; in mvpp2_egress_disable() local
3805 reg_data = (mvpp2_read(port->priv, MVPP2_TXP_SCHED_Q_CMD_REG)) & in mvpp2_egress_disable()
3807 if (reg_data != 0) in mvpp2_egress_disable()
3809 (reg_data << MVPP2_TXP_SCHED_DISQ_OFFSET)); in mvpp2_egress_disable()
3817 reg_data); in mvpp2_egress_disable()
3826 reg_data = mvpp2_read(port->priv, MVPP2_TXP_SCHED_Q_CMD_REG); in mvpp2_egress_disable()
3827 } while (reg_data & MVPP2_TXP_SCHED_ENQ_MASK); in mvpp2_egress_disable()
/u-boot/arch/arm/include/asm/arch-omap4/
A Dsys_proto.h64 int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data);
/u-boot/drivers/power/pmic/
A Drk8xx.c14 static struct reg_data rk817_init_reg[] = {
87 struct reg_data *init_data = NULL; in rk8xx_probe()
/u-boot/arch/arm/include/asm/arch-omap5/
A Dsys_proto.h71 int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data);
/u-boot/include/power/
A Drk8xx_pmic.h217 struct reg_data { struct
/u-boot/arch/arm/include/asm/
A Domap_common.h542 int (*pmic_write)(u8 sa, u8 reg_addr, u8 reg_data);

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