Searched refs:v0 (Results 1 – 25 of 42) sorted by relevance
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| /u-boot/arch/mips/mach-mscc/ |
| A D | lowlevel_init_luton.S | 24 lw v0, MACRO_CTRL_PLL5G_STATUS_PLL5G_STATUS0
25 andi v1, v0, MACRO_CTRL_PLL5G_STATUS_PLL5G_STATUS0_LOCK_STATUS
43 2: lw v0, MACRO_CTRL_PLL5G_STATUS_PLL5G_STATUS0
44 andi v1, v0, MACRO_CTRL_PLL5G_STATUS_PLL5G_STATUS0_LOCK_STATUS
50 1: lw v0, MACRO_CTRL_PLL5G_CFG_PLL5G_CFG0
54 and v0, v0, v1
57 ori v0, v0, MACRO_CTRL_PLL5G_CFG_PLL5G_CFG0_CPU_CLK_DIV_ENC(6)
59 sw v0, MACRO_CTRL_PLL5G_CFG_PLL5G_CFG0
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| A D | lowlevel_init.S | 40 bnez v0, 0b /* Retry on error */
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| /u-boot/arch/mips/include/asm/ |
| A D | regdef.h | 21 #define v0 $2 /* return value */ macro
64 #define v0 $2 /* return value - caller saved */ macro
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| /u-boot/arch/mips/lib/ |
| A D | genex.S | 143 LONG_L v0, PT_STATUS(sp)
145 and v0, v1
146 or v0, a0
147 mtc0 v0, CP0_STATUS
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| A D | cache_init.S | 256 li v0, CONFIG_SYS_ICACHE_SIZE
258 li v0, CONFIG_SYS_DCACHE_SIZE
261 move v0, R_IC_SIZE
263 movn v0, R_DC_SIZE, t1
269 PTR_ADDU a1, a0, v0
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| /u-boot/doc/device-tree-bindings/pwm/ |
| A D | pwm-sifive.txt | 15 PWM v0 as integrated onto the SiFive FU540 chip, and "sifive,pwm0" for the
16 SiFive PWM v0 IP block with no chip integration tweaks.
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| /u-boot/arch/riscv/ |
| A D | Kconfig | 220 bool "SBI v0.1 support"
223 This config allows kernel to use SBI v0.1 APIs. This will be
227 bool "SBI v0.2 support"
230 This config allows kernel to use SBI v0.2 APIs. SBI v0.2 is more
232 interfaces. For example, with SBI v0.2 HSM extension, only a single
236 Choose this option if OpenSBI v0.7 or above release is used together
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| /u-boot/arch/arm/dts/ |
| A D | imx7-colibri-emmc.dts | 25 reg_5v0: regulator-5v0 {
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| A D | imx7-colibri-rawnand.dts | 23 reg_5v0: regulator-5v0 {
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| A D | sun8i-r16-parrot.dts | 246 regulator-name = "vcc-3v0";
295 regulator-name = "vcc-3v0-csi";
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| A D | rk3308-evb.dts | 128 vdd_1v0: vdd-1v0 {
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| A D | sun6i-a31s-sina31s-core.dtsi | 105 regulator-name = "vcc-3v0";
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| A D | sun6i-a31s-yones-toptech-bs1078-v2.dts | 147 regulator-name = "vcc-3v0";
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| A D | sun6i-reference-design-tablet.dtsi | 127 regulator-name = "vcc-3v0";
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| A D | imx6qdl-cubox-i.dtsi | 71 v_5v0: regulator-v-5v0 {
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| A D | sun8i-a33-sinlinx-sina33.dts | 234 regulator-name = "vcc-3v0";
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| A D | sun8i-reference-design-tablet.dtsi | 171 regulator-name = "vcc-3v0";
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| A D | tegra30-apalis.dts | 328 regulator-name = "5v0";
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| A D | sun6i-a31s-primo81.dts | 216 regulator-name = "vcc-3v0";
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| A D | sun6i-a31s-sinovoip-bpi-m2.dts | 228 regulator-name = "vdd-3v0";
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| A D | sun6i-a31-hummingbird.dts | 303 regulator-name = "vcc-3v0";
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| /u-boot/doc/android/ |
| A D | boot-image.rst | 21 * v0: it's called *legacy* boot image header; used in devices launched before
31 v2, v1 and v0 formats are backward compatible.
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| /u-boot/drivers/clk/mvebu/ |
| A D | armada-37xx-periph.c | 367 ulong req_rate, int *v0, int *v1) in find_best_div() argument
379 *v0 = i->val; in find_best_div()
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| /u-boot/ |
| A D | .gitlab-ci.yml | 24 …wget -O - https://github.com/riscv/opensbi/releases/download/v0.8/opensbi-0.8-rv-bin.tar.xz | tar …
28 …wget -O - https://github.com/riscv/opensbi/releases/download/v0.8/opensbi-0.8-rv-bin.tar.xz | tar …
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| A D | .azure-pipelines.yml | 304 …wget -O - https://github.com/riscv/opensbi/releases/download/v0.8/opensbi-0.8-rv-bin.tar.xz | tar …
308 …wget -O - https://github.com/riscv/opensbi/releases/download/v0.8/opensbi-0.8-rv-bin.tar.xz | tar …
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