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Searched refs:val (Results 1 – 25 of 1322) sorted by relevance

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/u-boot/include/bedbug/
A Dregs.h180 #define SET_CR(val) SET_REGISTER( "mtcr %0", val ) argument
182 #define SET_MSR(val) SET_REGISTER( "mtmsr %0", val ) argument
184 #define SET_XER(val) SET_REGISTER( "mtspr 1,%0", val ) argument
186 #define SET_LR(val) SET_REGISTER( "mtspr 8,%0", val ) argument
188 #define SET_CTR(val) SET_REGISTER( "mtspr 9,%0", val ) argument
192 #define SET_DAR(val) SET_REGISTER( "mtspr 19,%0", val ) argument
194 #define SET_DEC(val) SET_REGISTER( "mtspr 22,%0", val ) argument
198 #define SET_SRR1(val) SET_REGISTER( "mtspr 27,%0", val ) argument
200 #define SET_EIE(val) SET_REGISTER( "mtspr 80,%0", val ) argument
202 #define SET_EID(val) SET_REGISTER( "mtspr 81,%0", val ) argument
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/u-boot/arch/x86/include/asm/
A Dcontrol_regs.h24 unsigned long val; in read_cr0() local
27 return val; in read_cr0()
37 unsigned long val; in read_cr2() local
40 return val; in read_cr2()
45 unsigned long val; in read_cr3() local
48 return val; in read_cr3()
53 unsigned long val; in read_cr4() local
56 return val; in read_cr4()
65 asm("mov %%db0, %0" : "=r" (val)); in get_debugreg()
83 val = 0; in get_debugreg()
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A Dmsr.h68 #define DECLARE_ARGS(val, low, high) unsigned long long val argument
69 #define EAX_EDX_VAL(val, low, high) (val) argument
70 #define EAX_EDX_ARGS(val, low, high) "A" (val) argument
71 #define EAX_EDX_RET(val, low, high) "=A" (val) argument
132 u64 val; in msr_clrsetbits_64() local
135 val &= ~clear; in msr_clrsetbits_64()
136 val |= set; in msr_clrsetbits_64()
142 u64 val; in msr_setbits_64() local
145 val |= set; in msr_setbits_64()
151 u64 val; in msr_clrbits_64() local
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/u-boot/arch/microblaze/include/asm/
A Dasm.h9 #define NGET(val, fslnum) \ argument
12 #define GET(val, fslnum) \ argument
18 #define CGET(val, fslnum) \ argument
35 #define MFS(val, reg) \ argument
38 #define MTS(val, reg) \ argument
42 #define R14(val) \ argument
46 #define R17(val) \ argument
53 #define MSRSET(val) \ argument
56 #define MSRCLR(val) \ argument
69 : "d" (val) \
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/u-boot/drivers/usb/phy/
A Domap_usb_phy.c70 u32 val; in omap_usb_dpll_relock() local
75 if (val & PLL_LOCK) in omap_usb_dpll_relock()
83 u32 val; in omap_usb_dpll_lock() local
110 val &= ~PLL_SD_MASK; in omap_usb_dpll_lock()
120 u32 val; in usb3_phy_partial_powerup() local
132 u32 val; in usb_phy_power() local
159 u32 val; in omap_enable_usb3_phy() local
194 u32 reg, val; in omap_enable_usb2_phy2() local
208 val = readl(reg); in omap_enable_usb2_phy2()
209 val |= 0x100; in omap_enable_usb2_phy2()
[all …]
/u-boot/arch/arm/mach-omap2/
A Dpipe3-phy.c89 u32 val; in omap_pipe3_wait_lock() local
95 if (val & PLL_LOCK) in omap_pipe3_wait_lock()
139 val &= ~PLL_SD_MASK; in omap_pipe3_dpll_program()
150 u32 val, rate; in omap_control_phy_power() local
162 val |= rate << in omap_control_phy_power()
176 u32 val; in phy_pipe3_power_on() local
188 val &= ~PLL_IDLE; in phy_pipe3_power_on()
205 u32 val; in phy_pipe3_power_off() local
213 val |= PLL_IDLE; in phy_pipe3_power_off()
220 if ((val & PLL_TICOPWDN) && (val & PLL_LDOPWDN)) in phy_pipe3_power_off()
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/u-boot/arch/mips/include/asm/
A Dmipsregs.h1540 #define write_c0_index(val) __write_32bit_c0_register($0, 0, val) argument
1558 #define write_c0_conf(val) __write_32bit_c0_register($3, 0, val) argument
1584 #define write_c0_wired(val) __write_32bit_c0_register($6, 0, val) argument
1589 #define write_c0_cache(val) __write_32bit_c0_register($7, 0, val) argument
1598 #define write_c0_count(val) __write_32bit_c0_register($9, 0, val) argument
1644 #define write_c0_epc(val) __write_ulong_c0_register($14, 0, val) argument
1670 #define write_c0_maar(val) __write_ulong_c0_register($17, 1, val) argument
1725 #define write_c0_diag(val) __write_32bit_c0_register($22, 0, val) argument
1750 #define write_c0_depc(val) __write_ulong_c0_register($24, 0, val) argument
1781 #define write_c0_ecc(val) __write_32bit_c0_register($26, 0, val) argument
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/u-boot/drivers/net/phy/
A Dmv88e61xx.c233 int val; in mv88e61xx_smi_wait() local
238 if (val >= 0 && (val & SMI_BUSY) == 0) in mv88e61xx_smi_wait()
311 val); in mv88e61xx_reg_write()
342 int val; in mv88e61xx_phy_wait() local
348 if (val >= 0 && (val & SMI_BUSY) == 0) in mv88e61xx_phy_wait()
539 int val; in mv88e61xx_switch_reset() local
584 int val; in mv88e61xx_serdes_init() local
604 int val; in mv88e61xx_port_enable() local
622 int val; in mv88e61xx_port_set_vlan() local
653 int val; in mv88e61xx_read_port_config() local
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/u-boot/board/freescale/mx51evk/
A Dmx51evk.c82 unsigned int val; in power_init() local
97 val &= ~PWGT2SPIEN; in power_init()
109 pmic_reg_read(p, REG_SW_0, &val); in power_init()
110 val = (val & ~SWx_VOLT_MASK) | SWx_1_100V; in power_init()
111 pmic_reg_write(p, REG_SW_0, val); in power_init()
114 pmic_reg_read(p, REG_SW_1, &val); in power_init()
115 val = (val & ~SWx_VOLT_MASK) | SWx_1_250V; in power_init()
120 val = (val & ~SWx_VOLT_MASK) | SWx_1_250V; in power_init()
130 val = (val & ~((SWMODE_MASK << SWMODE1_SHIFT) | in power_init()
138 val = (val & ~((SWMODE_MASK << SWMODE3_SHIFT) | in power_init()
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/u-boot/drivers/usb/ulpi/
A Dulpi.c47 return val; in ulpi_integrity_check()
64 return val; in ulpi_init()
78 u32 val; in ulpi_select_transceiver() local
94 return val; in ulpi_select_transceiver()
97 val = (val & ~ULPI_FC_XCVRSEL_MASK) | tspeed; in ulpi_select_transceiver()
121 if (val) in ulpi_set_vbus_indicator()
133 val = ulpi_write(ulpi_vp, &ulpi->iface_ctrl, val); in ulpi_set_vbus_indicator()
134 if (val) in ulpi_set_vbus_indicator()
151 u32 val; in ulpi_opmode_sel() local
170 val = (val & ~ULPI_FC_OPMODE_MASK) | topmode; in ulpi_opmode_sel()
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/u-boot/arch/arm/mach-uniphier/
A Dmemconf.c18 u32 val = 0; in __uniphier_memconf_init() local
24 val |= SG_MEMCONF_CH0_NUM_1; in __uniphier_memconf_init()
28 val |= SG_MEMCONF_CH0_NUM_2; in __uniphier_memconf_init()
38 val |= SG_MEMCONF_CH0_SZ_64M; in __uniphier_memconf_init()
41 val |= SG_MEMCONF_CH0_SZ_128M; in __uniphier_memconf_init()
44 val |= SG_MEMCONF_CH0_SZ_256M; in __uniphier_memconf_init()
50 val |= SG_MEMCONF_CH0_SZ_1G; in __uniphier_memconf_init()
60 val |= SG_MEMCONF_CH1_NUM_1; in __uniphier_memconf_init()
64 val |= SG_MEMCONF_CH1_NUM_2; in __uniphier_memconf_init()
86 val |= SG_MEMCONF_CH1_SZ_1G; in __uniphier_memconf_init()
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/u-boot/arch/arm/mach-imx/
A Dcache.c16 u32 val; in enable_ca7_smp() local
20 val = (val >> 4); in enable_ca7_smp()
21 val &= 0xf; in enable_ca7_smp()
24 if (val == 0x7) { in enable_ca7_smp()
28 if (val & (1 << 6)) in enable_ca7_smp()
32 val |= (1 << 6); in enable_ca7_smp()
87 unsigned int val, cache_id; in v7_outer_cache_enable() local
104 val = readl(&iomux->gpr[11]); in v7_outer_cache_enable()
119 val |= 0x7000000f; in v7_outer_cache_enable()
134 val &= ~(1 << 30); in v7_outer_cache_enable()
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/u-boot/board/qca/ap143/
A Dap143.c20 u32 val; in board_debug_uart_init() local
28 val = readl(regs + AR71XX_GPIO_REG_OE); in board_debug_uart_init()
29 val |= QCA953X_GPIO(9); in board_debug_uart_init()
30 val &= ~QCA953X_GPIO(10); in board_debug_uart_init()
31 writel(val, regs + AR71XX_GPIO_REG_OE); in board_debug_uart_init()
37 val &= ~QCA953X_GPIO_MUX_MASK(16); in board_debug_uart_init()
45 val &= ~QCA953X_GPIO_MUX_MASK(8); in board_debug_uart_init()
46 val |= QCA953X_GPIO_IN_MUX_UART0_SIN << 8; in board_debug_uart_init()
52 val = readl(regs + AR71XX_GPIO_REG_OUT); in board_debug_uart_init()
53 val |= QCA953X_GPIO(10); in board_debug_uart_init()
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/u-boot/include/linux/
A Diopoll.h33 (val) = op(addr); \
37 (val) = op(addr); \
53 read_poll_timeout(op, addr, val, cond, false, timeout_us)
55 #define readb_poll_timeout(addr, val, cond, timeout_us) \ argument
56 readx_poll_timeout(readb, addr, val, cond, timeout_us)
58 #define readw_poll_timeout(addr, val, cond, timeout_us) \ argument
59 readx_poll_timeout(readw, addr, val, cond, timeout_us)
61 #define readl_poll_timeout(addr, val, cond, timeout_us) \ argument
62 readx_poll_timeout(readl, addr, val, cond, timeout_us)
64 #define readq_poll_timeout(addr, val, cond, timeout_us) \ argument
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/u-boot/board/toradex/apalis_imx6/
A Dpf0100.c40 uchar devid, revid, val; in pmic_init() local
55 if (val & PFUZE100_BIT_OTP_ECCI) { in pmic_init()
119 if (val & PFUZE100_FUSE_POR_M) in pmic_init()
126 if (val & PFUZE100_FUSE_POR_M) in pmic_init()
133 if (val & PFUZE100_FUSE_POR_M) in pmic_init()
151 val = PFUZE100_VGEN1_VAL; in pmic_init()
158 val = PFUZE100_SWBST_VAL; in pmic_init()
173 printf("\t%2x", val); in pmic_init()
189 printf("\t%2x", val); in pmic_init()
205 printf("\t%2x", val); in pmic_init()
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/u-boot/include/dt-bindings/pinctrl/
A Domap.h61 #define OMAP2420_CORE_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0030) (val) argument
62 #define OMAP2430_CORE_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x2030) (val) argument
63 #define OMAP3_CORE1_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x2030) (val) argument
64 #define OMAP3430_CORE2_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x25d8) (val) argument
65 #define OMAP3630_CORE2_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x25a0) (val) argument
66 #define OMAP3_WKUP_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x2a00) (val) argument
67 #define DM814X_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val) argument
68 #define DM816X_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val) argument
69 #define AM33XX_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val) argument
77 #define OMAP4_IOPAD(offset, val) OMAP_PADCONF_OFFSET((offset), 0x0040) (val) argument
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/u-boot/arch/arm/mach-exynos/
A Ddmc_init_ddr3.c37 unsigned int val; in ddr3_mem_ctrl_init() local
140 val |= P0_CMD_EN; in ddr3_mem_ctrl_init()
145 val |= INIT_DESKEW_EN; in ddr3_mem_ctrl_init()
150 val |= P0_CMD_EN; in ddr3_mem_ctrl_init()
151 val |= BYTE_RDLVL_EN; in ddr3_mem_ctrl_init()
165 val |= INIT_DESKEW_EN; in ddr3_mem_ctrl_init()
166 val |= RDLVL_GATE_EN; in ddr3_mem_ctrl_init()
171 val |= P0_CMD_EN; in ddr3_mem_ctrl_init()
172 val |= BYTE_RDLVL_EN; in ddr3_mem_ctrl_init()
173 val |= CTRL_SHGATE; in ddr3_mem_ctrl_init()
[all …]
/u-boot/drivers/usb/dwc3/
A Dti_usb_phy.c139 u32 val; in ti_usb3_dpll_wait_lock() local
142 if (val & PLL_LOCK) in ti_usb3_dpll_wait_lock()
151 u32 val; in ti_usb3_dpll_program() local
162 val &= ~PLL_REGN_MASK; in ti_usb3_dpll_program()
167 val &= ~PLL_SELFREQDCO_MASK; in ti_usb3_dpll_program()
172 val &= ~PLL_REGM_MASK; in ti_usb3_dpll_program()
177 val &= ~PLL_REGM_F_MASK; in ti_usb3_dpll_program()
182 val &= ~PLL_SD_MASK; in ti_usb3_dpll_program()
194 u32 val; in ti_usb2_phy_power() local
230 u32 val; in ti_usb3_phy_power() local
[all …]
/u-boot/board/intel/galileo/
A Dgalileo.c31 val = inl(port); in board_assert_perst()
32 val |= (1 << 0); in board_assert_perst()
33 outl(val, port); in board_assert_perst()
37 val = inl(port); in board_assert_perst()
38 val &= ~(1 << 0); in board_assert_perst()
39 outl(val, port); in board_assert_perst()
43 val = inl(port); in board_assert_perst()
45 outl(val, port); in board_assert_perst()
58 val = inl(port); in board_deassert_perst()
59 val |= (1 << 0); in board_deassert_perst()
[all …]
/u-boot/arch/arm/mach-tegra/
A Dpinmux-common.c162 u32 val; in pinmux_set_func() local
193 u32 val; in pinmux_set_pullupdown() local
208 u32 val; in pinmux_set_tristate() local
236 u32 val; in pinmux_set_io() local
258 u32 val; in pinmux_set_lock() local
285 u32 val; in pinmux_set_od() local
310 u32 val; in pinmux_set_ioreset() local
335 u32 val; in pinmux_set_rcv_sel() local
360 u32 val; in pinmux_set_e_io_hv() local
384 u32 val; in pinmux_set_schmt() local
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/u-boot/drivers/bios_emulator/
A Dbesys.c144 return val; in BE_rdb()
166 return val; in BE_rdw()
188 return val; in BE_rdl()
330 return val; in VGA_inpb()
572 u8 val = 0; in BE_inb() local
601 return val; in BE_inb()
618 u16 val = 0; in BE_inw() local
634 return val; in BE_inw()
651 u32 val = 0; in BE_inl() local
666 return val; in BE_inl()
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/u-boot/arch/mips/mach-mtmips/mt7620/
A Dsysc.c26 u32 val; in mt7620_sysc_read() local
35 *(u32 *)buf = val; in mt7620_sysc_read()
44 u32 val; in mt7620_sysc_write() local
50 val = *(u32 *)buf; in mt7620_sysc_write()
62 u32 val, shift; in mt7620_sysc_ioctl() local
94 val = *(u32 *)buf; in mt7620_sysc_ioctl()
110 val = *(u32 *)buf; in mt7620_sysc_ioctl()
113 val = 0; in mt7620_sysc_ioctl()
123 val = *(u32 *)buf; in mt7620_sysc_ioctl()
126 val = 0; in mt7620_sysc_ioctl()
[all …]
/u-boot/board/egnite/ethernut5/
A Dethernut5_pwrman.c190 int val; in ethernut5_print_celsius() local
196 val /= 256; in ethernut5_print_celsius()
204 int val; in ethernut5_print_voltage() local
209 val += 5; in ethernut5_print_voltage()
212 val++; in ethernut5_print_voltage()
222 u8 val; in do_pwrman() local
244 printf("led %u %u\n", val >> 4, val & 15); in do_pwrman()
248 val <<= 4; in do_pwrman()
264 if (val) { in do_pwrman()
280 val); in do_pwrman()
[all …]
/u-boot/board/toradex/colibri_imx6/
A Dpf0100.c40 uchar devid, revid, val; in pmic_init() local
55 if (val & PFUZE100_BIT_OTP_ECCI) { in pmic_init()
64 if (val & PFUZE100_BITS_ECC_SE1) { in pmic_init()
73 if (val & PFUZE100_BITS_ECC_SE2) { in pmic_init()
119 if (val & PFUZE100_FUSE_POR_M) in pmic_init()
126 if (val & PFUZE100_FUSE_POR_M) in pmic_init()
133 if (val & PFUZE100_FUSE_POR_M) in pmic_init()
158 printf("\t%2x", val); in pmic_init()
174 printf("\t%2x", val); in pmic_init()
190 printf("\t%2x", val); in pmic_init()
[all …]
/u-boot/board/qca/ap152/
A Dap152.c25 u32 val; in board_debug_uart_init() local
33 val = readl(regs + AR71XX_GPIO_REG_OE); in board_debug_uart_init()
34 val |= QCA956X_GPIO(18); in board_debug_uart_init()
35 val &= ~QCA956X_GPIO(22); in board_debug_uart_init()
36 writel(val, regs + AR71XX_GPIO_REG_OE); in board_debug_uart_init()
42 val &= ~QCA956X_GPIO_MUX_MASK(16); in board_debug_uart_init()
50 val &= ~QCA956X_GPIO_MUX_MASK(8); in board_debug_uart_init()
51 val |= QCA956X_GPIO_IN_MUX_UART0_SIN << 8; in board_debug_uart_init()
57 val = readl(regs + AR71XX_GPIO_REG_OUT); in board_debug_uart_init()
58 val |= QCA956X_GPIO(22); in board_debug_uart_init()
[all …]

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