| /u-boot/arch/arm/mach-omap2/omap3/ |
| A D | clock.c | 136 wait_on_value(ST_CORE_CLK, 0, &prcm_base->idlest_ckgen, in dpll3_init_34xx()
190 wait_on_value(ST_CORE_CLK, 1, &prcm_base->idlest_ckgen, in dpll3_init_34xx()
293 wait_on_value(1, 0, &prcm_base->idlest2_ckgen, LDELAY); in dpll5_init_34xx()
304 wait_on_value(1, 1, &prcm_base->idlest2_ckgen, LDELAY); in dpll5_init_34xx()
393 wait_on_value(ST_CORE_CLK, 0, &prcm_base->idlest_ckgen, in dpll3_init_36xx()
440 wait_on_value(ST_CORE_CLK, 1, &prcm_base->idlest_ckgen, in dpll3_init_36xx()
533 wait_on_value(1, 0, &prcm_base->idlest2_ckgen, LDELAY); in dpll5_init_36xx()
542 wait_on_value(1, 1, &prcm_base->idlest2_ckgen, LDELAY); in dpll5_init_36xx()
646 wait_on_value(ST_MPU_CLK, 0, &prcm_base->idlest_pll_mpu, in prcm_init()
658 wait_on_value(ST_MPU_CLK, 1, &prcm_base->idlest_pll_mpu, in prcm_init()
[all …]
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| A D | sdrc.c | 158 wait_on_value(RESETDONE, RESETDONE, &sdrc_base->status, in do_sdrc_init()
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| A D | board.c | 269 wait_on_value(ST_WDT2, 0x20, &prcm_base->idlest_wkup, 5); in watchdog_init()
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| /u-boot/arch/arm/mach-omap2/omap5/ |
| A D | dra7xx_iodelay.c | 32 if (!wait_on_value(PMCTRL_ISOCLK_STATUS_MASK, PMCTRL_ISOCLK_STATUS_MASK, in isolate_io()
45 if (!wait_on_value(PMCTRL_ISOCLK_STATUS_MASK, in isolate_io()
66 if (!wait_on_value(CFG_REG_CALIB_STRT_MASK, CFG_REG_CALIB_END, in calibrate_iodelay()
78 if (!wait_on_value(CFG_REG_ROM_READ_MASK, CFG_REG_ROM_READ_END, in update_delay_mechanism()
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| /u-boot/arch/arm/mach-k3/include/mach/ |
| A D | sys_proto.h | 11 u32 wait_on_value(u32 read_bit_mask, u32 match_value, void *read_addr,
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| /u-boot/arch/arm/cpu/armv7/ |
| A D | syslib.c | 30 u32 wait_on_value(u32 read_bit_mask, u32 match_value, void *read_addr, in wait_on_value() function
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| /u-boot/arch/arm/include/asm/arch-am33xx/ |
| A D | sys_proto.h | 36 u32 wait_on_value(u32, u32, void *, u32);
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| /u-boot/arch/arm/include/asm/arch-omap4/ |
| A D | sys_proto.h | 47 u32 wait_on_value(u32, u32, void *, u32);
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| /u-boot/arch/arm/mach-omap2/ |
| A D | abb.c | 116 if (!wait_on_value(txdone_mask, txdone_mask, (void *)txdone, LDELAY)) in abb_setup()
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| A D | clocks-common.c | 117 if (!wait_on_value(ST_DPLL_CLK_MASK, 0, &dpll_regs->cm_idlest_dpll, in wait_for_bypass()
136 if (!wait_on_value(ST_DPLL_CLK_MASK, ST_DPLL_CLK_MASK, in wait_for_lock()
760 if (!wait_on_value(SHADOW_FREQ_CONFIG1_FREQ_UPDATE_MASK, 0, in freq_update_core()
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| /u-boot/arch/arm/include/asm/arch-omap3/ |
| A D | sys_proto.h | 66 u32 wait_on_value(u32, u32, void *, u32);
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| /u-boot/arch/arm/mach-omap2/am33xx/ |
| A D | clock.c | 45 if (!wait_on_value(ST_DPLL_CLK_MASK, ST_DPLL_CLK_MASK, in wait_for_lock()
62 if (!wait_on_value(ST_DPLL_CLK_MASK, 0, in wait_for_bypass()
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| /u-boot/arch/arm/include/asm/arch-omap5/ |
| A D | sys_proto.h | 52 u32 wait_on_value(u32, u32, void *, u32);
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| /u-boot/drivers/clk/ti/ |
| A D | clk-am3-dpll.c | 95 if (!wait_on_value(ST_DPLL_CLK_MASK, 0, in clk_ti_am3_dpll_set_rate()
115 if (!wait_on_value(ST_DPLL_CLK_MASK, ST_DPLL_CLK_MASK, in clk_ti_am3_dpll_set_rate()
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| /u-boot/drivers/ram/ |
| A D | k3-am654-ddrss.c | 97 if (!wait_on_value(mask, DDR_MODE_NORMAL, in am654_ddrss_dram_wait_for_init_complt()
317 if (!wait_on_value(sts_mask, sts_mask, in __phy_builtin_init_routine()
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