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Searched refs:writeb (Results 1 – 25 of 123) sorted by relevance

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/u-boot/board/astro/mcf5373l/
A Dfpga.c45 writeb(0x00, &gpiop->par_pwm); in altera_pre_fn()
47 writeb(0x01, &gpiop->pddr_timer); in altera_pre_fn()
48 writeb(0x25, &gpiop->pddr_qspi); in altera_pre_fn()
49 writeb(0x0c, &gpiop->pddr_uart); in altera_pre_fn()
50 writeb(0x04, &gpiop->pddr_pwm); in altera_pre_fn()
53 writeb(0x08, &gpiop->ppd_uart); in altera_pre_fn()
54 writeb(0x38, &gpiop->ppd_qspi); in altera_pre_fn()
57 writeb(0xFB, &gpiop->pclrr_uart); in altera_pre_fn()
70 writeb(0x04, &gpiop->ppd_uart); in altera_config_fn()
145 writeb(0x20, &gpiop->ppd_qspi); in altera_abort_fn()
[all …]
A Dmcf5373l.c114 writeb(UART_UCR_RESET_RX, &uart->ucr); in rs_serial_init()
115 writeb(UART_UCR_RESET_TX, &uart->ucr); in rs_serial_init()
116 writeb(UART_UCR_RESET_ERROR, &uart->ucr); in rs_serial_init()
117 writeb(UART_UCR_RESET_MR, &uart->ucr); in rs_serial_init()
120 writeb(0, &uart->uimr); in rs_serial_init()
125 writeb(UART_UMR_BC_8 | UART_UMR_PM_NONE, &uart->umr); in rs_serial_init()
126 writeb(UART_UMR_SB_STOP_BITS_1, &uart->umr); in rs_serial_init()
133 writeb((u8) ((counter & 0xff00) >> 8), &uart->ubg1); in rs_serial_init()
135 writeb((u8) (counter & 0x00ff), &uart->ubg2); in rs_serial_init()
137 writeb(UART_UCR_RX_ENABLED | UART_UCR_TX_ENABLED, &uart->ucr); in rs_serial_init()
[all …]
/u-boot/board/logicpd/omap3som/
A Domap3logic.c115 writeb(0x70, GPMC_NAND_COMMAND_0); in spl_board_prepare_for_linux()
116 writeb(-1, GPMC_NAND_DATA_0); in spl_board_prepare_for_linux()
117 writeb(0x7a, GPMC_NAND_COMMAND_0); in spl_board_prepare_for_linux()
118 writeb(0x00, GPMC_NAND_ADDRESS_0); in spl_board_prepare_for_linux()
119 writeb(0x00, GPMC_NAND_ADDRESS_0); in spl_board_prepare_for_linux()
120 writeb(0x00, GPMC_NAND_ADDRESS_0); in spl_board_prepare_for_linux()
121 writeb(-1, GPMC_NAND_COMMAND_0); in spl_board_prepare_for_linux()
128 writeb(-1, GPMC_NAND_DATA_0); in spl_board_prepare_for_linux()
135 writeb(-1, GPMC_NAND_DATA_0); in spl_board_prepare_for_linux()
137 writeb(-1, GPMC_NAND_DATA_0); in spl_board_prepare_for_linux()
[all …]
/u-boot/drivers/serial/
A Dserial_mcf.c38 writeb(UART_UCR_RESET_RX, &uart->ucr); in mcf_serial_init_common()
39 writeb(UART_UCR_RESET_TX, &uart->ucr); in mcf_serial_init_common()
40 writeb(UART_UCR_RESET_ERROR, &uart->ucr); in mcf_serial_init_common()
41 writeb(UART_UCR_RESET_MR, &uart->ucr); in mcf_serial_init_common()
44 writeb(0, &uart->uimr); in mcf_serial_init_common()
50 writeb(UART_UMR_SB_STOP_BITS_1, &uart->umr); in mcf_serial_init_common()
59 writeb((u8)(counter & 0x00ff), &uart->ubg2); in mcf_serial_init_common()
77 writeb((counter & 0x00ff), &uart->ubg2); in mcf_serial_setbrg_common()
79 writeb(UART_UCR_RESET_RX, &uart->ucr); in mcf_serial_setbrg_common()
80 writeb(UART_UCR_RESET_TX, &uart->ucr); in mcf_serial_setbrg_common()
[all …]
A Dserial_arc.c45 writeb(arc_console_baud & 0xff, &regs->baudl); in arc_serial_setbrg()
46 writeb((arc_console_baud & 0xff00) >> 8, &regs->baudh); in arc_serial_setbrg()
59 writeb(c, &regs->data); in arc_serial_putc()
143 writeb(arc_console_baud & 0xff, &regs->baudl); in _debug_uart_init()
144 writeb((arc_console_baud & 0xff00) >> 8, &regs->baudh); in _debug_uart_init()
154 writeb(c, &regs->data); in _debug_uart_putc()
/u-boot/drivers/ata/
A Dsata_sil3114.c191 writeb (0, port[num].ioaddr.lbal_addr); in set_Feature_cmd()
192 writeb (0, port[num].ioaddr.lbam_addr); in set_Feature_cmd()
193 writeb (0, port[num].ioaddr.lbah_addr); in set_Feature_cmd()
237 writeb (0x00, port[num].ioaddr.lbal_addr); in sil3114_spin_down()
335 writeb (0, port[num].ioaddr.nsect_addr); in check_power_mode()
336 writeb (0, port[num].ioaddr.lbal_addr); in check_power_mode()
337 writeb (0, port[num].ioaddr.lbam_addr); in check_power_mode()
338 writeb (0, port[num].ioaddr.lbah_addr); in check_power_mode()
585 writeb ((blknr >> 24) & 0xFF, in sata_write()
587 writeb ((blknr >> 32) & 0xFF, in sata_write()
[all …]
/u-boot/drivers/usb/musb/
A Dmusb_core.c30 writeb(0, &musbr->intrusbe); in musb_start()
31 writeb(0, &musbr->testmode); in musb_start()
34 writeb(MUSB_POWER_HSENAB, &musbr->power); in musb_start()
43 writeb(devctl | MUSB_DEVCTL_SESSION, &musbr->devctl); in musb_start()
52 writeb(idx, &musbr->dir##fifosz); \
78 writeb(epinfo->epnum, &musbr->index); in musb_configure_ep()
120 writeb(ep, &musbr->index); in write_fifo()
124 writeb(*data++, &musbr->fifox[ep]); in write_fifo()
145 writeb(ep, &musbr->index); in read_fifo()
A Dmusb_hcd.c417 writeb(hub, &musbr->tar[ep].txhubaddr); in config_hub_port()
419 writeb(hub, &musbr->tar[ep].rxhubaddr); in config_hub_port()
838 writeb(dev->devnum, &musbr->faddr); in submit_control_msg()
862 writeb(MUSB_BULK_EP, &musbr->index); in submit_bulk_msg()
903 writeb(type, &musbr->txtype); in submit_bulk_msg()
942 writeb(type, &musbr->rxtype); in submit_bulk_msg()
1029 writeb(power, &musbr->power); in usb_lowlevel_init()
1046 writeb(0, &musbr->devctl); in usb_lowlevel_stop()
1069 writeb(MUSB_INTR_EP, &musbr->index); in submit_int_msg()
1108 writeb(interval, &musbr->rxinterval); in submit_int_msg()
[all …]
/u-boot/board/renesas/lager/
A Dlager_spl.c327 writeb(0x08, qspi_base + 0x00); in spl_init_qspi()
328 writeb(0x00, qspi_base + 0x01); in spl_init_qspi()
329 writeb(0x06, qspi_base + 0x02); in spl_init_qspi()
330 writeb(0x01, qspi_base + 0x0a); in spl_init_qspi()
331 writeb(0x00, qspi_base + 0x0b); in spl_init_qspi()
332 writeb(0x00, qspi_base + 0x0c); in spl_init_qspi()
333 writeb(0x00, qspi_base + 0x0d); in spl_init_qspi()
334 writeb(0x00, qspi_base + 0x0e); in spl_init_qspi()
338 writeb(0xc0, qspi_base + 0x18); in spl_init_qspi()
339 writeb(0x00, qspi_base + 0x18); in spl_init_qspi()
[all …]
/u-boot/drivers/rtc/
A Ds3c24x0_rtc.c32 writeb(readb(&rtc->rtccon) | 0x01, &rtc->rtccon); in SetRTC_Access()
36 writeb(readb(&rtc->rtccon) & ~0x01, &rtc->rtccon); in SetRTC_Access()
129 writeb(sec, &rtc->bcdsec); in rtc_set()
130 writeb(min, &rtc->bcdmin); in rtc_set()
131 writeb(hour, &rtc->bcdhour); in rtc_set()
132 writeb(mday, &rtc->bcddate); in rtc_set()
133 writeb(wday, &rtc->bcdday); in rtc_set()
134 writeb(mon, &rtc->bcdmon); in rtc_set()
135 writeb(year, &rtc->bcdyear); in rtc_set()
147 writeb((readb(&rtc->rtccon) & ~0x06) | 0x08, &rtc->rtccon); in rtc_reset()
[all …]
/u-boot/arch/arm/cpu/arm1136/mx35/
A Dmx35_sdram.c89 writeb(0xda, start_address + ESDCTL_DDR2_EMR2); /* EMRS2 */ in mx3_setup_sdram_bank()
90 writeb(0xda, start_address + ESDCTL_DDR2_EMR3); /* EMRS3 */ in mx3_setup_sdram_bank()
91 writeb(0xda, start_address + ESDCTL_DDR2_EN_DLL); /* Enable DLL */ in mx3_setup_sdram_bank()
92 writeb(0xda, start_address + ESDCTL_DDR2_RESET_DLL); /* Reset DLL */ in mx3_setup_sdram_bank()
107 writeb(0xda, start_address + ESDCTL_DDR2_MR); in mx3_setup_sdram_bank()
108 writeb(0xda, start_address + ESDCTL_DDR2_OCD_DEFAULT); in mx3_setup_sdram_bank()
111 writeb(0xda, start_address + ESDCTL_DDR2_EN_DLL); /* Enable DLL */ in mx3_setup_sdram_bank()
/u-boot/arch/arm/mach-omap2/omap3/
A Dspl_id_nand.c38 writeb(NAND_CMD_RESET, &gpmc_cfg->cs[0].nand_cmd); in identify_nand_chip()
39 writeb(NAND_CMD_STATUS, &gpmc_cfg->cs[0].nand_cmd); in identify_nand_chip()
46 writeb(NAND_CMD_READID, &gpmc_cfg->cs[0].nand_cmd); in identify_nand_chip()
49 writeb(0x0, &gpmc_cfg->cs[0].nand_adr); in identify_nand_chip()
/u-boot/board/renesas/gose/
A Dgose_spl.c339 writeb(0x08, qspi_base + 0x00); in spl_init_qspi()
340 writeb(0x00, qspi_base + 0x01); in spl_init_qspi()
341 writeb(0x06, qspi_base + 0x02); in spl_init_qspi()
342 writeb(0x01, qspi_base + 0x0a); in spl_init_qspi()
343 writeb(0x00, qspi_base + 0x0b); in spl_init_qspi()
344 writeb(0x00, qspi_base + 0x0c); in spl_init_qspi()
345 writeb(0x00, qspi_base + 0x0d); in spl_init_qspi()
346 writeb(0x00, qspi_base + 0x0e); in spl_init_qspi()
350 writeb(0xc0, qspi_base + 0x18); in spl_init_qspi()
351 writeb(0x00, qspi_base + 0x18); in spl_init_qspi()
[all …]
/u-boot/board/renesas/silk/
A Dsilk_spl.c359 writeb(0x08, qspi_base + 0x00); in spl_init_qspi()
360 writeb(0x00, qspi_base + 0x01); in spl_init_qspi()
361 writeb(0x06, qspi_base + 0x02); in spl_init_qspi()
362 writeb(0x01, qspi_base + 0x0a); in spl_init_qspi()
363 writeb(0x00, qspi_base + 0x0b); in spl_init_qspi()
364 writeb(0x00, qspi_base + 0x0c); in spl_init_qspi()
365 writeb(0x00, qspi_base + 0x0d); in spl_init_qspi()
366 writeb(0x00, qspi_base + 0x0e); in spl_init_qspi()
370 writeb(0xc0, qspi_base + 0x18); in spl_init_qspi()
371 writeb(0x00, qspi_base + 0x18); in spl_init_qspi()
[all …]
/u-boot/board/renesas/alt/
A Dalt_spl.c345 writeb(0x08, qspi_base + 0x00); in spl_init_qspi()
346 writeb(0x00, qspi_base + 0x01); in spl_init_qspi()
347 writeb(0x06, qspi_base + 0x02); in spl_init_qspi()
348 writeb(0x01, qspi_base + 0x0a); in spl_init_qspi()
349 writeb(0x00, qspi_base + 0x0b); in spl_init_qspi()
350 writeb(0x00, qspi_base + 0x0c); in spl_init_qspi()
351 writeb(0x00, qspi_base + 0x0d); in spl_init_qspi()
352 writeb(0x00, qspi_base + 0x0e); in spl_init_qspi()
356 writeb(0xc0, qspi_base + 0x18); in spl_init_qspi()
357 writeb(0x00, qspi_base + 0x18); in spl_init_qspi()
[all …]
/u-boot/board/renesas/koelsch/
A Dkoelsch_spl.c334 writeb(0x08, qspi_base + 0x00); in spl_init_qspi()
335 writeb(0x00, qspi_base + 0x01); in spl_init_qspi()
336 writeb(0x06, qspi_base + 0x02); in spl_init_qspi()
337 writeb(0x01, qspi_base + 0x0a); in spl_init_qspi()
338 writeb(0x00, qspi_base + 0x0b); in spl_init_qspi()
339 writeb(0x00, qspi_base + 0x0c); in spl_init_qspi()
340 writeb(0x00, qspi_base + 0x0d); in spl_init_qspi()
341 writeb(0x00, qspi_base + 0x0e); in spl_init_qspi()
345 writeb(0xc0, qspi_base + 0x18); in spl_init_qspi()
346 writeb(0x00, qspi_base + 0x18); in spl_init_qspi()
[all …]
/u-boot/drivers/i2c/
A Dfsl_i2c.c188 writeb(fdr, &base->fdr); /* set bus speed */ in set_i2c_bus_speed()
231 writeb(I2C_CR_MEN | I2C_CR_MSTA, &base->cr); in fsl_i2c_fixup()
241 writeb(0, &base->cr); in fsl_i2c_fixup()
243 writeb(I2C_CR_MSTA | flags, &base->cr); in fsl_i2c_fixup()
257 writeb(I2C_CR_MEN | flags, &base->cr); in fsl_i2c_fixup()
258 writeb(0, &base->sr); in fsl_i2c_fixup()
323 writeb(0x0, &base->sr); in i2c_wait()
354 writeb((dev << 1) | dir, &base->dr); in i2c_write_addr()
368 writeb(data[i], &base->dr); in __i2c_write_data()
444 writeb(I2C_CR_MEN, &base->cr); in __i2c_read()
[all …]
A Dsh_i2c.c115 writeb(iccl & 0xff, &dev->iccl); in sh_i2c_set_addr()
116 writeb(icch & 0xff, &dev->icch); in sh_i2c_set_addr()
123 writeb(icic, &dev->icic); in sh_i2c_set_addr()
129 writeb(chip << 1, &dev->icdr); in sh_i2c_set_addr()
133 writeb(addr, &dev->icdr); in sh_i2c_set_addr()
135 writeb((SH_I2C_ICCR_ICE|SH_I2C_ICCR_RTS), &dev->iccr); in sh_i2c_set_addr()
144 writeb(0, &dev->icsr); in sh_i2c_finish()
156 writeb(val, &dev->icdr); in sh_i2c_raw_write()
187 writeb(chip << 1 | 0x01, &dev->icdr); in sh_i2c_raw_read()
191 writeb((SH_I2C_ICCR_ICE|SH_I2C_ICCR_SCP), &dev->iccr); in sh_i2c_raw_read()
[all …]
A Drcar_iic.c96 writeb(priv->iccl, priv->base + RCAR_IIC_ICCL); in rcar_iic_set_addr()
97 writeb(priv->icch, priv->base + RCAR_IIC_ICCH); in rcar_iic_set_addr()
98 writeb(RCAR_IC_TACK, priv->base + RCAR_IIC_ICIC); in rcar_iic_set_addr()
100 writeb(RCAR_IIC_ICCR_ICE | RCAR_IIC_ICCR_RTS | RCAR_IIC_ICCR_BUSY, in rcar_iic_set_addr()
105 writeb(chip << 1 | read, priv->base + RCAR_IIC_ICDR); in rcar_iic_set_addr()
113 writeb(0, priv->base + RCAR_IIC_ICSR); in rcar_iic_finish()
127 writeb(RCAR_IIC_ICCR_ICE | RCAR_IIC_ICCR_SCP, in rcar_iic_read_common()
137 writeb(RCAR_IIC_ICCR_ICE | RCAR_IIC_ICCR_RACK, in rcar_iic_read_common()
161 writeb(msg->buf[i], priv->base + RCAR_IIC_ICDR); in rcar_iic_write_common()
167 writeb(RCAR_IIC_ICCR_ICE | RCAR_IIC_ICCR_RTS, in rcar_iic_write_common()
[all …]
A Dmxc_i2c.c192 writeb(idx, base + (IFDR << reg_shift)); in bus_i2c_set_bus_speed()
196 writeb(0, base + (I2SR << reg_shift)); in bus_i2c_set_bus_speed()
216 writeb(sr | I2SR_IAL, base + in wait_for_sr_state()
219 writeb(sr & ~I2SR_IAL, base + in wait_for_sr_state()
246 writeb(byte, base + (I2DR << reg_shift)); in tx_byte()
277 writeb(temp, base + (I2CR << reg_shift)); in i2c_imx_stop()
321 writeb(temp, base + (I2CR << reg_shift)); in i2c_init_transfer_()
328 writeb(temp, base + (I2CR << reg_shift)); in i2c_init_transfer_()
504 writeb(0, base + (I2SR << reg_shift)); in i2c_early_init_f()
587 writeb(temp, base + (I2CR << reg_shift)); in i2c_read_data()
[all …]
/u-boot/drivers/watchdog/
A Dulp_wdog.c69 writeb(val, &wdog->cs2); in hw_watchdog_init()
74 writeb(WDG_LPO_CLK, &wdog->cs2);/* setting 1-kHz clock source */ in hw_watchdog_init()
75 writeb((WDGCS1_WDGE | WDGCS1_WDGUPDATE), &wdog->cs1);/* enable counter running */ in hw_watchdog_init()
90 writeb(WDG_LPO_CLK, &wdog->cs2);/* setting 1-kHz clock source */ in reset_cpu()
91 writeb(WDGCS1_WDGE, &wdog->cs1);/* enable counter running */ in reset_cpu()
/u-boot/board/freescale/s32v234evb/
A Dclock.c248 writeb(MC_ME_PCTLn_RUNPCm(0), MC_ME_PCTL58); in enable_modules_clock()
250 writeb(MC_ME_PCTLn_RUNPCm(0), MC_ME_PCTL170); in enable_modules_clock()
252 writeb(MC_ME_PCTLn_RUNPCm(0), MC_ME_PCTL83); in enable_modules_clock()
254 writeb(MC_ME_PCTLn_RUNPCm(0), MC_ME_PCTL188); in enable_modules_clock()
256 writeb(MC_ME_PCTLn_RUNPCm(0), MC_ME_PCTL50); in enable_modules_clock()
258 writeb(MC_ME_PCTLn_RUNPCm(0), MC_ME_PCTL93); in enable_modules_clock()
260 writeb(MC_ME_PCTLn_RUNPCm(0), MC_ME_PCTL81); in enable_modules_clock()
262 writeb(MC_ME_PCTLn_RUNPCm(0), MC_ME_PCTL184); in enable_modules_clock()
264 writeb(MC_ME_PCTLn_RUNPCm(0), MC_ME_PCTL186); in enable_modules_clock()
266 writeb(MC_ME_PCTLn_RUNPCm(0), MC_ME_PCTL54); in enable_modules_clock()
[all …]
/u-boot/board/renesas/porter/
A Dporter_spl.c422 writeb(0x08, qspi_base + 0x00); in spl_init_qspi()
423 writeb(0x00, qspi_base + 0x01); in spl_init_qspi()
424 writeb(0x06, qspi_base + 0x02); in spl_init_qspi()
425 writeb(0x01, qspi_base + 0x0a); in spl_init_qspi()
426 writeb(0x00, qspi_base + 0x0b); in spl_init_qspi()
427 writeb(0x00, qspi_base + 0x0c); in spl_init_qspi()
428 writeb(0x00, qspi_base + 0x0d); in spl_init_qspi()
429 writeb(0x00, qspi_base + 0x0e); in spl_init_qspi()
433 writeb(0xc0, qspi_base + 0x18); in spl_init_qspi()
434 writeb(0x00, qspi_base + 0x18); in spl_init_qspi()
[all …]
/u-boot/board/renesas/stout/
A Dstout_spl.c408 writeb(0x08, qspi_base + 0x00); in spl_init_qspi()
409 writeb(0x00, qspi_base + 0x01); in spl_init_qspi()
410 writeb(0x06, qspi_base + 0x02); in spl_init_qspi()
411 writeb(0x01, qspi_base + 0x0a); in spl_init_qspi()
412 writeb(0x00, qspi_base + 0x0b); in spl_init_qspi()
413 writeb(0x00, qspi_base + 0x0c); in spl_init_qspi()
414 writeb(0x00, qspi_base + 0x0d); in spl_init_qspi()
415 writeb(0x00, qspi_base + 0x0e); in spl_init_qspi()
419 writeb(0xc0, qspi_base + 0x18); in spl_init_qspi()
420 writeb(0x00, qspi_base + 0x18); in spl_init_qspi()
[all …]
/u-boot/drivers/spi/
A Dsh_qspi.c81 writeb(SPCR_MSTR, &ss->regs->spcr); in sh_qspi_init()
84 writeb(0x00, &ss->regs->sslp); in sh_qspi_init()
90 writeb(0x01, &ss->regs->spbr); in sh_qspi_init()
93 writeb(0x00, &ss->regs->spdcr); in sh_qspi_init()
96 writeb(0x00, &ss->regs->spckd); in sh_qspi_init()
99 writeb(0x00, &ss->regs->sslnd); in sh_qspi_init()
102 writeb(0x00, &ss->regs->spnd); in sh_qspi_init()
114 writeb(0x00, &ss->regs->spscr); in sh_qspi_init()
123 writeb(SPCR_MSTR, &ss->regs->spcr); in sh_qspi_cs_activate()
135 writeb(0x00, &ss->regs->spscr); in sh_qspi_cs_activate()
[all …]

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