Searched refs:MSR_IA32_MTRR_PHYSMASK (Results 1 – 5 of 5) sorted by relevance
| /xen/xen/arch/x86/cpu/mtrr/ |
| A D | generic.c | 35 rdmsrl(MSR_IA32_MTRR_PHYSMASK(index), vr->mask); in get_mtrr_var_range()
317 rdmsrl(MSR_IA32_MTRR_PHYSMASK(reg), _mask); in generic_get_mtrr()
380 rdmsrl(MSR_IA32_MTRR_PHYSMASK(index), msr_content); in set_mtrr_var_ranges()
392 mtrr_wrmsr(MSR_IA32_MTRR_PHYSMASK(index), vr->mask); in set_mtrr_var_ranges()
550 mtrr_wrmsr(MSR_IA32_MTRR_PHYSMASK(reg), 0); in generic_set_mtrr()
562 mtrr_wrmsr(MSR_IA32_MTRR_PHYSMASK(reg), vr->mask); in generic_set_mtrr()
|
| /xen/xen/arch/x86/hvm/ |
| A D | mtrr.c | 172 mtrr_var_range_msr_set(d, m, MSR_IA32_MTRR_PHYSMASK(i), in hvm_vcpu_cacheattr_init()
770 MSR_IA32_MTRR_PHYSMASK(i), in hvm_load_mtrr_msr()
|
| A D | hvm.c | 3542 case MSR_IA32_MTRR_PHYSBASE(0)...MSR_IA32_MTRR_PHYSMASK(MTRR_VCNT_MAX - 1): in hvm_msr_read_intercept()
3685 case MSR_IA32_MTRR_PHYSBASE(0)...MSR_IA32_MTRR_PHYSMASK(MTRR_VCNT_MAX - 1): in hvm_msr_write_intercept()
|
| /xen/xen/include/asm-x86/ |
| A D | msr-index.h | 237 #define MSR_IA32_MTRR_PHYSMASK(n) (0x00000201 + 2 * (n)) macro
|
| /xen/xen/arch/x86/ |
| A D | e820.c | 472 rdmsrl(MSR_IA32_MTRR_PHYSMASK(i), mask); in mtrr_top_of_ram()
|
Completed in 803 milliseconds