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Searched refs:interrupts (Results 1 – 18 of 18) sorted by relevance

/xen/docs/misc/
A Dvtd-pi.txt7 VT-d posted-interrupts: posted-interrupts support in root-complex side
8 CPU-side posted-interrupts: posted-interrupts support in CPU side
40 VT-d Posted-interrupt is a more enhanced method to handle interrupts
47 - Direct delivery of external interrupts to running vCPUs without VMM
120 interrupts recorded in the posted-interrupt descriptor.
254 - Clear 'SN' to accept posted-interrupts.
260 - Clear 'SN' to accept posted-interrupts
262 - Set 'SN' to suppress non-urgent interrupts
263 (Currently, we only support non-urgent interrupts)
312 'intpost' for posted-interrupts.
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A Dpvh.pandoc82 functions, like posted interrupts. This implies that PVH guests with physical
84 the delivery of interrupts from those devices, using the same interfaces that
91 event channels. Delivery of those interrupts can be configured in the same way
A Dcrashdb.txt49 As soon as you reach the debugger, we disable interrupts, the
A Dxen-command-line.pandoc1307 interrupts which a device is attempting to access.
1346 be configured to deliver interrupts from assigned PCI devices directly
1391 impersonate each other as far as interrupts as concerned (see XSA-36), but
1498 Specifies the number of interrupts to be use for pin (IO-APIC or legacy PIC)
1499 based interrupts. Any higher IRQs will be available for use via PCI MSI.
1504 Specifies the number of ARM GICv3 LPI interrupts to allocate on the host,
1508 Defaults to 20 bits (to cover at most 1048576 interrupts).
/xen/docs/admin-guide/
A Dintroduction.rst25 interrupts.
28 (virtual interrupts), grant tables (shared memory), on which a lot of higher
/xen/docs/misc/arm/
A Dpassthrough.txt40 interrupts = <0 80 4 0 81 4 0 82 4>;
69 Please refer to your platform docs for the MMIO ranges and interrupts.
72 recommended). You can read about the "interrupts" property format in the
76 the "interrupts" property format is the same: the first cell is the
174 interrupts = <0 63 0x4 0 63 0x4>;
/xen/docs/misc/arm/device-tree/
A Dguest.txt16 - interrupts: the interrupt used by Xen to inject event notifications.
46 interrupts = <1 15 0xf08>;
/xen/xen/xsm/flask/policy/
A Daccess_vectors440 # For GSI interrupts, the IRQ's label is indexed by the IRQ number
441 # For MSI interrupts, the label of the PCI device is used
/xen/xen/arch/x86/x86_64/compat/
A Dentry.S33 cli # tests must not race interrupts
/xen/docs/man/
A Dxl.cfg.5.pod.in1332 Limit the guest to using at most N event channels (PV interrupts).
2173 reduce guest interrupts. Enabling this option can reduce power
2186 correct delivery time for interrupts that have been missed due to
2192 No delay for missed ticks. As above, missed interrupts are delivered,
2198 No missed interrupts are held pending. Instead, to ensure ticks are
2205 One missed tick pending. Missed interrupts are collapsed
2299 using APICv posted interrupts.
2663 correct delivery time for interrupts that have been missed due to
2669 No delay for missed ticks. As above, missed interrupts are delivered,
2675 No missed interrupts are held pending. Instead, to ensure ticks are
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A Dxen-vtpmmgr.7.pod153 The irq of the hardware TPM if using interrupts. A value of
155 interrupts and uses polling (default 0).
/xen/xen/arch/x86/x86_64/
A Dentry.S47 cli # tests must not race interrupts
725 testb $3,UREGS_cs(%rsp) # interrupts disabled outside Xen?
/xen/xen/include/acpi/
A Dactbl2.h669 u64 interrupts[1]; /* Interrupt array */ member
/xen/tools/firmware/vgabios/
A DREADME74 - Ralf Brown's interrupts list avalaible at
/xen/tools/xentrace/
A Dxenalyze.c1390 int vector, interrupts, interrupts_wanting_tsc; member
3732 if(h->w2h.interrupts) in hvm_inj_virq_process()
3734 h->w2h.interrupts); in hvm_inj_virq_process()
3752 h->w2h.interrupts++; in hvm_inj_virq_process()
7060 && v->hvm.w2h.interrupts ) { in sched_runstate_process()
7080 if(v->hvm.w2h.interrupts==1) in sched_runstate_process()
7094 v->hvm.w2h.interrupts = 0; in sched_runstate_process()
8750 v->hvm.w2h.interrupts=0; in lose_vcpu()
/xen/docs/designs/
A Dnon-cooperative-migration.md177 Event channels are essentially the para-virtual equivalent of interrupts.
/xen/tools/firmware/rombios/
A Drombios.c3031 sti ;; enable higher priority interrupts
3180 sti ;; enable higher priority interrupts
3331 sti ;; enable higher priority interrupts
6668 sti ;; enable higher priority interrupts
6808 sti ;; enable higher priority interrupts
10856 ;; set all interrupts to default handler
10858 mov cx, #0x0100 ;; counter (256 interrupts)
11092 sti ;; enable interrupts
/xen/stubdom/
A Dlwip.patch-cvs1765 + * enabling interrupts often, which can be slow! Also, on low memory, mem_malloc

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