| /linux/drivers/net/ethernet/chelsio/cxgb4/ |
| A D | t4_hw.c | 97 t4_write_reg(adapter, addr, v | val); in t4_set_reg_field()
118 t4_write_reg(adap, addr_reg, start_idx); in t4_read_indirect()
142 t4_write_reg(adap, data_reg, *vals++); in t4_write_indirect()
404 t4_write_reg(adap, ctl_reg, 0); in t4_wr_mbox_meat_timeout()
418 t4_write_reg(adap, ctl_reg, 0); in t4_wr_mbox_meat_timeout()
553 t4_write_reg(adap, in t4_memory_update_win()
592 t4_write_reg(adap, addr, in t4_memory_rw_residual()
814 t4_write_reg(adap, in t4_setup_memwin()
4874 t4_write_reg(adapter, addr, v); in mem_intr_handler()
5742 t4_write_reg(adap, TP_MTU_TABLE_A, in t4_read_mtu_tbl()
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| A D | cxgb4_main.c | 961 t4_write_reg(adap, MYPF_REG(SGE_PF_GTS_A), in cxgb4_enable_rx()
1123 t4_write_reg(adap, is_t4(adap->params.chip) ? in setup_sge_queues()
3749 t4_write_reg(adapter, MPS_RX_VXLAN_TYPE_A, 0); in cxgb_udp_tunnel_unset_port()
3792 t4_write_reg(adapter, MPS_RX_VXLAN_TYPE_A, in cxgb_udp_tunnel_set_port()
3797 t4_write_reg(adapter, MPS_RX_GENEVE_TYPE_A, in cxgb_udp_tunnel_set_port()
3968 t4_write_reg(adap, in setup_memwin_rdma()
3971 t4_write_reg(adap, in setup_memwin_rdma()
4225 t4_write_reg(adap, TP_SHIFT_CNT_A, 0x64f8849); in adap_init1()
4233 t4_write_reg(adap, TP_TX_MOD_QUEUE_REQ_MAP_A, in adap_init1()
4247 t4_write_reg(adap, TP_TX_MOD_QUEUE_WEIGHT0_A, in adap_init1()
[all …]
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| A D | cxgb4_debugfs.c | 807 t4_write_reg(adap, PM_RX_STAT_CONFIG_A, 0); in pm_stats_clear()
808 t4_write_reg(adap, PM_TX_STAT_CONFIG_A, 0); in pm_stats_clear()
1449 t4_write_reg(adap, MPS_TRC_CFG_A, TRC_RSS_ENABLE); in mps_trc_write()
1451 t4_write_reg(adap, MPS_TRC_CFG_A, TRC_RSS_DISABLE); in mps_trc_write()
1470 t4_write_reg(adap, MPS_T5_TRC_RSS_CONTROL_A, j); in mps_trc_write()
1476 t4_write_reg(adap, MPS_TRC_RSS_CONTROL_A, j); in mps_trc_write()
1479 t4_write_reg(adap, in mps_trc_write()
1483 t4_write_reg(adap, in mps_trc_write()
1487 t4_write_reg(adap, in mps_trc_write()
1719 t4_write_reg(adap, MPS_CLS_TCAM_DATA2_CTL_A, ctl); in mps_tcam_show()
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| A D | cudbg_lib.c | 1048 t4_write_reg(padap, CIM_QUEUE_CONFIG_REF_A, OBQSELECT_F | in cudbg_cim_obq_size()
1784 t4_write_reg(padap, qbase->reg_addr, func); in cudbg_read_sge_qbase_indirect_reg()
2560 t4_write_reg(padap, MPS_CLS_TCAM_DATA2_CTL_A, ctl); in cudbg_collect_tcam_index()
2585 t4_write_reg(padap, MPS_CLS_TCAM_DATA2_CTL_A, ctl); in cudbg_collect_tcam_index()
2755 t4_write_reg(padap, LE_DB_DBGI_REQ_DATA_A + (i << 2), 0); in cudbg_read_tid()
2759 t4_write_reg(padap, LE_DB_DBGI_REQ_TCAM_CMD_A, val); in cudbg_read_tid()
2763 t4_write_reg(padap, LE_DB_DBGI_CONFIG_A, val); in cudbg_read_tid()
3058 t4_write_reg(padap, ULP_TX_ASIC_DEBUG_CTRL_A, 0x1); in cudbg_collect_ulptx_la()
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| A D | sge.c | 499 t4_write_reg(adap, MYPF_REG(SGE_PF_KDOORBELL_A), in ring_fl_db()
1044 t4_write_reg(adap, MYPF_REG(SGE_PF_KDOORBELL_A), in cxgb4_ring_tx_db()
4025 t4_write_reg(q->adap, MYPF_REG(SGE_PF_GTS_A), in napi_rx_handler()
4187 t4_write_reg(adap, MYPF_REG(SGE_PF_GTS_A), in process_intrq()
4221 t4_write_reg(adap, MYPF_REG(PCIE_PF_CLI_A), 0); in t4_intr_intx()
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| A D | cxgb4.h | 1508 static inline void t4_write_reg(struct adapter *adap, u32 reg_addr, u32 val) in t4_write_reg() function
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| /linux/drivers/net/ethernet/chelsio/cxgb4vf/ |
| A D | adapter.h | 443 static inline void t4_write_reg(struct adapter *adapter, u32 reg_addr, u32 val) in t4_write_reg() function
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| A D | sge.c | 549 t4_write_reg(adapter, in ring_fl_db()
978 t4_write_reg(adapter, T4VF_SGE_BASE_ADDR + SGE_VF_KDOORBELL, in ring_tx_db()
1910 t4_write_reg(rspq->adapter, in napi_rx_handler()
2013 t4_write_reg(adapter, T4VF_SGE_BASE_ADDR + SGE_VF_GTS, in process_intrq()
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| A D | t4vf_hw.c | 241 t4_write_reg(adapter, mbox_ctl, in t4vf_wr_mbox_core()
270 t4_write_reg(adapter, mbox_ctl, in t4vf_wr_mbox_core()
295 t4_write_reg(adapter, mbox_ctl, in t4vf_wr_mbox_core()
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| A D | cxgb4vf_main.c | 441 t4_write_reg(rspq->adapter, T4VF_SGE_BASE_ADDR + SGE_VF_GTS, in qenable()
464 t4_write_reg(adapter, T4VF_SGE_BASE_ADDR + SGE_VF_GTS, in enable_rx()
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