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/linux/fs/unicode/
A Dutf8data.h_shipped618 0x0b,0x10,0x07,0x10,0xff,0xd4,0xad,0x00,0x10,0x00,0x10,0x07,0x10,0xff,0xd4,0xaf,
2027 0x10,0x04,0x04,0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x92,0x0c,0x91,0x08,0x10,0x04,
2076 0x10,0x04,0x10,0xe6,0x10,0xdc,0x10,0xdc,0xd2,0x0c,0x51,0x04,0x10,0xdc,0x10,0x04,
2077 0x10,0xdc,0x10,0xe6,0xd1,0x08,0x10,0x04,0x10,0xe6,0x10,0xdc,0x10,0x04,0x10,0x00,
2126 0x10,0xe6,0xd3,0x10,0x52,0x04,0x10,0xe6,0x51,0x04,0x10,0xe6,0x10,0x04,0x13,0xe8,
3138 0x91,0x08,0x10,0x04,0x10,0xdc,0x10,0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x53,0x04,
3262 0x00,0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x93,0x10,0x52,0x04,0x10,0x00,
3265 0x10,0x00,0x10,0x04,0x00,0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x54,0x04,0x10,0x00,
3274 0x53,0x04,0x10,0x00,0x92,0x10,0xd1,0x08,0x10,0x04,0x10,0x00,0x10,0x07,0x10,0x04,
3315 0x04,0x10,0x00,0x52,0x04,0x10,0x00,0x51,0x04,0x10,0x00,0x10,0x04,0x10,0x00,0x10,
[all …]
/linux/arch/arm/boot/dts/
A Dimx6qdl-skov-revc-lt2.dtsi70 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
71 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
72 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
73 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
74 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
75 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
76 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
77 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
78 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
79 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
[all …]
A Dimx6dl-skov-revc-lt6.dts77 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
78 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
79 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
80 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
81 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
82 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
83 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
84 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
85 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
86 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
[all …]
A Dimx6q-skov-revc-lt6.dts99 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
100 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
101 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
102 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
103 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
104 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
105 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
106 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
107 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
108 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
[all …]
A Dam335x-pocketbeagle.dts221 pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>;
222 pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>;
230 pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>;
231 pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>;
239 pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>;
240 pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>;
248 pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>;
249 pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>;
257 pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>;
258 pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>;
[all …]
A Dimx6qdl-aristainetos.dtsi296 MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x10
324 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
325 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
326 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
328 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
329 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
330 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
331 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
332 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
333 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
[all …]
A Dimx6qdl-tx6.dtsi395 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
396 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
397 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
398 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
400 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
401 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
402 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
403 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
404 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
405 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
[all …]
A Dimx6q-kp.dtsi287 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
288 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
289 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
290 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
291 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
292 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
293 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
294 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
295 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
296 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
[all …]
A Dimx6ul-tx6ul.dtsi626 MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x10
627 MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x10
628 MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x10
629 MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x10
630 MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x10
631 MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x10
632 MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x10
633 MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x10
634 MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x10
635 MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x10
[all …]
A Dimx6ul-tx6ul-mainboard.dts207 MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x10
208 MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x10
209 MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x10
210 MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x10
211 MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x10
212 MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x10
214 MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x10
215 MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x10
216 MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x10
217 MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x10
[all …]
A Dimx6dl-mamoj.dts402 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
406 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
407 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
408 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
409 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
410 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
411 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
412 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
413 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10
414 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10
[all …]
A Dimx6qdl-pico.dtsi478 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
479 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
480 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
481 MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04 0x10
482 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
483 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
484 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
485 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
486 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
487 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
[all …]
A Dimx6qdl-nitrogen6x.dtsi460 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
461 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
462 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
463 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
464 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
465 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
466 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
467 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
468 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
469 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
[all …]
A Dimx6dl-yapp4-common.dtsi422 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
423 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
424 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
425 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
426 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
427 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
428 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
429 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
430 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
431 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10
[all …]
A Dimx6qdl-nitrogen6_som2.dtsi442 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
443 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
444 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
445 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
446 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
447 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
448 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
449 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
450 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
451 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
[all …]
A Dimx6qdl-emcon.dtsi577 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
578 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
579 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
580 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
581 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
582 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
583 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
584 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
585 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
586 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
[all …]
A Dimx6qdl-nitrogen6_max.dtsi539 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
540 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
541 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
542 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
543 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
544 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
545 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
546 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
547 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
548 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
[all …]
A Dimx6qdl-sabrelite.dtsi554 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
555 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
556 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
557 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
558 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
559 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
560 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
561 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
562 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
563 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
[all …]
A Dtegra30-cpu-opp.dtsi146 <0x10 0x0080>, <0x02 0x0100>,
148 <0x10 0x0100>;
163 <0x10 0x0080>, <0x08 0x0100>,
164 <0x10 0x0100>, <0x01 0x0400>;
219 <0x10 0x0100>;
259 <0x10 0x0100>;
287 <0x10 0x0100>;
330 <0x10 0x0100>;
364 <0x10 0x0100>;
450 <0x10 0x0040>, <0x10 0x1000>,
[all …]
/linux/drivers/scsi/aic7xxx/
A Daic79xx_reg_print.c_shipped16 { "PCIINT", 0x10, 0x10 },
47 { "SEQ_SWTMRTO", 0x10, 0x10 }
62 { "AUTOCLRCMDINT", 0x10, 0x10 },
101 { "MREQPEND", 0x10, 0x10 },
146 { "ENRSELI", 0x10, 0x10 },
162 { "FIFO0FREE", 0x10, 0x10 },
187 { "ATNI", 0x10, 0x10 },
242 { "ENSELINGO", 0x10, 0x10 },
259 { "SELINGO", 0x10, 0x10 },
277 { "PHASEMIS", 0x10, 0x10 },
[all …]
A Daic7xxx_reg_print.c_shipped16 { "ENRSELI", 0x10, 0x10 },
33 { "CLRSTCNT", 0x10, 0x10 },
51 { "ATNI", 0x10, 0x10 },
74 { "SINGLE_EDGE", 0x10, 0x10 },
95 { "SELINGO", 0x10, 0x10 },
113 { "PHASEMIS", 0x10, 0x10 },
131 { "EXP_ACTIVE", 0x10, 0x10 },
163 { "ENSELINGO", 0x10, 0x10 },
263 { "FASTMODE", 0x10, 0x10 },
288 { "DPARERR", 0x10, 0x10 },
[all …]
A Daic79xx_reg.h_shipped375 #define PCIINT 0x10
392 #define STATUS_OVERRUN 0x10
414 #define CLRPCIINT 0x10
424 #define CLRDPARERR 0x10
433 #define DPARERR 0x10
441 #define SWINT 0x10
457 #define SEQ_SWTMRTO 0x10
464 #define CLRSEQ_SWTMRTO 0x10
472 #define SNSCB_QOFF 0x10
482 #define HS_MAILBOX_ACT 0x10
[all …]
A Daic7xxx_reg.h_shipped199 #define CLRSTCNT 0x10
216 #define ATNO 0x10
225 #define ATNI 0x10
237 #define SINGLE_EDGE 0x10
252 #define BUSFREEREV 0x10
265 #define CLRSELINGO 0x10
274 #define SELINGO 0x10
294 #define PHASEMIS 0x10
304 #define EXP_ACTIVE 0x10
317 #define SIMODE0 0x10
[all …]
/linux/arch/arm64/mm/
A Dproc.S86 mrs x10, oslsr_el1
94 stp x10, x11, [x0, #64]
114 ldp x9, x10, [x0, #48]
143 msr mdscr_el1, x10
238 pud .req x10
432 ubfx x10, x10, #ID_AA64PFR1_MTE_SHIFT, #4
449 mrs x10, CNTVCT_EL0
450 ands x10, x10, #SYS_RGSR_EL1_SEED_MASK
451 csinc x10, x10, xzr, ne
452 lsl x10, x10, #SYS_RGSR_EL1_SEED_SHIFT
[all …]
/linux/Documentation/devicetree/bindings/
A Dresource-names.txt31 reg = <0 0x10 0x10>, <0 0x20 0x10>,
32 <1 0x10 0x10>, <1 0x20 0x10>;
41 reg = <0 0x40 0x10>, <1 0x40 0x10>;

Completed in 90 milliseconds

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