Searched refs:DDRC_DBICTL (Results 1 – 5 of 5) sorted by relevance

/u-boot/board/beacon/imx8mm/
A D	lpddr4_timing.c	43 { DDRC_DBICTL(0), 0x00000001 },
/u-boot/board/freescale/imx8mm_evk/
A D	lpddr4_timing.c	43 { DDRC_DBICTL(0), 0x00000001 },
/u-boot/board/freescale/imx8mq_evk/
A D	lpddr4_timing_b0.c	57 { DDRC_DBICTL(0), 0x00000001 },
A D	lpddr4_timing.c	55 { DDRC_DBICTL(0), 0x00000001 },
/u-boot/arch/arm/include/asm/arch-imx8m/
A D	ddr.h	446 #define DDRC_DBICTL(X) (DDRC_IPS_BASE_ADDR(X) + 0x1c0) macro

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Last Index update Fri Sep 05 17:56:23 CST 2025