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Searched refs:DRAM_CLK_SRC_PLL5 (Results 1 – 3 of 3) sorted by relevance

/u-boot/arch/arm/include/asm/arch-sunxi/
A Dclock_sun50i_h6.h322 #define DRAM_CLK_SRC_PLL5 (0 << 24) macro
/u-boot/arch/arm/mach-sunxi/
A Ddram_sun50i_h6.c178 writel(DRAM_CLK_SRC_PLL5, &ccm->dram_clk_cfg); in mctl_sys_init()
A Ddram_sun50i_h616.c120 writel(DRAM_CLK_SRC_PLL5, &ccm->dram_clk_cfg); in mctl_sys_init()

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