1Mediatek SoCs Watchdog timer
2
3The watchdog supports a pre-timeout interrupt that fires timeout-sec/2
4before the expiry.
5
6Required properties:
7
8- compatible should contain:
9	"mediatek,mt2701-wdt", "mediatek,mt6589-wdt": for MT2701
10	"mediatek,mt2712-wdt": for MT2712
11	"mediatek,mt6589-wdt": for MT6589
12	"mediatek,mt6797-wdt", "mediatek,mt6589-wdt": for MT6797
13	"mediatek,mt7622-wdt", "mediatek,mt6589-wdt": for MT7622
14	"mediatek,mt7623-wdt", "mediatek,mt6589-wdt": for MT7623
15	"mediatek,mt7629-wdt", "mediatek,mt6589-wdt": for MT7629
16	"mediatek,mt7986-wdt", "mediatek,mt6589-wdt": for MT7986
17	"mediatek,mt8183-wdt": for MT8183
18	"mediatek,mt8516-wdt", "mediatek,mt6589-wdt": for MT8516
19	"mediatek,mt8192-wdt": for MT8192
20	"mediatek,mt8195-wdt", "mediatek,mt6589-wdt": for MT8195
21
22- reg : Specifies base physical address and size of the registers.
23
24Optional properties:
25- mediatek,disable-extrst: disable send output reset signal
26- interrupts: Watchdog pre-timeout (bark) interrupt.
27- timeout-sec: contains the watchdog timeout in seconds.
28- #reset-cells: Should be 1.
29
30Example:
31
32watchdog: watchdog@10007000 {
33	compatible = "mediatek,mt8183-wdt",
34		     "mediatek,mt6589-wdt";
35	mediatek,disable-extrst;
36	reg = <0 0x10007000 0 0x100>;
37	interrupts = <GIC_SPI 139 IRQ_TYPE_NONE>;
38	timeout-sec = <10>;
39	#reset-cells = <1>;
40};
41