1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the r8a77470 SoC 4 * 5 * Copyright (C) 2018 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/interrupt-controller/irq.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/clock/r8a77470-cpg-mssr.h> 11#include <dt-bindings/power/r8a77470-sysc.h> 12/ { 13 compatible = "renesas,r8a77470"; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 17 aliases { 18 i2c0 = &i2c0; 19 i2c1 = &i2c1; 20 i2c2 = &i2c2; 21 i2c3 = &i2c3; 22 i2c4 = &i2c4; 23 }; 24 25 cpus { 26 #address-cells = <1>; 27 #size-cells = <0>; 28 29 cpu0: cpu@0 { 30 device_type = "cpu"; 31 compatible = "arm,cortex-a7"; 32 reg = <0>; 33 clock-frequency = <1000000000>; 34 clocks = <&cpg CPG_CORE R8A77470_CLK_Z2>; 35 power-domains = <&sysc R8A77470_PD_CA7_CPU0>; 36 enable-method = "renesas,apmu"; 37 next-level-cache = <&L2_CA7>; 38 }; 39 40 cpu1: cpu@1 { 41 device_type = "cpu"; 42 compatible = "arm,cortex-a7"; 43 reg = <1>; 44 clock-frequency = <1000000000>; 45 clocks = <&cpg CPG_CORE R8A77470_CLK_Z2>; 46 power-domains = <&sysc R8A77470_PD_CA7_CPU1>; 47 enable-method = "renesas,apmu"; 48 next-level-cache = <&L2_CA7>; 49 }; 50 51 L2_CA7: cache-controller-0 { 52 compatible = "cache"; 53 cache-unified; 54 cache-level = <2>; 55 power-domains = <&sysc R8A77470_PD_CA7_SCU>; 56 }; 57 }; 58 59 /* External root clock */ 60 extal_clk: extal { 61 compatible = "fixed-clock"; 62 #clock-cells = <0>; 63 /* This value must be overridden by the board. */ 64 clock-frequency = <0>; 65 }; 66 67 pmu { 68 compatible = "arm,cortex-a7-pmu"; 69 interrupts-extended = <&gic GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, 70 <&gic GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 71 interrupt-affinity = <&cpu0>, <&cpu1>; 72 }; 73 74 /* External SCIF clock */ 75 scif_clk: scif { 76 compatible = "fixed-clock"; 77 #clock-cells = <0>; 78 /* This value must be overridden by the board. */ 79 clock-frequency = <0>; 80 }; 81 82 soc { 83 compatible = "simple-bus"; 84 interrupt-parent = <&gic>; 85 86 #address-cells = <2>; 87 #size-cells = <2>; 88 ranges; 89 90 rwdt: watchdog@e6020000 { 91 compatible = "renesas,r8a77470-wdt", 92 "renesas,rcar-gen2-wdt"; 93 reg = <0 0xe6020000 0 0x0c>; 94 clocks = <&cpg CPG_MOD 402>; 95 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 96 resets = <&cpg 402>; 97 status = "disabled"; 98 }; 99 100 gpio0: gpio@e6050000 { 101 compatible = "renesas,gpio-r8a77470", 102 "renesas,rcar-gen2-gpio"; 103 reg = <0 0xe6050000 0 0x50>; 104 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 105 #gpio-cells = <2>; 106 gpio-controller; 107 gpio-ranges = <&pfc 0 0 23>; 108 #interrupt-cells = <2>; 109 interrupt-controller; 110 clocks = <&cpg CPG_MOD 912>; 111 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 112 resets = <&cpg 912>; 113 }; 114 115 gpio1: gpio@e6051000 { 116 compatible = "renesas,gpio-r8a77470", 117 "renesas,rcar-gen2-gpio"; 118 reg = <0 0xe6051000 0 0x50>; 119 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 120 #gpio-cells = <2>; 121 gpio-controller; 122 gpio-ranges = <&pfc 0 32 23>; 123 #interrupt-cells = <2>; 124 interrupt-controller; 125 clocks = <&cpg CPG_MOD 911>; 126 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 127 resets = <&cpg 911>; 128 }; 129 130 gpio2: gpio@e6052000 { 131 compatible = "renesas,gpio-r8a77470", 132 "renesas,rcar-gen2-gpio"; 133 reg = <0 0xe6052000 0 0x50>; 134 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 135 #gpio-cells = <2>; 136 gpio-controller; 137 gpio-ranges = <&pfc 0 64 32>; 138 #interrupt-cells = <2>; 139 interrupt-controller; 140 clocks = <&cpg CPG_MOD 910>; 141 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 142 resets = <&cpg 910>; 143 }; 144 145 gpio3: gpio@e6053000 { 146 compatible = "renesas,gpio-r8a77470", 147 "renesas,rcar-gen2-gpio"; 148 reg = <0 0xe6053000 0 0x50>; 149 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 150 #gpio-cells = <2>; 151 gpio-controller; 152 gpio-ranges = <&pfc 0 96 30>; 153 gpio-reserved-ranges = <17 10>; 154 #interrupt-cells = <2>; 155 interrupt-controller; 156 clocks = <&cpg CPG_MOD 909>; 157 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 158 resets = <&cpg 909>; 159 }; 160 161 gpio4: gpio@e6054000 { 162 compatible = "renesas,gpio-r8a77470", 163 "renesas,rcar-gen2-gpio"; 164 reg = <0 0xe6054000 0 0x50>; 165 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 166 #gpio-cells = <2>; 167 gpio-controller; 168 gpio-ranges = <&pfc 0 128 26>; 169 #interrupt-cells = <2>; 170 interrupt-controller; 171 clocks = <&cpg CPG_MOD 908>; 172 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 173 resets = <&cpg 908>; 174 }; 175 176 gpio5: gpio@e6055000 { 177 compatible = "renesas,gpio-r8a77470", 178 "renesas,rcar-gen2-gpio"; 179 reg = <0 0xe6055000 0 0x50>; 180 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 181 #gpio-cells = <2>; 182 gpio-controller; 183 gpio-ranges = <&pfc 0 160 32>; 184 #interrupt-cells = <2>; 185 interrupt-controller; 186 clocks = <&cpg CPG_MOD 907>; 187 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 188 resets = <&cpg 907>; 189 }; 190 191 pfc: pinctrl@e6060000 { 192 compatible = "renesas,pfc-r8a77470"; 193 reg = <0 0xe6060000 0 0x118>; 194 }; 195 196 cpg: clock-controller@e6150000 { 197 compatible = "renesas,r8a77470-cpg-mssr"; 198 reg = <0 0xe6150000 0 0x1000>; 199 clocks = <&extal_clk>, <&usb_extal_clk>; 200 clock-names = "extal", "usb_extal"; 201 #clock-cells = <2>; 202 #power-domain-cells = <0>; 203 #reset-cells = <1>; 204 }; 205 206 apmu@e6151000 { 207 compatible = "renesas,r8a77470-apmu", "renesas,apmu"; 208 reg = <0 0xe6151000 0 0x188>; 209 cpus = <&cpu0>, <&cpu1>; 210 }; 211 212 rst: reset-controller@e6160000 { 213 compatible = "renesas,r8a77470-rst"; 214 reg = <0 0xe6160000 0 0x100>; 215 }; 216 217 sysc: system-controller@e6180000 { 218 compatible = "renesas,r8a77470-sysc"; 219 reg = <0 0xe6180000 0 0x200>; 220 #power-domain-cells = <1>; 221 }; 222 223 irqc: interrupt-controller@e61c0000 { 224 compatible = "renesas,irqc-r8a77470", "renesas,irqc"; 225 #interrupt-cells = <2>; 226 interrupt-controller; 227 reg = <0 0xe61c0000 0 0x200>; 228 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 229 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 230 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 231 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 232 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, 233 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, 234 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, 235 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, 236 <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, 237 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 238 clocks = <&cpg CPG_MOD 407>; 239 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 240 resets = <&cpg 407>; 241 }; 242 243 icram0: sram@e63a0000 { 244 compatible = "mmio-sram"; 245 reg = <0 0xe63a0000 0 0x12000>; 246 #address-cells = <1>; 247 #size-cells = <1>; 248 ranges = <0 0 0xe63a0000 0x12000>; 249 }; 250 251 icram1: sram@e63c0000 { 252 compatible = "mmio-sram"; 253 reg = <0 0xe63c0000 0 0x1000>; 254 #address-cells = <1>; 255 #size-cells = <1>; 256 ranges = <0 0 0xe63c0000 0x1000>; 257 258 smp-sram@0 { 259 compatible = "renesas,smp-sram"; 260 reg = <0 0x100>; 261 }; 262 }; 263 264 icram2: sram@e6300000 { 265 compatible = "mmio-sram"; 266 reg = <0 0xe6300000 0 0x20000>; 267 #address-cells = <1>; 268 #size-cells = <1>; 269 ranges = <0 0 0xe6300000 0x20000>; 270 }; 271 272 i2c0: i2c@e6508000 { 273 #address-cells = <1>; 274 #size-cells = <0>; 275 compatible = "renesas,i2c-r8a77470", 276 "renesas,rcar-gen2-i2c"; 277 reg = <0 0xe6508000 0 0x40>; 278 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 279 clocks = <&cpg CPG_MOD 931>; 280 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 281 resets = <&cpg 931>; 282 i2c-scl-internal-delay-ns = <6>; 283 status = "disabled"; 284 }; 285 286 i2c1: i2c@e6518000 { 287 #address-cells = <1>; 288 #size-cells = <0>; 289 compatible = "renesas,i2c-r8a77470", 290 "renesas,rcar-gen2-i2c"; 291 reg = <0 0xe6518000 0 0x40>; 292 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 293 clocks = <&cpg CPG_MOD 930>; 294 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 295 resets = <&cpg 930>; 296 i2c-scl-internal-delay-ns = <6>; 297 status = "disabled"; 298 }; 299 300 i2c2: i2c@e6530000 { 301 #address-cells = <1>; 302 #size-cells = <0>; 303 compatible = "renesas,i2c-r8a77470", 304 "renesas,rcar-gen2-i2c"; 305 reg = <0 0xe6530000 0 0x40>; 306 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 307 clocks = <&cpg CPG_MOD 929>; 308 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 309 resets = <&cpg 929>; 310 i2c-scl-internal-delay-ns = <6>; 311 status = "disabled"; 312 }; 313 314 i2c3: i2c@e6540000 { 315 #address-cells = <1>; 316 #size-cells = <0>; 317 compatible = "renesas,i2c-r8a77470", 318 "renesas,rcar-gen2-i2c"; 319 reg = <0 0xe6540000 0 0x40>; 320 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 321 clocks = <&cpg CPG_MOD 928>; 322 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 323 resets = <&cpg 928>; 324 i2c-scl-internal-delay-ns = <6>; 325 status = "disabled"; 326 }; 327 328 i2c4: i2c@e6520000 { 329 #address-cells = <1>; 330 #size-cells = <0>; 331 compatible = "renesas,i2c-r8a77470", 332 "renesas,rcar-gen2-i2c"; 333 reg = <0 0xe6520000 0 0x40>; 334 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 335 clocks = <&cpg CPG_MOD 927>; 336 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 337 resets = <&cpg 927>; 338 i2c-scl-internal-delay-ns = <6>; 339 status = "disabled"; 340 }; 341 342 hsusb0: hsusb@e6590000 { 343 compatible = "renesas,usbhs-r8a77470", 344 "renesas,rcar-gen2-usbhs"; 345 reg = <0 0xe6590000 0 0x100>; 346 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 347 clocks = <&cpg CPG_MOD 704>; 348 dmas = <&usb_dmac00 0>, <&usb_dmac00 1>, 349 <&usb_dmac10 0>, <&usb_dmac10 1>; 350 dma-names = "ch0", "ch1", "ch2", "ch3"; 351 renesas,buswait = <4>; 352 phys = <&usb0 1>; 353 phy-names = "usb"; 354 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 355 resets = <&cpg 704>; 356 status = "disabled"; 357 }; 358 359 usbphy0: usb-phy@e6590100 { 360 compatible = "renesas,usb-phy-r8a77470", 361 "renesas,rcar-gen2-usb-phy"; 362 reg = <0 0xe6590100 0 0x100>; 363 #address-cells = <1>; 364 #size-cells = <0>; 365 clocks = <&cpg CPG_MOD 704>; 366 clock-names = "usbhs"; 367 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 368 resets = <&cpg 704>; 369 status = "disabled"; 370 371 usb0: usb-channel@0 { 372 reg = <0>; 373 #phy-cells = <1>; 374 }; 375 }; 376 377 hsusb1: hsusb@e6598000 { 378 compatible = "renesas,usbhs-r8a77470", 379 "renesas,rcar-gen2-usbhs"; 380 reg = <0 0xe6598000 0 0x100>; 381 interrupts = <GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>; 382 clocks = <&cpg CPG_MOD 706>; 383 dmas = <&usb_dmac01 0>, <&usb_dmac01 1>, 384 <&usb_dmac11 0>, <&usb_dmac11 1>; 385 dma-names = "ch0", "ch1", "ch2", "ch3"; 386 renesas,buswait = <4>; 387 /* We need to turn on usbphy0 to make usbphy1 to work */ 388 phys = <&usb1 1>; 389 phy-names = "usb"; 390 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 391 resets = <&cpg 706>; 392 status = "disabled"; 393 }; 394 395 usbphy1: usb-phy@e6598100 { 396 compatible = "renesas,usb-phy-r8a77470", 397 "renesas,rcar-gen2-usb-phy"; 398 reg = <0 0xe6598100 0 0x100>; 399 #address-cells = <1>; 400 #size-cells = <0>; 401 clocks = <&cpg CPG_MOD 706>; 402 clock-names = "usbhs"; 403 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 404 resets = <&cpg 706>; 405 status = "disabled"; 406 407 usb1: usb-channel@0 { 408 reg = <0>; 409 #phy-cells = <1>; 410 }; 411 }; 412 413 usb_dmac00: dma-controller@e65a0000 { 414 compatible = "renesas,r8a77470-usb-dmac", 415 "renesas,usb-dmac"; 416 reg = <0 0xe65a0000 0 0x100>; 417 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 418 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 419 interrupt-names = "ch0", "ch1"; 420 clocks = <&cpg CPG_MOD 330>; 421 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 422 resets = <&cpg 330>; 423 #dma-cells = <1>; 424 dma-channels = <2>; 425 }; 426 427 usb_dmac10: dma-controller@e65b0000 { 428 compatible = "renesas,r8a77470-usb-dmac", 429 "renesas,usb-dmac"; 430 reg = <0 0xe65b0000 0 0x100>; 431 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 432 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 433 interrupt-names = "ch0", "ch1"; 434 clocks = <&cpg CPG_MOD 331>; 435 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 436 resets = <&cpg 331>; 437 #dma-cells = <1>; 438 dma-channels = <2>; 439 }; 440 441 usb_dmac01: dma-controller@e65a8000 { 442 compatible = "renesas,r8a77470-usb-dmac", 443 "renesas,usb-dmac"; 444 reg = <0 0xe65a8000 0 0x100>; 445 interrupts = <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>, 446 <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>; 447 interrupt-names = "ch0", "ch1"; 448 clocks = <&cpg CPG_MOD 326>; 449 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 450 resets = <&cpg 326>; 451 #dma-cells = <1>; 452 dma-channels = <2>; 453 }; 454 455 usb_dmac11: dma-controller@e65b8000 { 456 compatible = "renesas,r8a77470-usb-dmac", 457 "renesas,usb-dmac"; 458 reg = <0 0xe65b8000 0 0x100>; 459 interrupts = <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>, 460 <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>; 461 interrupt-names = "ch0", "ch1"; 462 clocks = <&cpg CPG_MOD 327>; 463 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 464 resets = <&cpg 327>; 465 #dma-cells = <1>; 466 dma-channels = <2>; 467 }; 468 469 dmac0: dma-controller@e6700000 { 470 compatible = "renesas,dmac-r8a77470", 471 "renesas,rcar-dmac"; 472 reg = <0 0xe6700000 0 0x20000>; 473 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>, 474 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 475 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 476 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 477 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 478 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 479 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 480 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 481 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 482 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 483 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 484 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 485 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 486 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 487 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 488 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; 489 interrupt-names = "error", 490 "ch0", "ch1", "ch2", "ch3", 491 "ch4", "ch5", "ch6", "ch7", 492 "ch8", "ch9", "ch10", "ch11", 493 "ch12", "ch13", "ch14"; 494 clocks = <&cpg CPG_MOD 219>; 495 clock-names = "fck"; 496 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 497 resets = <&cpg 219>; 498 #dma-cells = <1>; 499 dma-channels = <15>; 500 }; 501 502 dmac1: dma-controller@e6720000 { 503 compatible = "renesas,dmac-r8a77470", 504 "renesas,rcar-dmac"; 505 reg = <0 0xe6720000 0 0x20000>; 506 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 507 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 508 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 509 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 510 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 511 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 512 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 513 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 514 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 515 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 516 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 517 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 518 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 519 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 520 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 521 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; 522 interrupt-names = "error", 523 "ch0", "ch1", "ch2", "ch3", 524 "ch4", "ch5", "ch6", "ch7", 525 "ch8", "ch9", "ch10", "ch11", 526 "ch12", "ch13", "ch14"; 527 clocks = <&cpg CPG_MOD 218>; 528 clock-names = "fck"; 529 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 530 resets = <&cpg 218>; 531 #dma-cells = <1>; 532 dma-channels = <15>; 533 }; 534 535 avb: ethernet@e6800000 { 536 compatible = "renesas,etheravb-r8a77470", 537 "renesas,etheravb-rcar-gen2"; 538 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; 539 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; 540 clocks = <&cpg CPG_MOD 812>; 541 clock-names = "fck"; 542 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 543 resets = <&cpg 812>; 544 #address-cells = <1>; 545 #size-cells = <0>; 546 status = "disabled"; 547 }; 548 549 qspi0: spi@e6b10000 { 550 compatible = "renesas,qspi-r8a77470", "renesas,qspi"; 551 reg = <0 0xe6b10000 0 0x2c>; 552 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 553 clocks = <&cpg CPG_MOD 918>; 554 dmas = <&dmac0 0x17>, <&dmac0 0x18>, 555 <&dmac1 0x17>, <&dmac1 0x18>; 556 dma-names = "tx", "rx", "tx", "rx"; 557 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 558 num-cs = <1>; 559 #address-cells = <1>; 560 #size-cells = <0>; 561 resets = <&cpg 918>; 562 status = "disabled"; 563 }; 564 565 qspi1: spi@ee200000 { 566 compatible = "renesas,qspi-r8a77470", "renesas,qspi"; 567 reg = <0 0xee200000 0 0x2c>; 568 interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>; 569 clocks = <&cpg CPG_MOD 917>; 570 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>, 571 <&dmac1 0xd1>, <&dmac1 0xd2>; 572 dma-names = "tx", "rx", "tx", "rx"; 573 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 574 num-cs = <1>; 575 #address-cells = <1>; 576 #size-cells = <0>; 577 resets = <&cpg 917>; 578 status = "disabled"; 579 }; 580 581 scif0: serial@e6e60000 { 582 compatible = "renesas,scif-r8a77470", 583 "renesas,rcar-gen2-scif", "renesas,scif"; 584 reg = <0 0xe6e60000 0 0x40>; 585 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 586 clocks = <&cpg CPG_MOD 721>, 587 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>; 588 clock-names = "fck", "brg_int", "scif_clk"; 589 dmas = <&dmac0 0x29>, <&dmac0 0x2a>, 590 <&dmac1 0x29>, <&dmac1 0x2a>; 591 dma-names = "tx", "rx", "tx", "rx"; 592 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 593 resets = <&cpg 721>; 594 status = "disabled"; 595 }; 596 597 scif1: serial@e6e68000 { 598 compatible = "renesas,scif-r8a77470", 599 "renesas,rcar-gen2-scif", "renesas,scif"; 600 reg = <0 0xe6e68000 0 0x40>; 601 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 602 clocks = <&cpg CPG_MOD 720>, 603 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>; 604 clock-names = "fck", "brg_int", "scif_clk"; 605 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>, 606 <&dmac1 0x2d>, <&dmac1 0x2e>; 607 dma-names = "tx", "rx", "tx", "rx"; 608 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 609 resets = <&cpg 720>; 610 status = "disabled"; 611 }; 612 613 scif2: serial@e6e58000 { 614 compatible = "renesas,scif-r8a77470", 615 "renesas,rcar-gen2-scif", "renesas,scif"; 616 reg = <0 0xe6e58000 0 0x40>; 617 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; 618 clocks = <&cpg CPG_MOD 719>, 619 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>; 620 clock-names = "fck", "brg_int", "scif_clk"; 621 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>, 622 <&dmac1 0x2b>, <&dmac1 0x2c>; 623 dma-names = "tx", "rx", "tx", "rx"; 624 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 625 resets = <&cpg 719>; 626 status = "disabled"; 627 }; 628 629 scif3: serial@e6ea8000 { 630 compatible = "renesas,scif-r8a77470", 631 "renesas,rcar-gen2-scif", "renesas,scif"; 632 reg = <0 0xe6ea8000 0 0x40>; 633 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 634 clocks = <&cpg CPG_MOD 718>, 635 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>; 636 clock-names = "fck", "brg_int", "scif_clk"; 637 dmas = <&dmac0 0x2f>, <&dmac0 0x30>, 638 <&dmac1 0x2f>, <&dmac1 0x30>; 639 dma-names = "tx", "rx", "tx", "rx"; 640 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 641 resets = <&cpg 718>; 642 status = "disabled"; 643 }; 644 645 scif4: serial@e6ee0000 { 646 compatible = "renesas,scif-r8a77470", 647 "renesas,rcar-gen2-scif", "renesas,scif"; 648 reg = <0 0xe6ee0000 0 0x40>; 649 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 650 clocks = <&cpg CPG_MOD 715>, 651 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>; 652 clock-names = "fck", "brg_int", "scif_clk"; 653 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>, 654 <&dmac1 0xfb>, <&dmac1 0xfc>; 655 dma-names = "tx", "rx", "tx", "rx"; 656 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 657 resets = <&cpg 715>; 658 status = "disabled"; 659 }; 660 661 scif5: serial@e6ee8000 { 662 compatible = "renesas,scif-r8a77470", 663 "renesas,rcar-gen2-scif", "renesas,scif"; 664 reg = <0 0xe6ee8000 0 0x40>; 665 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 666 clocks = <&cpg CPG_MOD 714>, 667 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>; 668 clock-names = "fck", "brg_int", "scif_clk"; 669 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>, 670 <&dmac1 0xfd>, <&dmac1 0xfe>; 671 dma-names = "tx", "rx", "tx", "rx"; 672 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 673 resets = <&cpg 714>; 674 status = "disabled"; 675 }; 676 677 hscif0: serial@e62c0000 { 678 compatible = "renesas,hscif-r8a77470", 679 "renesas,rcar-gen2-hscif", "renesas,hscif"; 680 reg = <0 0xe62c0000 0 0x60>; 681 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 682 clocks = <&cpg CPG_MOD 717>, 683 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>; 684 clock-names = "fck", "brg_int", "scif_clk"; 685 dmas = <&dmac0 0x39>, <&dmac0 0x3a>, 686 <&dmac1 0x39>, <&dmac1 0x3a>; 687 dma-names = "tx", "rx", "tx", "rx"; 688 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 689 resets = <&cpg 717>; 690 status = "disabled"; 691 }; 692 693 hscif1: serial@e62c8000 { 694 compatible = "renesas,hscif-r8a77470", 695 "renesas,rcar-gen2-hscif", "renesas,hscif"; 696 reg = <0 0xe62c8000 0 0x60>; 697 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 698 clocks = <&cpg CPG_MOD 716>, 699 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>; 700 clock-names = "fck", "brg_int", "scif_clk"; 701 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>, 702 <&dmac1 0x4d>, <&dmac1 0x4e>; 703 dma-names = "tx", "rx", "tx", "rx"; 704 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 705 resets = <&cpg 716>; 706 status = "disabled"; 707 }; 708 709 hscif2: serial@e62d0000 { 710 compatible = "renesas,hscif-r8a77470", 711 "renesas,rcar-gen2-hscif", "renesas,hscif"; 712 reg = <0 0xe62d0000 0 0x60>; 713 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 714 clocks = <&cpg CPG_MOD 713>, 715 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>; 716 clock-names = "fck", "brg_int", "scif_clk"; 717 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>, 718 <&dmac1 0x3b>, <&dmac1 0x3c>; 719 dma-names = "tx", "rx", "tx", "rx"; 720 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 721 resets = <&cpg 713>; 722 status = "disabled"; 723 }; 724 725 pwm0: pwm@e6e30000 { 726 compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar"; 727 reg = <0 0xe6e30000 0 0x8>; 728 clocks = <&cpg CPG_MOD 523>; 729 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 730 resets = <&cpg 523>; 731 #pwm-cells = <2>; 732 status = "disabled"; 733 }; 734 735 pwm1: pwm@e6e31000 { 736 compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar"; 737 reg = <0 0xe6e31000 0 0x8>; 738 clocks = <&cpg CPG_MOD 523>; 739 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 740 resets = <&cpg 523>; 741 #pwm-cells = <2>; 742 status = "disabled"; 743 }; 744 745 pwm2: pwm@e6e32000 { 746 compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar"; 747 reg = <0 0xe6e32000 0 0x8>; 748 clocks = <&cpg CPG_MOD 523>; 749 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 750 resets = <&cpg 523>; 751 #pwm-cells = <2>; 752 status = "disabled"; 753 }; 754 755 pwm3: pwm@e6e33000 { 756 compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar"; 757 reg = <0 0xe6e33000 0 0x8>; 758 clocks = <&cpg CPG_MOD 523>; 759 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 760 resets = <&cpg 523>; 761 #pwm-cells = <2>; 762 status = "disabled"; 763 }; 764 765 pwm4: pwm@e6e34000 { 766 compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar"; 767 reg = <0 0xe6e34000 0 0x8>; 768 clocks = <&cpg CPG_MOD 523>; 769 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 770 resets = <&cpg 523>; 771 #pwm-cells = <2>; 772 status = "disabled"; 773 }; 774 775 pwm5: pwm@e6e35000 { 776 compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar"; 777 reg = <0 0xe6e35000 0 0x8>; 778 clocks = <&cpg CPG_MOD 523>; 779 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 780 resets = <&cpg 523>; 781 #pwm-cells = <2>; 782 status = "disabled"; 783 }; 784 785 pwm6: pwm@e6e36000 { 786 compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar"; 787 reg = <0 0xe6e36000 0 0x8>; 788 clocks = <&cpg CPG_MOD 523>; 789 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 790 resets = <&cpg 523>; 791 #pwm-cells = <2>; 792 status = "disabled"; 793 }; 794 795 vin0: video@e6ef0000 { 796 compatible = "renesas,vin-r8a77470", 797 "renesas,rcar-gen2-vin"; 798 reg = <0 0xe6ef0000 0 0x1000>; 799 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 800 clocks = <&cpg CPG_MOD 811>; 801 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 802 resets = <&cpg 811>; 803 status = "disabled"; 804 }; 805 806 vin1: video@e6ef1000 { 807 compatible = "renesas,vin-r8a77470", 808 "renesas,rcar-gen2-vin"; 809 reg = <0 0xe6ef1000 0 0x1000>; 810 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 811 clocks = <&cpg CPG_MOD 810>; 812 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 813 resets = <&cpg 810>; 814 status = "disabled"; 815 }; 816 817 ohci0: usb@ee080000 { 818 compatible = "generic-ohci"; 819 reg = <0 0xee080000 0 0x100>; 820 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 821 clocks = <&cpg CPG_MOD 703>; 822 phys = <&usb0 0>, <&usb2_phy0>; 823 phy-names = "usb"; 824 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 825 resets = <&cpg 703>; 826 status = "disabled"; 827 }; 828 829 ehci0: usb@ee080100 { 830 compatible = "generic-ehci"; 831 reg = <0 0xee080100 0 0x100>; 832 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 833 clocks = <&cpg CPG_MOD 703>; 834 phys = <&usb0 0>, <&usb2_phy0>; 835 phy-names = "usb"; 836 companion = <&ohci0>; 837 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 838 resets = <&cpg 703>; 839 status = "disabled"; 840 }; 841 842 usb2_phy0: usb-phy@ee080200 { 843 compatible = "renesas,usb2-phy-r8a77470"; 844 reg = <0 0xee080200 0 0x700>; 845 clocks = <&cpg CPG_MOD 703>; 846 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 847 resets = <&cpg 703>; 848 #phy-cells = <0>; 849 status = "disabled"; 850 }; 851 852 ohci1: usb@ee0c0000 { 853 compatible = "generic-ohci"; 854 reg = <0 0xee0c0000 0 0x100>; 855 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 856 clocks = <&cpg CPG_MOD 705>; 857 phys = <&usb0 1>, <&usb2_phy1>, <&usb1 0>; 858 phy-names = "usb"; 859 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 860 resets = <&cpg 705>; 861 status = "disabled"; 862 }; 863 864 ehci1: usb@ee0c0100 { 865 compatible = "generic-ehci"; 866 reg = <0 0xee0c0100 0 0x100>; 867 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 868 clocks = <&cpg CPG_MOD 705>; 869 phys = <&usb0 1>, <&usb2_phy1>, <&usb1 0>; 870 phy-names = "usb"; 871 companion = <&ohci1>; 872 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 873 resets = <&cpg 705>; 874 status = "disabled"; 875 }; 876 877 usb2_phy1: usb-phy@ee0c0200 { 878 compatible = "renesas,usb2-phy-r8a77470"; 879 reg = <0 0xee0c0200 0 0x700>; 880 clocks = <&cpg CPG_MOD 705>; 881 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 882 resets = <&cpg 705>; 883 #phy-cells = <0>; 884 status = "disabled"; 885 }; 886 887 sdhi0: mmc@ee100000 { 888 compatible = "renesas,sdhi-r8a77470", 889 "renesas,rcar-gen2-sdhi"; 890 reg = <0 0xee100000 0 0x328>; 891 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 892 clocks = <&cpg CPG_MOD 314>; 893 dmas = <&dmac0 0xcd>, <&dmac0 0xce>, 894 <&dmac1 0xcd>, <&dmac1 0xce>; 895 dma-names = "tx", "rx", "tx", "rx"; 896 max-frequency = <156000000>; 897 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 898 resets = <&cpg 314>; 899 status = "disabled"; 900 }; 901 902 sdhi1: mmc@ee300000 { 903 compatible = "renesas,sdhi-mmc-r8a77470"; 904 reg = <0 0xee300000 0 0x2000>; 905 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 906 clocks = <&cpg CPG_MOD 313>; 907 max-frequency = <156000000>; 908 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 909 resets = <&cpg 313>; 910 status = "disabled"; 911 }; 912 913 sdhi2: mmc@ee160000 { 914 compatible = "renesas,sdhi-r8a77470", 915 "renesas,rcar-gen2-sdhi"; 916 reg = <0 0xee160000 0 0x328>; 917 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 918 clocks = <&cpg CPG_MOD 312>; 919 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, 920 <&dmac1 0xd3>, <&dmac1 0xd4>; 921 dma-names = "tx", "rx", "tx", "rx"; 922 max-frequency = <78000000>; 923 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 924 resets = <&cpg 312>; 925 status = "disabled"; 926 }; 927 928 gic: interrupt-controller@f1001000 { 929 compatible = "arm,gic-400"; 930 #interrupt-cells = <3>; 931 #address-cells = <0>; 932 interrupt-controller; 933 reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>, 934 <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>; 935 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 936 clocks = <&cpg CPG_MOD 408>; 937 clock-names = "clk"; 938 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 939 resets = <&cpg 408>; 940 }; 941 942 du: display@feb00000 { 943 compatible = "renesas,du-r8a77470"; 944 reg = <0 0xfeb00000 0 0x40000>; 945 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 946 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; 947 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>; 948 clock-names = "du.0", "du.1"; 949 resets = <&cpg 724>; 950 reset-names = "du.0"; 951 status = "disabled"; 952 953 ports { 954 #address-cells = <1>; 955 #size-cells = <0>; 956 957 port@0 { 958 reg = <0>; 959 du_out_rgb0: endpoint { 960 }; 961 }; 962 port@1 { 963 reg = <1>; 964 du_out_rgb1: endpoint { 965 }; 966 }; 967 port@2 { 968 reg = <2>; 969 du_out_lvds0: endpoint { 970 }; 971 }; 972 }; 973 }; 974 975 prr: chipid@ff000044 { 976 compatible = "renesas,prr"; 977 reg = <0 0xff000044 0 4>; 978 }; 979 980 cmt0: timer@ffca0000 { 981 compatible = "renesas,r8a77470-cmt0", 982 "renesas,rcar-gen2-cmt0"; 983 reg = <0 0xffca0000 0 0x1004>; 984 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 985 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 986 clocks = <&cpg CPG_MOD 124>; 987 clock-names = "fck"; 988 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 989 resets = <&cpg 124>; 990 status = "disabled"; 991 }; 992 993 cmt1: timer@e6130000 { 994 compatible = "renesas,r8a77470-cmt1", 995 "renesas,rcar-gen2-cmt1"; 996 reg = <0 0xe6130000 0 0x1004>; 997 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 998 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 999 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 1000 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 1001 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 1002 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 1003 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 1004 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 1005 clocks = <&cpg CPG_MOD 329>; 1006 clock-names = "fck"; 1007 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 1008 resets = <&cpg 329>; 1009 status = "disabled"; 1010 }; 1011 }; 1012 1013 timer { 1014 compatible = "arm,armv7-timer"; 1015 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1016 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1017 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1018 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 1019 }; 1020 1021 /* External USB clock - can be overridden by the board */ 1022 usb_extal_clk: usb_extal { 1023 compatible = "fixed-clock"; 1024 #clock-cells = <0>; 1025 clock-frequency = <48000000>; 1026 }; 1027}; 1028