1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef ARCH_X86_KVM_X86_H
3 #define ARCH_X86_KVM_X86_H
4
5 #include <linux/kvm_host.h>
6 #include <asm/mce.h>
7 #include <asm/pvclock.h>
8 #include "kvm_cache_regs.h"
9 #include "kvm_emulate.h"
10
11 void kvm_spurious_fault(void);
12
kvm_guest_enter_irqoff(void)13 static __always_inline void kvm_guest_enter_irqoff(void)
14 {
15 /*
16 * VMENTER enables interrupts (host state), but the kernel state is
17 * interrupts disabled when this is invoked. Also tell RCU about
18 * it. This is the same logic as for exit_to_user_mode().
19 *
20 * This ensures that e.g. latency analysis on the host observes
21 * guest mode as interrupt enabled.
22 *
23 * guest_enter_irqoff() informs context tracking about the
24 * transition to guest mode and if enabled adjusts RCU state
25 * accordingly.
26 */
27 instrumentation_begin();
28 trace_hardirqs_on_prepare();
29 lockdep_hardirqs_on_prepare(CALLER_ADDR0);
30 instrumentation_end();
31
32 guest_enter_irqoff();
33 lockdep_hardirqs_on(CALLER_ADDR0);
34 }
35
kvm_guest_exit_irqoff(void)36 static __always_inline void kvm_guest_exit_irqoff(void)
37 {
38 /*
39 * VMEXIT disables interrupts (host state), but tracing and lockdep
40 * have them in state 'on' as recorded before entering guest mode.
41 * Same as enter_from_user_mode().
42 *
43 * context_tracking_guest_exit() restores host context and reinstates
44 * RCU if enabled and required.
45 *
46 * This needs to be done immediately after VM-Exit, before any code
47 * that might contain tracepoints or call out to the greater world,
48 * e.g. before x86_spec_ctrl_restore_host().
49 */
50 lockdep_hardirqs_off(CALLER_ADDR0);
51 context_tracking_guest_exit();
52
53 instrumentation_begin();
54 trace_hardirqs_off_finish();
55 instrumentation_end();
56 }
57
58 #define KVM_NESTED_VMENTER_CONSISTENCY_CHECK(consistency_check) \
59 ({ \
60 bool failed = (consistency_check); \
61 if (failed) \
62 trace_kvm_nested_vmenter_failed(#consistency_check, 0); \
63 failed; \
64 })
65
66 #define KVM_DEFAULT_PLE_GAP 128
67 #define KVM_VMX_DEFAULT_PLE_WINDOW 4096
68 #define KVM_DEFAULT_PLE_WINDOW_GROW 2
69 #define KVM_DEFAULT_PLE_WINDOW_SHRINK 0
70 #define KVM_VMX_DEFAULT_PLE_WINDOW_MAX UINT_MAX
71 #define KVM_SVM_DEFAULT_PLE_WINDOW_MAX USHRT_MAX
72 #define KVM_SVM_DEFAULT_PLE_WINDOW 3000
73
__grow_ple_window(unsigned int val,unsigned int base,unsigned int modifier,unsigned int max)74 static inline unsigned int __grow_ple_window(unsigned int val,
75 unsigned int base, unsigned int modifier, unsigned int max)
76 {
77 u64 ret = val;
78
79 if (modifier < 1)
80 return base;
81
82 if (modifier < base)
83 ret *= modifier;
84 else
85 ret += modifier;
86
87 return min(ret, (u64)max);
88 }
89
__shrink_ple_window(unsigned int val,unsigned int base,unsigned int modifier,unsigned int min)90 static inline unsigned int __shrink_ple_window(unsigned int val,
91 unsigned int base, unsigned int modifier, unsigned int min)
92 {
93 if (modifier < 1)
94 return base;
95
96 if (modifier < base)
97 val /= modifier;
98 else
99 val -= modifier;
100
101 return max(val, min);
102 }
103
104 #define MSR_IA32_CR_PAT_DEFAULT 0x0007040600070406ULL
105
106 void kvm_service_local_tlb_flush_requests(struct kvm_vcpu *vcpu);
107 int kvm_check_nested_events(struct kvm_vcpu *vcpu);
108
kvm_clear_exception_queue(struct kvm_vcpu * vcpu)109 static inline void kvm_clear_exception_queue(struct kvm_vcpu *vcpu)
110 {
111 vcpu->arch.exception.pending = false;
112 vcpu->arch.exception.injected = false;
113 }
114
kvm_queue_interrupt(struct kvm_vcpu * vcpu,u8 vector,bool soft)115 static inline void kvm_queue_interrupt(struct kvm_vcpu *vcpu, u8 vector,
116 bool soft)
117 {
118 vcpu->arch.interrupt.injected = true;
119 vcpu->arch.interrupt.soft = soft;
120 vcpu->arch.interrupt.nr = vector;
121 }
122
kvm_clear_interrupt_queue(struct kvm_vcpu * vcpu)123 static inline void kvm_clear_interrupt_queue(struct kvm_vcpu *vcpu)
124 {
125 vcpu->arch.interrupt.injected = false;
126 }
127
kvm_event_needs_reinjection(struct kvm_vcpu * vcpu)128 static inline bool kvm_event_needs_reinjection(struct kvm_vcpu *vcpu)
129 {
130 return vcpu->arch.exception.injected || vcpu->arch.interrupt.injected ||
131 vcpu->arch.nmi_injected;
132 }
133
kvm_exception_is_soft(unsigned int nr)134 static inline bool kvm_exception_is_soft(unsigned int nr)
135 {
136 return (nr == BP_VECTOR) || (nr == OF_VECTOR);
137 }
138
is_protmode(struct kvm_vcpu * vcpu)139 static inline bool is_protmode(struct kvm_vcpu *vcpu)
140 {
141 return kvm_read_cr0_bits(vcpu, X86_CR0_PE);
142 }
143
is_long_mode(struct kvm_vcpu * vcpu)144 static inline int is_long_mode(struct kvm_vcpu *vcpu)
145 {
146 #ifdef CONFIG_X86_64
147 return vcpu->arch.efer & EFER_LMA;
148 #else
149 return 0;
150 #endif
151 }
152
is_64_bit_mode(struct kvm_vcpu * vcpu)153 static inline bool is_64_bit_mode(struct kvm_vcpu *vcpu)
154 {
155 int cs_db, cs_l;
156
157 WARN_ON_ONCE(vcpu->arch.guest_state_protected);
158
159 if (!is_long_mode(vcpu))
160 return false;
161 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
162 return cs_l;
163 }
164
is_64_bit_hypercall(struct kvm_vcpu * vcpu)165 static inline bool is_64_bit_hypercall(struct kvm_vcpu *vcpu)
166 {
167 /*
168 * If running with protected guest state, the CS register is not
169 * accessible. The hypercall register values will have had to been
170 * provided in 64-bit mode, so assume the guest is in 64-bit.
171 */
172 return vcpu->arch.guest_state_protected || is_64_bit_mode(vcpu);
173 }
174
x86_exception_has_error_code(unsigned int vector)175 static inline bool x86_exception_has_error_code(unsigned int vector)
176 {
177 static u32 exception_has_error_code = BIT(DF_VECTOR) | BIT(TS_VECTOR) |
178 BIT(NP_VECTOR) | BIT(SS_VECTOR) | BIT(GP_VECTOR) |
179 BIT(PF_VECTOR) | BIT(AC_VECTOR);
180
181 return (1U << vector) & exception_has_error_code;
182 }
183
mmu_is_nested(struct kvm_vcpu * vcpu)184 static inline bool mmu_is_nested(struct kvm_vcpu *vcpu)
185 {
186 return vcpu->arch.walk_mmu == &vcpu->arch.nested_mmu;
187 }
188
is_pae(struct kvm_vcpu * vcpu)189 static inline int is_pae(struct kvm_vcpu *vcpu)
190 {
191 return kvm_read_cr4_bits(vcpu, X86_CR4_PAE);
192 }
193
is_pse(struct kvm_vcpu * vcpu)194 static inline int is_pse(struct kvm_vcpu *vcpu)
195 {
196 return kvm_read_cr4_bits(vcpu, X86_CR4_PSE);
197 }
198
is_paging(struct kvm_vcpu * vcpu)199 static inline int is_paging(struct kvm_vcpu *vcpu)
200 {
201 return likely(kvm_read_cr0_bits(vcpu, X86_CR0_PG));
202 }
203
is_pae_paging(struct kvm_vcpu * vcpu)204 static inline bool is_pae_paging(struct kvm_vcpu *vcpu)
205 {
206 return !is_long_mode(vcpu) && is_pae(vcpu) && is_paging(vcpu);
207 }
208
vcpu_virt_addr_bits(struct kvm_vcpu * vcpu)209 static inline u8 vcpu_virt_addr_bits(struct kvm_vcpu *vcpu)
210 {
211 return kvm_read_cr4_bits(vcpu, X86_CR4_LA57) ? 57 : 48;
212 }
213
get_canonical(u64 la,u8 vaddr_bits)214 static inline u64 get_canonical(u64 la, u8 vaddr_bits)
215 {
216 return ((int64_t)la << (64 - vaddr_bits)) >> (64 - vaddr_bits);
217 }
218
is_noncanonical_address(u64 la,struct kvm_vcpu * vcpu)219 static inline bool is_noncanonical_address(u64 la, struct kvm_vcpu *vcpu)
220 {
221 return get_canonical(la, vcpu_virt_addr_bits(vcpu)) != la;
222 }
223
vcpu_cache_mmio_info(struct kvm_vcpu * vcpu,gva_t gva,gfn_t gfn,unsigned access)224 static inline void vcpu_cache_mmio_info(struct kvm_vcpu *vcpu,
225 gva_t gva, gfn_t gfn, unsigned access)
226 {
227 u64 gen = kvm_memslots(vcpu->kvm)->generation;
228
229 if (unlikely(gen & KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS))
230 return;
231
232 /*
233 * If this is a shadow nested page table, the "GVA" is
234 * actually a nGPA.
235 */
236 vcpu->arch.mmio_gva = mmu_is_nested(vcpu) ? 0 : gva & PAGE_MASK;
237 vcpu->arch.mmio_access = access;
238 vcpu->arch.mmio_gfn = gfn;
239 vcpu->arch.mmio_gen = gen;
240 }
241
vcpu_match_mmio_gen(struct kvm_vcpu * vcpu)242 static inline bool vcpu_match_mmio_gen(struct kvm_vcpu *vcpu)
243 {
244 return vcpu->arch.mmio_gen == kvm_memslots(vcpu->kvm)->generation;
245 }
246
247 /*
248 * Clear the mmio cache info for the given gva. If gva is MMIO_GVA_ANY, we
249 * clear all mmio cache info.
250 */
251 #define MMIO_GVA_ANY (~(gva_t)0)
252
vcpu_clear_mmio_info(struct kvm_vcpu * vcpu,gva_t gva)253 static inline void vcpu_clear_mmio_info(struct kvm_vcpu *vcpu, gva_t gva)
254 {
255 if (gva != MMIO_GVA_ANY && vcpu->arch.mmio_gva != (gva & PAGE_MASK))
256 return;
257
258 vcpu->arch.mmio_gva = 0;
259 }
260
vcpu_match_mmio_gva(struct kvm_vcpu * vcpu,unsigned long gva)261 static inline bool vcpu_match_mmio_gva(struct kvm_vcpu *vcpu, unsigned long gva)
262 {
263 if (vcpu_match_mmio_gen(vcpu) && vcpu->arch.mmio_gva &&
264 vcpu->arch.mmio_gva == (gva & PAGE_MASK))
265 return true;
266
267 return false;
268 }
269
vcpu_match_mmio_gpa(struct kvm_vcpu * vcpu,gpa_t gpa)270 static inline bool vcpu_match_mmio_gpa(struct kvm_vcpu *vcpu, gpa_t gpa)
271 {
272 if (vcpu_match_mmio_gen(vcpu) && vcpu->arch.mmio_gfn &&
273 vcpu->arch.mmio_gfn == gpa >> PAGE_SHIFT)
274 return true;
275
276 return false;
277 }
278
kvm_register_read(struct kvm_vcpu * vcpu,int reg)279 static inline unsigned long kvm_register_read(struct kvm_vcpu *vcpu, int reg)
280 {
281 unsigned long val = kvm_register_read_raw(vcpu, reg);
282
283 return is_64_bit_mode(vcpu) ? val : (u32)val;
284 }
285
kvm_register_write(struct kvm_vcpu * vcpu,int reg,unsigned long val)286 static inline void kvm_register_write(struct kvm_vcpu *vcpu,
287 int reg, unsigned long val)
288 {
289 if (!is_64_bit_mode(vcpu))
290 val = (u32)val;
291 return kvm_register_write_raw(vcpu, reg, val);
292 }
293
kvm_check_has_quirk(struct kvm * kvm,u64 quirk)294 static inline bool kvm_check_has_quirk(struct kvm *kvm, u64 quirk)
295 {
296 return !(kvm->arch.disabled_quirks & quirk);
297 }
298
kvm_vcpu_latch_init(struct kvm_vcpu * vcpu)299 static inline bool kvm_vcpu_latch_init(struct kvm_vcpu *vcpu)
300 {
301 return is_smm(vcpu) || static_call(kvm_x86_apic_init_signal_blocked)(vcpu);
302 }
303
304 void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock, int sec_hi_ofs);
305 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip);
306
307 u64 get_kvmclock_ns(struct kvm *kvm);
308
309 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
310 gva_t addr, void *val, unsigned int bytes,
311 struct x86_exception *exception);
312
313 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu,
314 gva_t addr, void *val, unsigned int bytes,
315 struct x86_exception *exception);
316
317 int handle_ud(struct kvm_vcpu *vcpu);
318
319 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu);
320
321 void kvm_vcpu_mtrr_init(struct kvm_vcpu *vcpu);
322 u8 kvm_mtrr_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn);
323 bool kvm_mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data);
324 int kvm_mtrr_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data);
325 int kvm_mtrr_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
326 bool kvm_mtrr_check_gfn_range_consistency(struct kvm_vcpu *vcpu, gfn_t gfn,
327 int page_num);
328 bool kvm_vector_hashing_enabled(void);
329 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code);
330 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type,
331 void *insn, int insn_len);
332 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
333 int emulation_type, void *insn, int insn_len);
334 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu);
335
336 extern u64 host_xcr0;
337 extern u64 supported_xcr0;
338 extern u64 host_xss;
339 extern u64 supported_xss;
340
kvm_mpx_supported(void)341 static inline bool kvm_mpx_supported(void)
342 {
343 return (supported_xcr0 & (XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR))
344 == (XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR);
345 }
346
347 extern unsigned int min_timer_period_us;
348
349 extern bool enable_vmware_backdoor;
350
351 extern int pi_inject_timer;
352
353 extern bool report_ignored_msrs;
354
nsec_to_cycles(struct kvm_vcpu * vcpu,u64 nsec)355 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
356 {
357 return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
358 vcpu->arch.virtual_tsc_shift);
359 }
360
361 /* Same "calling convention" as do_div:
362 * - divide (n << 32) by base
363 * - put result in n
364 * - return remainder
365 */
366 #define do_shl32_div32(n, base) \
367 ({ \
368 u32 __quot, __rem; \
369 asm("divl %2" : "=a" (__quot), "=d" (__rem) \
370 : "rm" (base), "0" (0), "1" ((u32) n)); \
371 n = __quot; \
372 __rem; \
373 })
374
kvm_mwait_in_guest(struct kvm * kvm)375 static inline bool kvm_mwait_in_guest(struct kvm *kvm)
376 {
377 return kvm->arch.mwait_in_guest;
378 }
379
kvm_hlt_in_guest(struct kvm * kvm)380 static inline bool kvm_hlt_in_guest(struct kvm *kvm)
381 {
382 return kvm->arch.hlt_in_guest;
383 }
384
kvm_pause_in_guest(struct kvm * kvm)385 static inline bool kvm_pause_in_guest(struct kvm *kvm)
386 {
387 return kvm->arch.pause_in_guest;
388 }
389
kvm_cstate_in_guest(struct kvm * kvm)390 static inline bool kvm_cstate_in_guest(struct kvm *kvm)
391 {
392 return kvm->arch.cstate_in_guest;
393 }
394
395 DECLARE_PER_CPU(struct kvm_vcpu *, current_vcpu);
396
kvm_before_interrupt(struct kvm_vcpu * vcpu)397 static inline void kvm_before_interrupt(struct kvm_vcpu *vcpu)
398 {
399 __this_cpu_write(current_vcpu, vcpu);
400 }
401
kvm_after_interrupt(struct kvm_vcpu * vcpu)402 static inline void kvm_after_interrupt(struct kvm_vcpu *vcpu)
403 {
404 __this_cpu_write(current_vcpu, NULL);
405 }
406
407
kvm_pat_valid(u64 data)408 static inline bool kvm_pat_valid(u64 data)
409 {
410 if (data & 0xF8F8F8F8F8F8F8F8ull)
411 return false;
412 /* 0, 1, 4, 5, 6, 7 are valid values. */
413 return (data | ((data & 0x0202020202020202ull) << 1)) == data;
414 }
415
kvm_dr7_valid(u64 data)416 static inline bool kvm_dr7_valid(u64 data)
417 {
418 /* Bits [63:32] are reserved */
419 return !(data >> 32);
420 }
kvm_dr6_valid(u64 data)421 static inline bool kvm_dr6_valid(u64 data)
422 {
423 /* Bits [63:32] are reserved */
424 return !(data >> 32);
425 }
426
427 /*
428 * Trigger machine check on the host. We assume all the MSRs are already set up
429 * by the CPU and that we still run on the same CPU as the MCE occurred on.
430 * We pass a fake environment to the machine check handler because we want
431 * the guest to be always treated like user space, no matter what context
432 * it used internally.
433 */
kvm_machine_check(void)434 static inline void kvm_machine_check(void)
435 {
436 #if defined(CONFIG_X86_MCE)
437 struct pt_regs regs = {
438 .cs = 3, /* Fake ring 3 no matter what the guest ran on */
439 .flags = X86_EFLAGS_IF,
440 };
441
442 do_machine_check(®s);
443 #endif
444 }
445
446 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu);
447 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu);
448 int kvm_spec_ctrl_test_value(u64 value);
449 bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
450 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
451 struct x86_exception *e);
452 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva);
453 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type);
454
455 /*
456 * Internal error codes that are used to indicate that MSR emulation encountered
457 * an error that should result in #GP in the guest, unless userspace
458 * handles it.
459 */
460 #define KVM_MSR_RET_INVALID 2 /* in-kernel MSR emulation #GP condition */
461 #define KVM_MSR_RET_FILTERED 3 /* #GP due to userspace MSR filter */
462
463 #define __cr4_reserved_bits(__cpu_has, __c) \
464 ({ \
465 u64 __reserved_bits = CR4_RESERVED_BITS; \
466 \
467 if (!__cpu_has(__c, X86_FEATURE_XSAVE)) \
468 __reserved_bits |= X86_CR4_OSXSAVE; \
469 if (!__cpu_has(__c, X86_FEATURE_SMEP)) \
470 __reserved_bits |= X86_CR4_SMEP; \
471 if (!__cpu_has(__c, X86_FEATURE_SMAP)) \
472 __reserved_bits |= X86_CR4_SMAP; \
473 if (!__cpu_has(__c, X86_FEATURE_FSGSBASE)) \
474 __reserved_bits |= X86_CR4_FSGSBASE; \
475 if (!__cpu_has(__c, X86_FEATURE_PKU)) \
476 __reserved_bits |= X86_CR4_PKE; \
477 if (!__cpu_has(__c, X86_FEATURE_LA57)) \
478 __reserved_bits |= X86_CR4_LA57; \
479 if (!__cpu_has(__c, X86_FEATURE_UMIP)) \
480 __reserved_bits |= X86_CR4_UMIP; \
481 if (!__cpu_has(__c, X86_FEATURE_VMX)) \
482 __reserved_bits |= X86_CR4_VMXE; \
483 if (!__cpu_has(__c, X86_FEATURE_PCID)) \
484 __reserved_bits |= X86_CR4_PCIDE; \
485 __reserved_bits; \
486 })
487
488 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t src, unsigned int bytes,
489 void *dst);
490 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t src, unsigned int bytes,
491 void *dst);
492 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size,
493 unsigned int port, void *data, unsigned int count,
494 int in);
495
496 #endif
497