1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Driver for the SWIM3 (Super Woz Integrated Machine 3)
4 * floppy controller found on Power Macintoshes.
5 *
6 * Copyright (C) 1996 Paul Mackerras.
7 */
8
9 /*
10 * TODO:
11 * handle 2 drives
12 * handle GCR disks
13 */
14
15 #undef DEBUG
16
17 #include <linux/stddef.h>
18 #include <linux/kernel.h>
19 #include <linux/sched/signal.h>
20 #include <linux/timer.h>
21 #include <linux/delay.h>
22 #include <linux/fd.h>
23 #include <linux/ioctl.h>
24 #include <linux/blk-mq.h>
25 #include <linux/interrupt.h>
26 #include <linux/mutex.h>
27 #include <linux/module.h>
28 #include <linux/spinlock.h>
29 #include <linux/wait.h>
30 #include <linux/major.h>
31 #include <asm/io.h>
32 #include <asm/dbdma.h>
33 #include <asm/prom.h>
34 #include <linux/uaccess.h>
35 #include <asm/mediabay.h>
36 #include <asm/machdep.h>
37 #include <asm/pmac_feature.h>
38
39 #define MAX_FLOPPIES 2
40
41 static DEFINE_MUTEX(swim3_mutex);
42 static struct gendisk *disks[MAX_FLOPPIES];
43
44 enum swim_state {
45 idle,
46 locating,
47 seeking,
48 settling,
49 do_transfer,
50 jogging,
51 available,
52 revalidating,
53 ejecting
54 };
55
56 #define REG(x) unsigned char x; char x ## _pad[15];
57
58 /*
59 * The names for these registers mostly represent speculation on my part.
60 * It will be interesting to see how close they are to the names Apple uses.
61 */
62 struct swim3 {
63 REG(data);
64 REG(timer); /* counts down at 1MHz */
65 REG(error);
66 REG(mode);
67 REG(select); /* controls CA0, CA1, CA2 and LSTRB signals */
68 REG(setup);
69 REG(control); /* writing bits clears them */
70 REG(status); /* writing bits sets them in control */
71 REG(intr);
72 REG(nseek); /* # tracks to seek */
73 REG(ctrack); /* current track number */
74 REG(csect); /* current sector number */
75 REG(gap3); /* size of gap 3 in track format */
76 REG(sector); /* sector # to read or write */
77 REG(nsect); /* # sectors to read or write */
78 REG(intr_enable);
79 };
80
81 #define control_bic control
82 #define control_bis status
83
84 /* Bits in select register */
85 #define CA_MASK 7
86 #define LSTRB 8
87
88 /* Bits in control register */
89 #define DO_SEEK 0x80
90 #define FORMAT 0x40
91 #define SELECT 0x20
92 #define WRITE_SECTORS 0x10
93 #define DO_ACTION 0x08
94 #define DRIVE2_ENABLE 0x04
95 #define DRIVE_ENABLE 0x02
96 #define INTR_ENABLE 0x01
97
98 /* Bits in status register */
99 #define FIFO_1BYTE 0x80
100 #define FIFO_2BYTE 0x40
101 #define ERROR 0x20
102 #define DATA 0x08
103 #define RDDATA 0x04
104 #define INTR_PENDING 0x02
105 #define MARK_BYTE 0x01
106
107 /* Bits in intr and intr_enable registers */
108 #define ERROR_INTR 0x20
109 #define DATA_CHANGED 0x10
110 #define TRANSFER_DONE 0x08
111 #define SEEN_SECTOR 0x04
112 #define SEEK_DONE 0x02
113 #define TIMER_DONE 0x01
114
115 /* Bits in error register */
116 #define ERR_DATA_CRC 0x80
117 #define ERR_ADDR_CRC 0x40
118 #define ERR_OVERRUN 0x04
119 #define ERR_UNDERRUN 0x01
120
121 /* Bits in setup register */
122 #define S_SW_RESET 0x80
123 #define S_GCR_WRITE 0x40
124 #define S_IBM_DRIVE 0x20
125 #define S_TEST_MODE 0x10
126 #define S_FCLK_DIV2 0x08
127 #define S_GCR 0x04
128 #define S_COPY_PROT 0x02
129 #define S_INV_WDATA 0x01
130
131 /* Select values for swim3_action */
132 #define SEEK_POSITIVE 0
133 #define SEEK_NEGATIVE 4
134 #define STEP 1
135 #define MOTOR_ON 2
136 #define MOTOR_OFF 6
137 #define INDEX 3
138 #define EJECT 7
139 #define SETMFM 9
140 #define SETGCR 13
141
142 /* Select values for swim3_select and swim3_readbit */
143 #define STEP_DIR 0
144 #define STEPPING 1
145 #define MOTOR_ON 2
146 #define RELAX 3 /* also eject in progress */
147 #define READ_DATA_0 4
148 #define ONEMEG_DRIVE 5
149 #define SINGLE_SIDED 6 /* drive or diskette is 4MB type? */
150 #define DRIVE_PRESENT 7
151 #define DISK_IN 8
152 #define WRITE_PROT 9
153 #define TRACK_ZERO 10
154 #define TACHO 11
155 #define READ_DATA_1 12
156 #define GCR_MODE 13
157 #define SEEK_COMPLETE 14
158 #define TWOMEG_MEDIA 15
159
160 /* Definitions of values used in writing and formatting */
161 #define DATA_ESCAPE 0x99
162 #define GCR_SYNC_EXC 0x3f
163 #define GCR_SYNC_CONV 0x80
164 #define GCR_FIRST_MARK 0xd5
165 #define GCR_SECOND_MARK 0xaa
166 #define GCR_ADDR_MARK "\xd5\xaa\x00"
167 #define GCR_DATA_MARK "\xd5\xaa\x0b"
168 #define GCR_SLIP_BYTE "\x27\xaa"
169 #define GCR_SELF_SYNC "\x3f\xbf\x1e\x34\x3c\x3f"
170
171 #define DATA_99 "\x99\x99"
172 #define MFM_ADDR_MARK "\x99\xa1\x99\xa1\x99\xa1\x99\xfe"
173 #define MFM_INDEX_MARK "\x99\xc2\x99\xc2\x99\xc2\x99\xfc"
174 #define MFM_GAP_LEN 12
175
176 struct floppy_state {
177 enum swim_state state;
178 struct swim3 __iomem *swim3; /* hardware registers */
179 struct dbdma_regs __iomem *dma; /* DMA controller registers */
180 int swim3_intr; /* interrupt number for SWIM3 */
181 int dma_intr; /* interrupt number for DMA channel */
182 int cur_cyl; /* cylinder head is on, or -1 */
183 int cur_sector; /* last sector we saw go past */
184 int req_cyl; /* the cylinder for the current r/w request */
185 int head; /* head number ditto */
186 int req_sector; /* sector number ditto */
187 int scount; /* # sectors we're transferring at present */
188 int retries;
189 int settle_time;
190 int secpercyl; /* disk geometry information */
191 int secpertrack;
192 int total_secs;
193 int write_prot; /* 1 if write-protected, 0 if not, -1 dunno */
194 struct dbdma_cmd *dma_cmd;
195 int ref_count;
196 int expect_cyl;
197 struct timer_list timeout;
198 int timeout_pending;
199 int ejected;
200 wait_queue_head_t wait;
201 int wanted;
202 struct macio_dev *mdev;
203 char dbdma_cmd_space[5 * sizeof(struct dbdma_cmd)];
204 int index;
205 struct request *cur_req;
206 struct blk_mq_tag_set tag_set;
207 };
208
209 #define swim3_err(fmt, arg...) dev_err(&fs->mdev->ofdev.dev, "[fd%d] " fmt, fs->index, arg)
210 #define swim3_warn(fmt, arg...) dev_warn(&fs->mdev->ofdev.dev, "[fd%d] " fmt, fs->index, arg)
211 #define swim3_info(fmt, arg...) dev_info(&fs->mdev->ofdev.dev, "[fd%d] " fmt, fs->index, arg)
212
213 #ifdef DEBUG
214 #define swim3_dbg(fmt, arg...) dev_dbg(&fs->mdev->ofdev.dev, "[fd%d] " fmt, fs->index, arg)
215 #else
216 #define swim3_dbg(fmt, arg...) do { } while(0)
217 #endif
218
219 static struct floppy_state floppy_states[MAX_FLOPPIES];
220 static int floppy_count = 0;
221 static DEFINE_SPINLOCK(swim3_lock);
222
223 static unsigned short write_preamble[] = {
224 0x4e4e, 0x4e4e, 0x4e4e, 0x4e4e, 0x4e4e, /* gap field */
225 0, 0, 0, 0, 0, 0, /* sync field */
226 0x99a1, 0x99a1, 0x99a1, 0x99fb, /* data address mark */
227 0x990f /* no escape for 512 bytes */
228 };
229
230 static unsigned short write_postamble[] = {
231 0x9904, /* insert CRC */
232 0x4e4e, 0x4e4e,
233 0x9908, /* stop writing */
234 0, 0, 0, 0, 0, 0
235 };
236
237 static void seek_track(struct floppy_state *fs, int n);
238 static void act(struct floppy_state *fs);
239 static void scan_timeout(struct timer_list *t);
240 static void seek_timeout(struct timer_list *t);
241 static void settle_timeout(struct timer_list *t);
242 static void xfer_timeout(struct timer_list *t);
243 static irqreturn_t swim3_interrupt(int irq, void *dev_id);
244 /*static void fd_dma_interrupt(int irq, void *dev_id);*/
245 static int grab_drive(struct floppy_state *fs, enum swim_state state,
246 int interruptible);
247 static void release_drive(struct floppy_state *fs);
248 static int fd_eject(struct floppy_state *fs);
249 static int floppy_ioctl(struct block_device *bdev, fmode_t mode,
250 unsigned int cmd, unsigned long param);
251 static int floppy_open(struct block_device *bdev, fmode_t mode);
252 static void floppy_release(struct gendisk *disk, fmode_t mode);
253 static unsigned int floppy_check_events(struct gendisk *disk,
254 unsigned int clearing);
255 static int floppy_revalidate(struct gendisk *disk);
256
swim3_end_request(struct floppy_state * fs,blk_status_t err,unsigned int nr_bytes)257 static bool swim3_end_request(struct floppy_state *fs, blk_status_t err, unsigned int nr_bytes)
258 {
259 struct request *req = fs->cur_req;
260
261 swim3_dbg(" end request, err=%d nr_bytes=%d, cur_req=%p\n",
262 err, nr_bytes, req);
263
264 if (err)
265 nr_bytes = blk_rq_cur_bytes(req);
266 if (blk_update_request(req, err, nr_bytes))
267 return true;
268 __blk_mq_end_request(req, err);
269 fs->cur_req = NULL;
270 return false;
271 }
272
swim3_select(struct floppy_state * fs,int sel)273 static void swim3_select(struct floppy_state *fs, int sel)
274 {
275 struct swim3 __iomem *sw = fs->swim3;
276
277 out_8(&sw->select, RELAX);
278 if (sel & 8)
279 out_8(&sw->control_bis, SELECT);
280 else
281 out_8(&sw->control_bic, SELECT);
282 out_8(&sw->select, sel & CA_MASK);
283 }
284
swim3_action(struct floppy_state * fs,int action)285 static void swim3_action(struct floppy_state *fs, int action)
286 {
287 struct swim3 __iomem *sw = fs->swim3;
288
289 swim3_select(fs, action);
290 udelay(1);
291 out_8(&sw->select, sw->select | LSTRB);
292 udelay(2);
293 out_8(&sw->select, sw->select & ~LSTRB);
294 udelay(1);
295 }
296
swim3_readbit(struct floppy_state * fs,int bit)297 static int swim3_readbit(struct floppy_state *fs, int bit)
298 {
299 struct swim3 __iomem *sw = fs->swim3;
300 int stat;
301
302 swim3_select(fs, bit);
303 udelay(1);
304 stat = in_8(&sw->status);
305 return (stat & DATA) == 0;
306 }
307
swim3_queue_rq(struct blk_mq_hw_ctx * hctx,const struct blk_mq_queue_data * bd)308 static blk_status_t swim3_queue_rq(struct blk_mq_hw_ctx *hctx,
309 const struct blk_mq_queue_data *bd)
310 {
311 struct floppy_state *fs = hctx->queue->queuedata;
312 struct request *req = bd->rq;
313 unsigned long x;
314
315 spin_lock_irq(&swim3_lock);
316 if (fs->cur_req || fs->state != idle) {
317 spin_unlock_irq(&swim3_lock);
318 return BLK_STS_DEV_RESOURCE;
319 }
320 blk_mq_start_request(req);
321 fs->cur_req = req;
322 if (fs->mdev->media_bay &&
323 check_media_bay(fs->mdev->media_bay) != MB_FD) {
324 swim3_dbg("%s", " media bay absent, dropping req\n");
325 swim3_end_request(fs, BLK_STS_IOERR, 0);
326 goto out;
327 }
328 if (fs->ejected) {
329 swim3_dbg("%s", " disk ejected\n");
330 swim3_end_request(fs, BLK_STS_IOERR, 0);
331 goto out;
332 }
333 if (rq_data_dir(req) == WRITE) {
334 if (fs->write_prot < 0)
335 fs->write_prot = swim3_readbit(fs, WRITE_PROT);
336 if (fs->write_prot) {
337 swim3_dbg("%s", " try to write, disk write protected\n");
338 swim3_end_request(fs, BLK_STS_IOERR, 0);
339 goto out;
340 }
341 }
342
343 /*
344 * Do not remove the cast. blk_rq_pos(req) is now a sector_t and can be
345 * 64 bits, but it will never go past 32 bits for this driver anyway, so
346 * we can safely cast it down and not have to do a 64/32 division
347 */
348 fs->req_cyl = ((long)blk_rq_pos(req)) / fs->secpercyl;
349 x = ((long)blk_rq_pos(req)) % fs->secpercyl;
350 fs->head = x / fs->secpertrack;
351 fs->req_sector = x % fs->secpertrack + 1;
352 fs->state = do_transfer;
353 fs->retries = 0;
354
355 act(fs);
356
357 out:
358 spin_unlock_irq(&swim3_lock);
359 return BLK_STS_OK;
360 }
361
set_timeout(struct floppy_state * fs,int nticks,void (* proc)(struct timer_list * t))362 static void set_timeout(struct floppy_state *fs, int nticks,
363 void (*proc)(struct timer_list *t))
364 {
365 if (fs->timeout_pending)
366 del_timer(&fs->timeout);
367 fs->timeout.expires = jiffies + nticks;
368 fs->timeout.function = proc;
369 add_timer(&fs->timeout);
370 fs->timeout_pending = 1;
371 }
372
scan_track(struct floppy_state * fs)373 static inline void scan_track(struct floppy_state *fs)
374 {
375 struct swim3 __iomem *sw = fs->swim3;
376
377 swim3_select(fs, READ_DATA_0);
378 in_8(&sw->intr); /* clear SEEN_SECTOR bit */
379 in_8(&sw->error);
380 out_8(&sw->intr_enable, SEEN_SECTOR);
381 out_8(&sw->control_bis, DO_ACTION);
382 /* enable intr when track found */
383 set_timeout(fs, HZ, scan_timeout); /* enable timeout */
384 }
385
seek_track(struct floppy_state * fs,int n)386 static inline void seek_track(struct floppy_state *fs, int n)
387 {
388 struct swim3 __iomem *sw = fs->swim3;
389
390 if (n >= 0) {
391 swim3_action(fs, SEEK_POSITIVE);
392 sw->nseek = n;
393 } else {
394 swim3_action(fs, SEEK_NEGATIVE);
395 sw->nseek = -n;
396 }
397 fs->expect_cyl = (fs->cur_cyl >= 0)? fs->cur_cyl + n: -1;
398 swim3_select(fs, STEP);
399 in_8(&sw->error);
400 /* enable intr when seek finished */
401 out_8(&sw->intr_enable, SEEK_DONE);
402 out_8(&sw->control_bis, DO_SEEK);
403 set_timeout(fs, 3*HZ, seek_timeout); /* enable timeout */
404 fs->settle_time = 0;
405 }
406
407 /*
408 * XXX: this is a horrible hack, but at least allows ppc32 to get
409 * out of defining virt_to_bus, and this driver out of using the
410 * deprecated block layer bounce buffering for highmem addresses
411 * for no good reason.
412 */
swim3_phys_to_bus(phys_addr_t paddr)413 static unsigned long swim3_phys_to_bus(phys_addr_t paddr)
414 {
415 return paddr + PCI_DRAM_OFFSET;
416 }
417
swim3_bio_phys(struct bio * bio)418 static phys_addr_t swim3_bio_phys(struct bio *bio)
419 {
420 return page_to_phys(bio_page(bio)) + bio_offset(bio);
421 }
422
init_dma(struct dbdma_cmd * cp,int cmd,phys_addr_t paddr,int count)423 static inline void init_dma(struct dbdma_cmd *cp, int cmd,
424 phys_addr_t paddr, int count)
425 {
426 cp->req_count = cpu_to_le16(count);
427 cp->command = cpu_to_le16(cmd);
428 cp->phy_addr = cpu_to_le32(swim3_phys_to_bus(paddr));
429 cp->xfer_status = 0;
430 }
431
setup_transfer(struct floppy_state * fs)432 static inline void setup_transfer(struct floppy_state *fs)
433 {
434 int n;
435 struct swim3 __iomem *sw = fs->swim3;
436 struct dbdma_cmd *cp = fs->dma_cmd;
437 struct dbdma_regs __iomem *dr = fs->dma;
438 struct request *req = fs->cur_req;
439
440 if (blk_rq_cur_sectors(req) <= 0) {
441 swim3_warn("%s", "Transfer 0 sectors ?\n");
442 return;
443 }
444 if (rq_data_dir(req) == WRITE)
445 n = 1;
446 else {
447 n = fs->secpertrack - fs->req_sector + 1;
448 if (n > blk_rq_cur_sectors(req))
449 n = blk_rq_cur_sectors(req);
450 }
451
452 swim3_dbg(" setup xfer at sect %d (of %d) head %d for %d\n",
453 fs->req_sector, fs->secpertrack, fs->head, n);
454
455 fs->scount = n;
456 swim3_select(fs, fs->head? READ_DATA_1: READ_DATA_0);
457 out_8(&sw->sector, fs->req_sector);
458 out_8(&sw->nsect, n);
459 out_8(&sw->gap3, 0);
460 out_le32(&dr->cmdptr, swim3_phys_to_bus(virt_to_phys(cp)));
461 if (rq_data_dir(req) == WRITE) {
462 /* Set up 3 dma commands: write preamble, data, postamble */
463 init_dma(cp, OUTPUT_MORE, virt_to_phys(write_preamble),
464 sizeof(write_preamble));
465 ++cp;
466 init_dma(cp, OUTPUT_MORE, swim3_bio_phys(req->bio), 512);
467 ++cp;
468 init_dma(cp, OUTPUT_LAST, virt_to_phys(write_postamble),
469 sizeof(write_postamble));
470 } else {
471 init_dma(cp, INPUT_LAST, swim3_bio_phys(req->bio), n * 512);
472 }
473 ++cp;
474 out_le16(&cp->command, DBDMA_STOP);
475 out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
476 in_8(&sw->error);
477 out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
478 if (rq_data_dir(req) == WRITE)
479 out_8(&sw->control_bis, WRITE_SECTORS);
480 in_8(&sw->intr);
481 out_le32(&dr->control, (RUN << 16) | RUN);
482 /* enable intr when transfer complete */
483 out_8(&sw->intr_enable, TRANSFER_DONE);
484 out_8(&sw->control_bis, DO_ACTION);
485 set_timeout(fs, 2*HZ, xfer_timeout); /* enable timeout */
486 }
487
act(struct floppy_state * fs)488 static void act(struct floppy_state *fs)
489 {
490 for (;;) {
491 swim3_dbg(" act loop, state=%d, req_cyl=%d, cur_cyl=%d\n",
492 fs->state, fs->req_cyl, fs->cur_cyl);
493
494 switch (fs->state) {
495 case idle:
496 return; /* XXX shouldn't get here */
497
498 case locating:
499 if (swim3_readbit(fs, TRACK_ZERO)) {
500 swim3_dbg("%s", " locate track 0\n");
501 fs->cur_cyl = 0;
502 if (fs->req_cyl == 0)
503 fs->state = do_transfer;
504 else
505 fs->state = seeking;
506 break;
507 }
508 scan_track(fs);
509 return;
510
511 case seeking:
512 if (fs->cur_cyl < 0) {
513 fs->expect_cyl = -1;
514 fs->state = locating;
515 break;
516 }
517 if (fs->req_cyl == fs->cur_cyl) {
518 swim3_warn("%s", "Whoops, seeking 0\n");
519 fs->state = do_transfer;
520 break;
521 }
522 seek_track(fs, fs->req_cyl - fs->cur_cyl);
523 return;
524
525 case settling:
526 /* check for SEEK_COMPLETE after 30ms */
527 fs->settle_time = (HZ + 32) / 33;
528 set_timeout(fs, fs->settle_time, settle_timeout);
529 return;
530
531 case do_transfer:
532 if (fs->cur_cyl != fs->req_cyl) {
533 if (fs->retries > 5) {
534 swim3_err("Wrong cylinder in transfer, want: %d got %d\n",
535 fs->req_cyl, fs->cur_cyl);
536 swim3_end_request(fs, BLK_STS_IOERR, 0);
537 fs->state = idle;
538 return;
539 }
540 fs->state = seeking;
541 break;
542 }
543 setup_transfer(fs);
544 return;
545
546 case jogging:
547 seek_track(fs, -5);
548 return;
549
550 default:
551 swim3_err("Unknown state %d\n", fs->state);
552 return;
553 }
554 }
555 }
556
scan_timeout(struct timer_list * t)557 static void scan_timeout(struct timer_list *t)
558 {
559 struct floppy_state *fs = from_timer(fs, t, timeout);
560 struct swim3 __iomem *sw = fs->swim3;
561 unsigned long flags;
562
563 swim3_dbg("* scan timeout, state=%d\n", fs->state);
564
565 spin_lock_irqsave(&swim3_lock, flags);
566 fs->timeout_pending = 0;
567 out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
568 out_8(&sw->select, RELAX);
569 out_8(&sw->intr_enable, 0);
570 fs->cur_cyl = -1;
571 if (fs->retries > 5) {
572 swim3_end_request(fs, BLK_STS_IOERR, 0);
573 fs->state = idle;
574 } else {
575 fs->state = jogging;
576 act(fs);
577 }
578 spin_unlock_irqrestore(&swim3_lock, flags);
579 }
580
seek_timeout(struct timer_list * t)581 static void seek_timeout(struct timer_list *t)
582 {
583 struct floppy_state *fs = from_timer(fs, t, timeout);
584 struct swim3 __iomem *sw = fs->swim3;
585 unsigned long flags;
586
587 swim3_dbg("* seek timeout, state=%d\n", fs->state);
588
589 spin_lock_irqsave(&swim3_lock, flags);
590 fs->timeout_pending = 0;
591 out_8(&sw->control_bic, DO_SEEK);
592 out_8(&sw->select, RELAX);
593 out_8(&sw->intr_enable, 0);
594 swim3_err("%s", "Seek timeout\n");
595 swim3_end_request(fs, BLK_STS_IOERR, 0);
596 fs->state = idle;
597 spin_unlock_irqrestore(&swim3_lock, flags);
598 }
599
settle_timeout(struct timer_list * t)600 static void settle_timeout(struct timer_list *t)
601 {
602 struct floppy_state *fs = from_timer(fs, t, timeout);
603 struct swim3 __iomem *sw = fs->swim3;
604 unsigned long flags;
605
606 swim3_dbg("* settle timeout, state=%d\n", fs->state);
607
608 spin_lock_irqsave(&swim3_lock, flags);
609 fs->timeout_pending = 0;
610 if (swim3_readbit(fs, SEEK_COMPLETE)) {
611 out_8(&sw->select, RELAX);
612 fs->state = locating;
613 act(fs);
614 goto unlock;
615 }
616 out_8(&sw->select, RELAX);
617 if (fs->settle_time < 2*HZ) {
618 ++fs->settle_time;
619 set_timeout(fs, 1, settle_timeout);
620 goto unlock;
621 }
622 swim3_err("%s", "Seek settle timeout\n");
623 swim3_end_request(fs, BLK_STS_IOERR, 0);
624 fs->state = idle;
625 unlock:
626 spin_unlock_irqrestore(&swim3_lock, flags);
627 }
628
xfer_timeout(struct timer_list * t)629 static void xfer_timeout(struct timer_list *t)
630 {
631 struct floppy_state *fs = from_timer(fs, t, timeout);
632 struct swim3 __iomem *sw = fs->swim3;
633 struct dbdma_regs __iomem *dr = fs->dma;
634 unsigned long flags;
635 int n;
636
637 swim3_dbg("* xfer timeout, state=%d\n", fs->state);
638
639 spin_lock_irqsave(&swim3_lock, flags);
640 fs->timeout_pending = 0;
641 out_le32(&dr->control, RUN << 16);
642 /* We must wait a bit for dbdma to stop */
643 for (n = 0; (in_le32(&dr->status) & ACTIVE) && n < 1000; n++)
644 udelay(1);
645 out_8(&sw->intr_enable, 0);
646 out_8(&sw->control_bic, WRITE_SECTORS | DO_ACTION);
647 out_8(&sw->select, RELAX);
648 swim3_err("Timeout %sing sector %ld\n",
649 (rq_data_dir(fs->cur_req)==WRITE? "writ": "read"),
650 (long)blk_rq_pos(fs->cur_req));
651 swim3_end_request(fs, BLK_STS_IOERR, 0);
652 fs->state = idle;
653 spin_unlock_irqrestore(&swim3_lock, flags);
654 }
655
swim3_interrupt(int irq,void * dev_id)656 static irqreturn_t swim3_interrupt(int irq, void *dev_id)
657 {
658 struct floppy_state *fs = (struct floppy_state *) dev_id;
659 struct swim3 __iomem *sw = fs->swim3;
660 int intr, err, n;
661 int stat, resid;
662 struct dbdma_regs __iomem *dr;
663 struct dbdma_cmd *cp;
664 unsigned long flags;
665 struct request *req = fs->cur_req;
666
667 swim3_dbg("* interrupt, state=%d\n", fs->state);
668
669 spin_lock_irqsave(&swim3_lock, flags);
670 intr = in_8(&sw->intr);
671 err = (intr & ERROR_INTR)? in_8(&sw->error): 0;
672 if ((intr & ERROR_INTR) && fs->state != do_transfer)
673 swim3_err("Non-transfer error interrupt: state=%d, dir=%x, intr=%x, err=%x\n",
674 fs->state, rq_data_dir(req), intr, err);
675 switch (fs->state) {
676 case locating:
677 if (intr & SEEN_SECTOR) {
678 out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
679 out_8(&sw->select, RELAX);
680 out_8(&sw->intr_enable, 0);
681 del_timer(&fs->timeout);
682 fs->timeout_pending = 0;
683 if (sw->ctrack == 0xff) {
684 swim3_err("%s", "Seen sector but cyl=ff?\n");
685 fs->cur_cyl = -1;
686 if (fs->retries > 5) {
687 swim3_end_request(fs, BLK_STS_IOERR, 0);
688 fs->state = idle;
689 } else {
690 fs->state = jogging;
691 act(fs);
692 }
693 break;
694 }
695 fs->cur_cyl = sw->ctrack;
696 fs->cur_sector = sw->csect;
697 if (fs->expect_cyl != -1 && fs->expect_cyl != fs->cur_cyl)
698 swim3_err("Expected cyl %d, got %d\n",
699 fs->expect_cyl, fs->cur_cyl);
700 fs->state = do_transfer;
701 act(fs);
702 }
703 break;
704 case seeking:
705 case jogging:
706 if (sw->nseek == 0) {
707 out_8(&sw->control_bic, DO_SEEK);
708 out_8(&sw->select, RELAX);
709 out_8(&sw->intr_enable, 0);
710 del_timer(&fs->timeout);
711 fs->timeout_pending = 0;
712 if (fs->state == seeking)
713 ++fs->retries;
714 fs->state = settling;
715 act(fs);
716 }
717 break;
718 case settling:
719 out_8(&sw->intr_enable, 0);
720 del_timer(&fs->timeout);
721 fs->timeout_pending = 0;
722 act(fs);
723 break;
724 case do_transfer:
725 if ((intr & (ERROR_INTR | TRANSFER_DONE)) == 0)
726 break;
727 out_8(&sw->intr_enable, 0);
728 out_8(&sw->control_bic, WRITE_SECTORS | DO_ACTION);
729 out_8(&sw->select, RELAX);
730 del_timer(&fs->timeout);
731 fs->timeout_pending = 0;
732 dr = fs->dma;
733 cp = fs->dma_cmd;
734 if (rq_data_dir(req) == WRITE)
735 ++cp;
736 /*
737 * Check that the main data transfer has finished.
738 * On writing, the swim3 sometimes doesn't use
739 * up all the bytes of the postamble, so we can still
740 * see DMA active here. That doesn't matter as long
741 * as all the sector data has been transferred.
742 */
743 if ((intr & ERROR_INTR) == 0 && cp->xfer_status == 0) {
744 /* wait a little while for DMA to complete */
745 for (n = 0; n < 100; ++n) {
746 if (cp->xfer_status != 0)
747 break;
748 udelay(1);
749 barrier();
750 }
751 }
752 /* turn off DMA */
753 out_le32(&dr->control, (RUN | PAUSE) << 16);
754 stat = le16_to_cpu(cp->xfer_status);
755 resid = le16_to_cpu(cp->res_count);
756 if (intr & ERROR_INTR) {
757 n = fs->scount - 1 - resid / 512;
758 if (n > 0) {
759 blk_update_request(req, 0, n << 9);
760 fs->req_sector += n;
761 }
762 if (fs->retries < 5) {
763 ++fs->retries;
764 act(fs);
765 } else {
766 swim3_err("Error %sing block %ld (err=%x)\n",
767 rq_data_dir(req) == WRITE? "writ": "read",
768 (long)blk_rq_pos(req), err);
769 swim3_end_request(fs, BLK_STS_IOERR, 0);
770 fs->state = idle;
771 }
772 } else {
773 if ((stat & ACTIVE) == 0 || resid != 0) {
774 /* musta been an error */
775 swim3_err("fd dma error: stat=%x resid=%d\n", stat, resid);
776 swim3_err(" state=%d, dir=%x, intr=%x, err=%x\n",
777 fs->state, rq_data_dir(req), intr, err);
778 swim3_end_request(fs, BLK_STS_IOERR, 0);
779 fs->state = idle;
780 break;
781 }
782 fs->retries = 0;
783 if (swim3_end_request(fs, 0, fs->scount << 9)) {
784 fs->req_sector += fs->scount;
785 if (fs->req_sector > fs->secpertrack) {
786 fs->req_sector -= fs->secpertrack;
787 if (++fs->head > 1) {
788 fs->head = 0;
789 ++fs->req_cyl;
790 }
791 }
792 act(fs);
793 } else
794 fs->state = idle;
795 }
796 break;
797 default:
798 swim3_err("Don't know what to do in state %d\n", fs->state);
799 }
800 spin_unlock_irqrestore(&swim3_lock, flags);
801 return IRQ_HANDLED;
802 }
803
804 /*
805 static void fd_dma_interrupt(int irq, void *dev_id)
806 {
807 }
808 */
809
810 /* Called under the mutex to grab exclusive access to a drive */
grab_drive(struct floppy_state * fs,enum swim_state state,int interruptible)811 static int grab_drive(struct floppy_state *fs, enum swim_state state,
812 int interruptible)
813 {
814 unsigned long flags;
815
816 swim3_dbg("%s", "-> grab drive\n");
817
818 spin_lock_irqsave(&swim3_lock, flags);
819 if (fs->state != idle && fs->state != available) {
820 ++fs->wanted;
821 /* this will enable irqs in order to sleep */
822 if (!interruptible)
823 wait_event_lock_irq(fs->wait,
824 fs->state == available,
825 swim3_lock);
826 else if (wait_event_interruptible_lock_irq(fs->wait,
827 fs->state == available,
828 swim3_lock)) {
829 --fs->wanted;
830 spin_unlock_irqrestore(&swim3_lock, flags);
831 return -EINTR;
832 }
833 --fs->wanted;
834 }
835 fs->state = state;
836 spin_unlock_irqrestore(&swim3_lock, flags);
837
838 return 0;
839 }
840
release_drive(struct floppy_state * fs)841 static void release_drive(struct floppy_state *fs)
842 {
843 struct request_queue *q = disks[fs->index]->queue;
844 unsigned long flags;
845
846 swim3_dbg("%s", "-> release drive\n");
847
848 spin_lock_irqsave(&swim3_lock, flags);
849 fs->state = idle;
850 spin_unlock_irqrestore(&swim3_lock, flags);
851
852 blk_mq_freeze_queue(q);
853 blk_mq_quiesce_queue(q);
854 blk_mq_unquiesce_queue(q);
855 blk_mq_unfreeze_queue(q);
856 }
857
fd_eject(struct floppy_state * fs)858 static int fd_eject(struct floppy_state *fs)
859 {
860 int err, n;
861
862 err = grab_drive(fs, ejecting, 1);
863 if (err)
864 return err;
865 swim3_action(fs, EJECT);
866 for (n = 20; n > 0; --n) {
867 if (signal_pending(current)) {
868 err = -EINTR;
869 break;
870 }
871 swim3_select(fs, RELAX);
872 schedule_timeout_interruptible(1);
873 if (swim3_readbit(fs, DISK_IN) == 0)
874 break;
875 }
876 swim3_select(fs, RELAX);
877 udelay(150);
878 fs->ejected = 1;
879 release_drive(fs);
880 return err;
881 }
882
883 static struct floppy_struct floppy_type =
884 { 2880,18,2,80,0,0x1B,0x00,0xCF,0x6C,NULL }; /* 7 1.44MB 3.5" */
885
floppy_locked_ioctl(struct block_device * bdev,fmode_t mode,unsigned int cmd,unsigned long param)886 static int floppy_locked_ioctl(struct block_device *bdev, fmode_t mode,
887 unsigned int cmd, unsigned long param)
888 {
889 struct floppy_state *fs = bdev->bd_disk->private_data;
890 int err;
891
892 if ((cmd & 0x80) && !capable(CAP_SYS_ADMIN))
893 return -EPERM;
894
895 if (fs->mdev->media_bay &&
896 check_media_bay(fs->mdev->media_bay) != MB_FD)
897 return -ENXIO;
898
899 switch (cmd) {
900 case FDEJECT:
901 if (fs->ref_count != 1)
902 return -EBUSY;
903 err = fd_eject(fs);
904 return err;
905 case FDGETPRM:
906 if (copy_to_user((void __user *) param, &floppy_type,
907 sizeof(struct floppy_struct)))
908 return -EFAULT;
909 return 0;
910 }
911 return -ENOTTY;
912 }
913
floppy_ioctl(struct block_device * bdev,fmode_t mode,unsigned int cmd,unsigned long param)914 static int floppy_ioctl(struct block_device *bdev, fmode_t mode,
915 unsigned int cmd, unsigned long param)
916 {
917 int ret;
918
919 mutex_lock(&swim3_mutex);
920 ret = floppy_locked_ioctl(bdev, mode, cmd, param);
921 mutex_unlock(&swim3_mutex);
922
923 return ret;
924 }
925
floppy_open(struct block_device * bdev,fmode_t mode)926 static int floppy_open(struct block_device *bdev, fmode_t mode)
927 {
928 struct floppy_state *fs = bdev->bd_disk->private_data;
929 struct swim3 __iomem *sw = fs->swim3;
930 int n, err = 0;
931
932 if (fs->ref_count == 0) {
933 if (fs->mdev->media_bay &&
934 check_media_bay(fs->mdev->media_bay) != MB_FD)
935 return -ENXIO;
936 out_8(&sw->setup, S_IBM_DRIVE | S_FCLK_DIV2);
937 out_8(&sw->control_bic, 0xff);
938 out_8(&sw->mode, 0x95);
939 udelay(10);
940 out_8(&sw->intr_enable, 0);
941 out_8(&sw->control_bis, DRIVE_ENABLE | INTR_ENABLE);
942 swim3_action(fs, MOTOR_ON);
943 fs->write_prot = -1;
944 fs->cur_cyl = -1;
945 for (n = 0; n < 2 * HZ; ++n) {
946 if (n >= HZ/30 && swim3_readbit(fs, SEEK_COMPLETE))
947 break;
948 if (signal_pending(current)) {
949 err = -EINTR;
950 break;
951 }
952 swim3_select(fs, RELAX);
953 schedule_timeout_interruptible(1);
954 }
955 if (err == 0 && (swim3_readbit(fs, SEEK_COMPLETE) == 0
956 || swim3_readbit(fs, DISK_IN) == 0))
957 err = -ENXIO;
958 swim3_action(fs, SETMFM);
959 swim3_select(fs, RELAX);
960
961 } else if (fs->ref_count == -1 || mode & FMODE_EXCL)
962 return -EBUSY;
963
964 if (err == 0 && (mode & FMODE_NDELAY) == 0
965 && (mode & (FMODE_READ|FMODE_WRITE))) {
966 if (bdev_check_media_change(bdev))
967 floppy_revalidate(bdev->bd_disk);
968 if (fs->ejected)
969 err = -ENXIO;
970 }
971
972 if (err == 0 && (mode & FMODE_WRITE)) {
973 if (fs->write_prot < 0)
974 fs->write_prot = swim3_readbit(fs, WRITE_PROT);
975 if (fs->write_prot)
976 err = -EROFS;
977 }
978
979 if (err) {
980 if (fs->ref_count == 0) {
981 swim3_action(fs, MOTOR_OFF);
982 out_8(&sw->control_bic, DRIVE_ENABLE | INTR_ENABLE);
983 swim3_select(fs, RELAX);
984 }
985 return err;
986 }
987
988 if (mode & FMODE_EXCL)
989 fs->ref_count = -1;
990 else
991 ++fs->ref_count;
992
993 return 0;
994 }
995
floppy_unlocked_open(struct block_device * bdev,fmode_t mode)996 static int floppy_unlocked_open(struct block_device *bdev, fmode_t mode)
997 {
998 int ret;
999
1000 mutex_lock(&swim3_mutex);
1001 ret = floppy_open(bdev, mode);
1002 mutex_unlock(&swim3_mutex);
1003
1004 return ret;
1005 }
1006
floppy_release(struct gendisk * disk,fmode_t mode)1007 static void floppy_release(struct gendisk *disk, fmode_t mode)
1008 {
1009 struct floppy_state *fs = disk->private_data;
1010 struct swim3 __iomem *sw = fs->swim3;
1011
1012 mutex_lock(&swim3_mutex);
1013 if (fs->ref_count > 0)
1014 --fs->ref_count;
1015 else if (fs->ref_count == -1)
1016 fs->ref_count = 0;
1017 if (fs->ref_count == 0) {
1018 swim3_action(fs, MOTOR_OFF);
1019 out_8(&sw->control_bic, 0xff);
1020 swim3_select(fs, RELAX);
1021 }
1022 mutex_unlock(&swim3_mutex);
1023 }
1024
floppy_check_events(struct gendisk * disk,unsigned int clearing)1025 static unsigned int floppy_check_events(struct gendisk *disk,
1026 unsigned int clearing)
1027 {
1028 struct floppy_state *fs = disk->private_data;
1029 return fs->ejected ? DISK_EVENT_MEDIA_CHANGE : 0;
1030 }
1031
floppy_revalidate(struct gendisk * disk)1032 static int floppy_revalidate(struct gendisk *disk)
1033 {
1034 struct floppy_state *fs = disk->private_data;
1035 struct swim3 __iomem *sw;
1036 int ret, n;
1037
1038 if (fs->mdev->media_bay &&
1039 check_media_bay(fs->mdev->media_bay) != MB_FD)
1040 return -ENXIO;
1041
1042 sw = fs->swim3;
1043 grab_drive(fs, revalidating, 0);
1044 out_8(&sw->intr_enable, 0);
1045 out_8(&sw->control_bis, DRIVE_ENABLE);
1046 swim3_action(fs, MOTOR_ON); /* necessary? */
1047 fs->write_prot = -1;
1048 fs->cur_cyl = -1;
1049 mdelay(1);
1050 for (n = HZ; n > 0; --n) {
1051 if (swim3_readbit(fs, SEEK_COMPLETE))
1052 break;
1053 if (signal_pending(current))
1054 break;
1055 swim3_select(fs, RELAX);
1056 schedule_timeout_interruptible(1);
1057 }
1058 ret = swim3_readbit(fs, SEEK_COMPLETE) == 0
1059 || swim3_readbit(fs, DISK_IN) == 0;
1060 if (ret)
1061 swim3_action(fs, MOTOR_OFF);
1062 else {
1063 fs->ejected = 0;
1064 swim3_action(fs, SETMFM);
1065 }
1066 swim3_select(fs, RELAX);
1067
1068 release_drive(fs);
1069 return ret;
1070 }
1071
1072 static const struct block_device_operations floppy_fops = {
1073 .open = floppy_unlocked_open,
1074 .release = floppy_release,
1075 .ioctl = floppy_ioctl,
1076 .check_events = floppy_check_events,
1077 };
1078
1079 static const struct blk_mq_ops swim3_mq_ops = {
1080 .queue_rq = swim3_queue_rq,
1081 };
1082
swim3_mb_event(struct macio_dev * mdev,int mb_state)1083 static void swim3_mb_event(struct macio_dev* mdev, int mb_state)
1084 {
1085 struct floppy_state *fs = macio_get_drvdata(mdev);
1086 struct swim3 __iomem *sw;
1087
1088 if (!fs)
1089 return;
1090
1091 sw = fs->swim3;
1092
1093 if (mb_state != MB_FD)
1094 return;
1095
1096 /* Clear state */
1097 out_8(&sw->intr_enable, 0);
1098 in_8(&sw->intr);
1099 in_8(&sw->error);
1100 }
1101
swim3_add_device(struct macio_dev * mdev,int index)1102 static int swim3_add_device(struct macio_dev *mdev, int index)
1103 {
1104 struct device_node *swim = mdev->ofdev.dev.of_node;
1105 struct floppy_state *fs = &floppy_states[index];
1106 int rc = -EBUSY;
1107
1108 fs->mdev = mdev;
1109 fs->index = index;
1110
1111 /* Check & Request resources */
1112 if (macio_resource_count(mdev) < 2) {
1113 swim3_err("%s", "No address in device-tree\n");
1114 return -ENXIO;
1115 }
1116 if (macio_irq_count(mdev) < 1) {
1117 swim3_err("%s", "No interrupt in device-tree\n");
1118 return -ENXIO;
1119 }
1120 if (macio_request_resource(mdev, 0, "swim3 (mmio)")) {
1121 swim3_err("%s", "Can't request mmio resource\n");
1122 return -EBUSY;
1123 }
1124 if (macio_request_resource(mdev, 1, "swim3 (dma)")) {
1125 swim3_err("%s", "Can't request dma resource\n");
1126 macio_release_resource(mdev, 0);
1127 return -EBUSY;
1128 }
1129 dev_set_drvdata(&mdev->ofdev.dev, fs);
1130
1131 if (mdev->media_bay == NULL)
1132 pmac_call_feature(PMAC_FTR_SWIM3_ENABLE, swim, 0, 1);
1133
1134 fs->state = idle;
1135 fs->swim3 = (struct swim3 __iomem *)
1136 ioremap(macio_resource_start(mdev, 0), 0x200);
1137 if (fs->swim3 == NULL) {
1138 swim3_err("%s", "Couldn't map mmio registers\n");
1139 rc = -ENOMEM;
1140 goto out_release;
1141 }
1142 fs->dma = (struct dbdma_regs __iomem *)
1143 ioremap(macio_resource_start(mdev, 1), 0x200);
1144 if (fs->dma == NULL) {
1145 swim3_err("%s", "Couldn't map dma registers\n");
1146 iounmap(fs->swim3);
1147 rc = -ENOMEM;
1148 goto out_release;
1149 }
1150 fs->swim3_intr = macio_irq(mdev, 0);
1151 fs->dma_intr = macio_irq(mdev, 1);
1152 fs->cur_cyl = -1;
1153 fs->cur_sector = -1;
1154 fs->secpercyl = 36;
1155 fs->secpertrack = 18;
1156 fs->total_secs = 2880;
1157 init_waitqueue_head(&fs->wait);
1158
1159 fs->dma_cmd = (struct dbdma_cmd *) DBDMA_ALIGN(fs->dbdma_cmd_space);
1160 memset(fs->dma_cmd, 0, 2 * sizeof(struct dbdma_cmd));
1161 fs->dma_cmd[1].command = cpu_to_le16(DBDMA_STOP);
1162
1163 if (mdev->media_bay == NULL || check_media_bay(mdev->media_bay) == MB_FD)
1164 swim3_mb_event(mdev, MB_FD);
1165
1166 if (request_irq(fs->swim3_intr, swim3_interrupt, 0, "SWIM3", fs)) {
1167 swim3_err("%s", "Couldn't request interrupt\n");
1168 pmac_call_feature(PMAC_FTR_SWIM3_ENABLE, swim, 0, 0);
1169 goto out_unmap;
1170 }
1171
1172 timer_setup(&fs->timeout, NULL, 0);
1173
1174 swim3_info("SWIM3 floppy controller %s\n",
1175 mdev->media_bay ? "in media bay" : "");
1176
1177 return 0;
1178
1179 out_unmap:
1180 iounmap(fs->dma);
1181 iounmap(fs->swim3);
1182
1183 out_release:
1184 macio_release_resource(mdev, 0);
1185 macio_release_resource(mdev, 1);
1186
1187 return rc;
1188 }
1189
swim3_attach(struct macio_dev * mdev,const struct of_device_id * match)1190 static int swim3_attach(struct macio_dev *mdev,
1191 const struct of_device_id *match)
1192 {
1193 struct floppy_state *fs;
1194 struct gendisk *disk;
1195 int rc;
1196
1197 if (floppy_count >= MAX_FLOPPIES)
1198 return -ENXIO;
1199
1200 if (floppy_count == 0) {
1201 rc = register_blkdev(FLOPPY_MAJOR, "fd");
1202 if (rc)
1203 return rc;
1204 }
1205
1206 fs = &floppy_states[floppy_count];
1207 memset(fs, 0, sizeof(*fs));
1208
1209 rc = blk_mq_alloc_sq_tag_set(&fs->tag_set, &swim3_mq_ops, 2,
1210 BLK_MQ_F_SHOULD_MERGE);
1211 if (rc)
1212 goto out_unregister;
1213
1214 disk = blk_mq_alloc_disk(&fs->tag_set, fs);
1215 if (IS_ERR(disk)) {
1216 rc = PTR_ERR(disk);
1217 goto out_free_tag_set;
1218 }
1219
1220 rc = swim3_add_device(mdev, floppy_count);
1221 if (rc)
1222 goto out_cleanup_disk;
1223
1224 disk->major = FLOPPY_MAJOR;
1225 disk->first_minor = floppy_count;
1226 disk->minors = 1;
1227 disk->fops = &floppy_fops;
1228 disk->private_data = fs;
1229 disk->events = DISK_EVENT_MEDIA_CHANGE;
1230 disk->flags |= GENHD_FL_REMOVABLE;
1231 sprintf(disk->disk_name, "fd%d", floppy_count);
1232 set_capacity(disk, 2880);
1233 rc = add_disk(disk);
1234 if (rc)
1235 goto out_cleanup_disk;
1236
1237 disks[floppy_count++] = disk;
1238 return 0;
1239
1240 out_cleanup_disk:
1241 blk_cleanup_disk(disk);
1242 out_free_tag_set:
1243 blk_mq_free_tag_set(&fs->tag_set);
1244 out_unregister:
1245 if (floppy_count == 0)
1246 unregister_blkdev(FLOPPY_MAJOR, "fd");
1247 return rc;
1248 }
1249
1250 static const struct of_device_id swim3_match[] =
1251 {
1252 {
1253 .name = "swim3",
1254 },
1255 {
1256 .compatible = "ohare-swim3"
1257 },
1258 {
1259 .compatible = "swim3"
1260 },
1261 { /* end of list */ }
1262 };
1263
1264 static struct macio_driver swim3_driver =
1265 {
1266 .driver = {
1267 .name = "swim3",
1268 .of_match_table = swim3_match,
1269 },
1270 .probe = swim3_attach,
1271 #ifdef CONFIG_PMAC_MEDIABAY
1272 .mediabay_event = swim3_mb_event,
1273 #endif
1274 #if 0
1275 .suspend = swim3_suspend,
1276 .resume = swim3_resume,
1277 #endif
1278 };
1279
1280
swim3_init(void)1281 int swim3_init(void)
1282 {
1283 macio_register_driver(&swim3_driver);
1284 return 0;
1285 }
1286
1287 module_init(swim3_init)
1288
1289 MODULE_LICENSE("GPL");
1290 MODULE_AUTHOR("Paul Mackerras");
1291 MODULE_ALIAS_BLOCKDEV_MAJOR(FLOPPY_MAJOR);
1292