1 /*
2 * Broadcom NetXtreme-E RoCE driver.
3 *
4 * Copyright (c) 2016 - 2017, Broadcom. All rights reserved. The term
5 * Broadcom refers to Broadcom Limited and/or its subsidiaries.
6 *
7 * This software is available to you under a choice of one of two
8 * licenses. You may choose to be licensed under the terms of the GNU
9 * General Public License (GPL) Version 2, available from the file
10 * COPYING in the main directory of this source tree, or the
11 * BSD license below:
12 *
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions
15 * are met:
16 *
17 * 1. Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer.
19 * 2. Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in
21 * the documentation and/or other materials provided with the
22 * distribution.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS''
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
26 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS
28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
31 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
32 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
33 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
34 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 *
36 * Description: Main component of the bnxt_re driver
37 */
38
39 #include <linux/module.h>
40 #include <linux/netdevice.h>
41 #include <linux/ethtool.h>
42 #include <linux/mutex.h>
43 #include <linux/list.h>
44 #include <linux/rculist.h>
45 #include <linux/spinlock.h>
46 #include <linux/pci.h>
47 #include <net/dcbnl.h>
48 #include <net/ipv6.h>
49 #include <net/addrconf.h>
50 #include <linux/if_ether.h>
51
52 #include <rdma/ib_verbs.h>
53 #include <rdma/ib_user_verbs.h>
54 #include <rdma/ib_umem.h>
55 #include <rdma/ib_addr.h>
56
57 #include "bnxt_ulp.h"
58 #include "roce_hsi.h"
59 #include "qplib_res.h"
60 #include "qplib_sp.h"
61 #include "qplib_fp.h"
62 #include "qplib_rcfw.h"
63 #include "bnxt_re.h"
64 #include "ib_verbs.h"
65 #include <rdma/bnxt_re-abi.h>
66 #include "bnxt.h"
67 #include "hw_counters.h"
68
69 static char version[] =
70 BNXT_RE_DESC "\n";
71
72 MODULE_AUTHOR("Eddie Wai <eddie.wai@broadcom.com>");
73 MODULE_DESCRIPTION(BNXT_RE_DESC " Driver");
74 MODULE_LICENSE("Dual BSD/GPL");
75
76 /* globals */
77 static struct list_head bnxt_re_dev_list = LIST_HEAD_INIT(bnxt_re_dev_list);
78 /* Mutex to protect the list of bnxt_re devices added */
79 static DEFINE_MUTEX(bnxt_re_dev_lock);
80 static struct workqueue_struct *bnxt_re_wq;
81 static void bnxt_re_remove_device(struct bnxt_re_dev *rdev);
82 static void bnxt_re_dealloc_driver(struct ib_device *ib_dev);
83 static void bnxt_re_stop_irq(void *handle);
84 static void bnxt_re_dev_stop(struct bnxt_re_dev *rdev);
85
bnxt_re_set_drv_mode(struct bnxt_re_dev * rdev,u8 mode)86 static void bnxt_re_set_drv_mode(struct bnxt_re_dev *rdev, u8 mode)
87 {
88 struct bnxt_qplib_chip_ctx *cctx;
89
90 cctx = rdev->chip_ctx;
91 cctx->modes.wqe_mode = bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx) ?
92 mode : BNXT_QPLIB_WQE_MODE_STATIC;
93 }
94
bnxt_re_destroy_chip_ctx(struct bnxt_re_dev * rdev)95 static void bnxt_re_destroy_chip_ctx(struct bnxt_re_dev *rdev)
96 {
97 struct bnxt_qplib_chip_ctx *chip_ctx;
98
99 if (!rdev->chip_ctx)
100 return;
101 chip_ctx = rdev->chip_ctx;
102 rdev->chip_ctx = NULL;
103 rdev->rcfw.res = NULL;
104 rdev->qplib_res.cctx = NULL;
105 rdev->qplib_res.pdev = NULL;
106 rdev->qplib_res.netdev = NULL;
107 kfree(chip_ctx);
108 }
109
bnxt_re_setup_chip_ctx(struct bnxt_re_dev * rdev,u8 wqe_mode)110 static int bnxt_re_setup_chip_ctx(struct bnxt_re_dev *rdev, u8 wqe_mode)
111 {
112 struct bnxt_qplib_chip_ctx *chip_ctx;
113 struct bnxt_en_dev *en_dev;
114 struct bnxt *bp;
115
116 en_dev = rdev->en_dev;
117 bp = netdev_priv(en_dev->net);
118
119 chip_ctx = kzalloc(sizeof(*chip_ctx), GFP_KERNEL);
120 if (!chip_ctx)
121 return -ENOMEM;
122 chip_ctx->chip_num = bp->chip_num;
123 chip_ctx->hw_stats_size = bp->hw_ring_stats_size;
124
125 rdev->chip_ctx = chip_ctx;
126 /* rest members to follow eventually */
127
128 rdev->qplib_res.cctx = rdev->chip_ctx;
129 rdev->rcfw.res = &rdev->qplib_res;
130 rdev->qplib_res.dattr = &rdev->dev_attr;
131 rdev->qplib_res.is_vf = BNXT_VF(bp);
132
133 bnxt_re_set_drv_mode(rdev, wqe_mode);
134 if (bnxt_qplib_determine_atomics(en_dev->pdev))
135 ibdev_info(&rdev->ibdev,
136 "platform doesn't support global atomics.");
137 return 0;
138 }
139
140 /* SR-IOV helper functions */
141
bnxt_re_get_sriov_func_type(struct bnxt_re_dev * rdev)142 static void bnxt_re_get_sriov_func_type(struct bnxt_re_dev *rdev)
143 {
144 struct bnxt *bp;
145
146 bp = netdev_priv(rdev->en_dev->net);
147 if (BNXT_VF(bp))
148 rdev->is_virtfn = 1;
149 }
150
151 /* Set the maximum number of each resource that the driver actually wants
152 * to allocate. This may be up to the maximum number the firmware has
153 * reserved for the function. The driver may choose to allocate fewer
154 * resources than the firmware maximum.
155 */
bnxt_re_limit_pf_res(struct bnxt_re_dev * rdev)156 static void bnxt_re_limit_pf_res(struct bnxt_re_dev *rdev)
157 {
158 struct bnxt_qplib_dev_attr *attr;
159 struct bnxt_qplib_ctx *ctx;
160 int i;
161
162 attr = &rdev->dev_attr;
163 ctx = &rdev->qplib_ctx;
164
165 ctx->qpc_count = min_t(u32, BNXT_RE_MAX_QPC_COUNT,
166 attr->max_qp);
167 ctx->mrw_count = BNXT_RE_MAX_MRW_COUNT_256K;
168 /* Use max_mr from fw since max_mrw does not get set */
169 ctx->mrw_count = min_t(u32, ctx->mrw_count, attr->max_mr);
170 ctx->srqc_count = min_t(u32, BNXT_RE_MAX_SRQC_COUNT,
171 attr->max_srq);
172 ctx->cq_count = min_t(u32, BNXT_RE_MAX_CQ_COUNT, attr->max_cq);
173 if (!bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx))
174 for (i = 0; i < MAX_TQM_ALLOC_REQ; i++)
175 rdev->qplib_ctx.tqm_ctx.qcount[i] =
176 rdev->dev_attr.tqm_alloc_reqs[i];
177 }
178
bnxt_re_limit_vf_res(struct bnxt_qplib_ctx * qplib_ctx,u32 num_vf)179 static void bnxt_re_limit_vf_res(struct bnxt_qplib_ctx *qplib_ctx, u32 num_vf)
180 {
181 struct bnxt_qplib_vf_res *vf_res;
182 u32 mrws = 0;
183 u32 vf_pct;
184 u32 nvfs;
185
186 vf_res = &qplib_ctx->vf_res;
187 /*
188 * Reserve a set of resources for the PF. Divide the remaining
189 * resources among the VFs
190 */
191 vf_pct = 100 - BNXT_RE_PCT_RSVD_FOR_PF;
192 nvfs = num_vf;
193 num_vf = 100 * num_vf;
194 vf_res->max_qp_per_vf = (qplib_ctx->qpc_count * vf_pct) / num_vf;
195 vf_res->max_srq_per_vf = (qplib_ctx->srqc_count * vf_pct) / num_vf;
196 vf_res->max_cq_per_vf = (qplib_ctx->cq_count * vf_pct) / num_vf;
197 /*
198 * The driver allows many more MRs than other resources. If the
199 * firmware does also, then reserve a fixed amount for the PF and
200 * divide the rest among VFs. VFs may use many MRs for NFS
201 * mounts, ISER, NVME applications, etc. If the firmware severely
202 * restricts the number of MRs, then let PF have half and divide
203 * the rest among VFs, as for the other resource types.
204 */
205 if (qplib_ctx->mrw_count < BNXT_RE_MAX_MRW_COUNT_64K) {
206 mrws = qplib_ctx->mrw_count * vf_pct;
207 nvfs = num_vf;
208 } else {
209 mrws = qplib_ctx->mrw_count - BNXT_RE_RESVD_MR_FOR_PF;
210 }
211 vf_res->max_mrw_per_vf = (mrws / nvfs);
212 vf_res->max_gid_per_vf = BNXT_RE_MAX_GID_PER_VF;
213 }
214
bnxt_re_set_resource_limits(struct bnxt_re_dev * rdev)215 static void bnxt_re_set_resource_limits(struct bnxt_re_dev *rdev)
216 {
217 u32 num_vfs;
218
219 memset(&rdev->qplib_ctx.vf_res, 0, sizeof(struct bnxt_qplib_vf_res));
220 bnxt_re_limit_pf_res(rdev);
221
222 num_vfs = bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx) ?
223 BNXT_RE_GEN_P5_MAX_VF : rdev->num_vfs;
224 if (num_vfs)
225 bnxt_re_limit_vf_res(&rdev->qplib_ctx, num_vfs);
226 }
227
228 /* for handling bnxt_en callbacks later */
bnxt_re_stop(void * p)229 static void bnxt_re_stop(void *p)
230 {
231 struct bnxt_re_dev *rdev = p;
232 struct bnxt *bp;
233
234 if (!rdev)
235 return;
236 ASSERT_RTNL();
237
238 /* L2 driver invokes this callback during device error/crash or device
239 * reset. Current RoCE driver doesn't recover the device in case of
240 * error. Handle the error by dispatching fatal events to all qps
241 * ie. by calling bnxt_re_dev_stop and release the MSIx vectors as
242 * L2 driver want to modify the MSIx table.
243 */
244 bp = netdev_priv(rdev->netdev);
245
246 ibdev_info(&rdev->ibdev, "Handle device stop call from L2 driver");
247 /* Check the current device state from L2 structure and move the
248 * device to detached state if FW_FATAL_COND is set.
249 * This prevents more commands to HW during clean-up,
250 * in case the device is already in error.
251 */
252 if (test_bit(BNXT_STATE_FW_FATAL_COND, &bp->state))
253 set_bit(ERR_DEVICE_DETACHED, &rdev->rcfw.cmdq.flags);
254
255 bnxt_re_dev_stop(rdev);
256 bnxt_re_stop_irq(rdev);
257 /* Move the device states to detached and avoid sending any more
258 * commands to HW
259 */
260 set_bit(BNXT_RE_FLAG_ERR_DEVICE_DETACHED, &rdev->flags);
261 set_bit(ERR_DEVICE_DETACHED, &rdev->rcfw.cmdq.flags);
262 }
263
bnxt_re_start(void * p)264 static void bnxt_re_start(void *p)
265 {
266 }
267
bnxt_re_sriov_config(void * p,int num_vfs)268 static void bnxt_re_sriov_config(void *p, int num_vfs)
269 {
270 struct bnxt_re_dev *rdev = p;
271
272 if (!rdev)
273 return;
274
275 if (test_bit(BNXT_RE_FLAG_ERR_DEVICE_DETACHED, &rdev->flags))
276 return;
277 rdev->num_vfs = num_vfs;
278 if (!bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx)) {
279 bnxt_re_set_resource_limits(rdev);
280 bnxt_qplib_set_func_resources(&rdev->qplib_res, &rdev->rcfw,
281 &rdev->qplib_ctx);
282 }
283 }
284
bnxt_re_shutdown(void * p)285 static void bnxt_re_shutdown(void *p)
286 {
287 struct bnxt_re_dev *rdev = p;
288
289 if (!rdev)
290 return;
291 ASSERT_RTNL();
292 /* Release the MSIx vectors before queuing unregister */
293 bnxt_re_stop_irq(rdev);
294 ib_unregister_device_queued(&rdev->ibdev);
295 }
296
bnxt_re_stop_irq(void * handle)297 static void bnxt_re_stop_irq(void *handle)
298 {
299 struct bnxt_re_dev *rdev = (struct bnxt_re_dev *)handle;
300 struct bnxt_qplib_rcfw *rcfw = &rdev->rcfw;
301 struct bnxt_qplib_nq *nq;
302 int indx;
303
304 for (indx = BNXT_RE_NQ_IDX; indx < rdev->num_msix; indx++) {
305 nq = &rdev->nq[indx - 1];
306 bnxt_qplib_nq_stop_irq(nq, false);
307 }
308
309 bnxt_qplib_rcfw_stop_irq(rcfw, false);
310 }
311
bnxt_re_start_irq(void * handle,struct bnxt_msix_entry * ent)312 static void bnxt_re_start_irq(void *handle, struct bnxt_msix_entry *ent)
313 {
314 struct bnxt_re_dev *rdev = (struct bnxt_re_dev *)handle;
315 struct bnxt_msix_entry *msix_ent = rdev->msix_entries;
316 struct bnxt_qplib_rcfw *rcfw = &rdev->rcfw;
317 struct bnxt_qplib_nq *nq;
318 int indx, rc;
319
320 if (!ent) {
321 /* Not setting the f/w timeout bit in rcfw.
322 * During the driver unload the first command
323 * to f/w will timeout and that will set the
324 * timeout bit.
325 */
326 ibdev_err(&rdev->ibdev, "Failed to re-start IRQs\n");
327 return;
328 }
329
330 /* Vectors may change after restart, so update with new vectors
331 * in device sctructure.
332 */
333 for (indx = 0; indx < rdev->num_msix; indx++)
334 rdev->msix_entries[indx].vector = ent[indx].vector;
335
336 bnxt_qplib_rcfw_start_irq(rcfw, msix_ent[BNXT_RE_AEQ_IDX].vector,
337 false);
338 for (indx = BNXT_RE_NQ_IDX ; indx < rdev->num_msix; indx++) {
339 nq = &rdev->nq[indx - 1];
340 rc = bnxt_qplib_nq_start_irq(nq, indx - 1,
341 msix_ent[indx].vector, false);
342 if (rc)
343 ibdev_warn(&rdev->ibdev, "Failed to reinit NQ index %d\n",
344 indx - 1);
345 }
346 }
347
348 static struct bnxt_ulp_ops bnxt_re_ulp_ops = {
349 .ulp_async_notifier = NULL,
350 .ulp_stop = bnxt_re_stop,
351 .ulp_start = bnxt_re_start,
352 .ulp_sriov_config = bnxt_re_sriov_config,
353 .ulp_shutdown = bnxt_re_shutdown,
354 .ulp_irq_stop = bnxt_re_stop_irq,
355 .ulp_irq_restart = bnxt_re_start_irq
356 };
357
358 /* RoCE -> Net driver */
359
360 /* Driver registration routines used to let the networking driver (bnxt_en)
361 * to know that the RoCE driver is now installed
362 */
bnxt_re_unregister_netdev(struct bnxt_re_dev * rdev)363 static int bnxt_re_unregister_netdev(struct bnxt_re_dev *rdev)
364 {
365 struct bnxt_en_dev *en_dev;
366 int rc;
367
368 if (!rdev)
369 return -EINVAL;
370
371 en_dev = rdev->en_dev;
372
373 rc = en_dev->en_ops->bnxt_unregister_device(rdev->en_dev,
374 BNXT_ROCE_ULP);
375 return rc;
376 }
377
bnxt_re_register_netdev(struct bnxt_re_dev * rdev)378 static int bnxt_re_register_netdev(struct bnxt_re_dev *rdev)
379 {
380 struct bnxt_en_dev *en_dev;
381 int rc = 0;
382
383 if (!rdev)
384 return -EINVAL;
385
386 en_dev = rdev->en_dev;
387
388 rc = en_dev->en_ops->bnxt_register_device(en_dev, BNXT_ROCE_ULP,
389 &bnxt_re_ulp_ops, rdev);
390 rdev->qplib_res.pdev = rdev->en_dev->pdev;
391 return rc;
392 }
393
bnxt_re_free_msix(struct bnxt_re_dev * rdev)394 static int bnxt_re_free_msix(struct bnxt_re_dev *rdev)
395 {
396 struct bnxt_en_dev *en_dev;
397 int rc;
398
399 if (!rdev)
400 return -EINVAL;
401
402 en_dev = rdev->en_dev;
403
404
405 rc = en_dev->en_ops->bnxt_free_msix(rdev->en_dev, BNXT_ROCE_ULP);
406
407 return rc;
408 }
409
bnxt_re_request_msix(struct bnxt_re_dev * rdev)410 static int bnxt_re_request_msix(struct bnxt_re_dev *rdev)
411 {
412 int rc = 0, num_msix_want = BNXT_RE_MAX_MSIX, num_msix_got;
413 struct bnxt_en_dev *en_dev;
414
415 if (!rdev)
416 return -EINVAL;
417
418 en_dev = rdev->en_dev;
419
420 num_msix_want = min_t(u32, BNXT_RE_MAX_MSIX, num_online_cpus());
421
422 num_msix_got = en_dev->en_ops->bnxt_request_msix(en_dev, BNXT_ROCE_ULP,
423 rdev->msix_entries,
424 num_msix_want);
425 if (num_msix_got < BNXT_RE_MIN_MSIX) {
426 rc = -EINVAL;
427 goto done;
428 }
429 if (num_msix_got != num_msix_want) {
430 ibdev_warn(&rdev->ibdev,
431 "Requested %d MSI-X vectors, got %d\n",
432 num_msix_want, num_msix_got);
433 }
434 rdev->num_msix = num_msix_got;
435 done:
436 return rc;
437 }
438
bnxt_re_init_hwrm_hdr(struct bnxt_re_dev * rdev,struct input * hdr,u16 opcd,u16 crid,u16 trid)439 static void bnxt_re_init_hwrm_hdr(struct bnxt_re_dev *rdev, struct input *hdr,
440 u16 opcd, u16 crid, u16 trid)
441 {
442 hdr->req_type = cpu_to_le16(opcd);
443 hdr->cmpl_ring = cpu_to_le16(crid);
444 hdr->target_id = cpu_to_le16(trid);
445 }
446
bnxt_re_fill_fw_msg(struct bnxt_fw_msg * fw_msg,void * msg,int msg_len,void * resp,int resp_max_len,int timeout)447 static void bnxt_re_fill_fw_msg(struct bnxt_fw_msg *fw_msg, void *msg,
448 int msg_len, void *resp, int resp_max_len,
449 int timeout)
450 {
451 fw_msg->msg = msg;
452 fw_msg->msg_len = msg_len;
453 fw_msg->resp = resp;
454 fw_msg->resp_max_len = resp_max_len;
455 fw_msg->timeout = timeout;
456 }
457
bnxt_re_net_ring_free(struct bnxt_re_dev * rdev,u16 fw_ring_id,int type)458 static int bnxt_re_net_ring_free(struct bnxt_re_dev *rdev,
459 u16 fw_ring_id, int type)
460 {
461 struct bnxt_en_dev *en_dev = rdev->en_dev;
462 struct hwrm_ring_free_input req = {0};
463 struct hwrm_ring_free_output resp;
464 struct bnxt_fw_msg fw_msg;
465 int rc = -EINVAL;
466
467 if (!en_dev)
468 return rc;
469
470 if (test_bit(BNXT_RE_FLAG_ERR_DEVICE_DETACHED, &rdev->flags))
471 return 0;
472
473 memset(&fw_msg, 0, sizeof(fw_msg));
474
475 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_RING_FREE, -1, -1);
476 req.ring_type = type;
477 req.ring_id = cpu_to_le16(fw_ring_id);
478 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
479 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
480 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
481 if (rc)
482 ibdev_err(&rdev->ibdev, "Failed to free HW ring:%d :%#x",
483 req.ring_id, rc);
484 return rc;
485 }
486
bnxt_re_net_ring_alloc(struct bnxt_re_dev * rdev,struct bnxt_re_ring_attr * ring_attr,u16 * fw_ring_id)487 static int bnxt_re_net_ring_alloc(struct bnxt_re_dev *rdev,
488 struct bnxt_re_ring_attr *ring_attr,
489 u16 *fw_ring_id)
490 {
491 struct bnxt_en_dev *en_dev = rdev->en_dev;
492 struct hwrm_ring_alloc_input req = {0};
493 struct hwrm_ring_alloc_output resp;
494 struct bnxt_fw_msg fw_msg;
495 int rc = -EINVAL;
496
497 if (!en_dev)
498 return rc;
499
500 memset(&fw_msg, 0, sizeof(fw_msg));
501 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_RING_ALLOC, -1, -1);
502 req.enables = 0;
503 req.page_tbl_addr = cpu_to_le64(ring_attr->dma_arr[0]);
504 if (ring_attr->pages > 1) {
505 /* Page size is in log2 units */
506 req.page_size = BNXT_PAGE_SHIFT;
507 req.page_tbl_depth = 1;
508 }
509 req.fbo = 0;
510 /* Association of ring index with doorbell index and MSIX number */
511 req.logical_id = cpu_to_le16(ring_attr->lrid);
512 req.length = cpu_to_le32(ring_attr->depth + 1);
513 req.ring_type = ring_attr->type;
514 req.int_mode = ring_attr->mode;
515 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
516 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
517 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
518 if (!rc)
519 *fw_ring_id = le16_to_cpu(resp.ring_id);
520
521 return rc;
522 }
523
bnxt_re_net_stats_ctx_free(struct bnxt_re_dev * rdev,u32 fw_stats_ctx_id)524 static int bnxt_re_net_stats_ctx_free(struct bnxt_re_dev *rdev,
525 u32 fw_stats_ctx_id)
526 {
527 struct bnxt_en_dev *en_dev = rdev->en_dev;
528 struct hwrm_stat_ctx_free_input req = {};
529 struct hwrm_stat_ctx_free_output resp = {};
530 struct bnxt_fw_msg fw_msg;
531 int rc = -EINVAL;
532
533 if (!en_dev)
534 return rc;
535
536 if (test_bit(BNXT_RE_FLAG_ERR_DEVICE_DETACHED, &rdev->flags))
537 return 0;
538
539 memset(&fw_msg, 0, sizeof(fw_msg));
540
541 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_STAT_CTX_FREE, -1, -1);
542 req.stat_ctx_id = cpu_to_le32(fw_stats_ctx_id);
543 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
544 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
545 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
546 if (rc)
547 ibdev_err(&rdev->ibdev, "Failed to free HW stats context %#x",
548 rc);
549
550 return rc;
551 }
552
bnxt_re_net_stats_ctx_alloc(struct bnxt_re_dev * rdev,dma_addr_t dma_map,u32 * fw_stats_ctx_id)553 static int bnxt_re_net_stats_ctx_alloc(struct bnxt_re_dev *rdev,
554 dma_addr_t dma_map,
555 u32 *fw_stats_ctx_id)
556 {
557 struct bnxt_qplib_chip_ctx *chip_ctx = rdev->chip_ctx;
558 struct hwrm_stat_ctx_alloc_output resp = {0};
559 struct hwrm_stat_ctx_alloc_input req = {0};
560 struct bnxt_en_dev *en_dev = rdev->en_dev;
561 struct bnxt_fw_msg fw_msg;
562 int rc = -EINVAL;
563
564 *fw_stats_ctx_id = INVALID_STATS_CTX_ID;
565
566 if (!en_dev)
567 return rc;
568
569 memset(&fw_msg, 0, sizeof(fw_msg));
570
571 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_STAT_CTX_ALLOC, -1, -1);
572 req.update_period_ms = cpu_to_le32(1000);
573 req.stats_dma_addr = cpu_to_le64(dma_map);
574 req.stats_dma_length = cpu_to_le16(chip_ctx->hw_stats_size);
575 req.stat_ctx_flags = STAT_CTX_ALLOC_REQ_STAT_CTX_FLAGS_ROCE;
576 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
577 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
578 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
579 if (!rc)
580 *fw_stats_ctx_id = le32_to_cpu(resp.stat_ctx_id);
581
582 return rc;
583 }
584
585 /* Device */
586
is_bnxt_re_dev(struct net_device * netdev)587 static bool is_bnxt_re_dev(struct net_device *netdev)
588 {
589 struct ethtool_drvinfo drvinfo;
590
591 if (netdev->ethtool_ops && netdev->ethtool_ops->get_drvinfo) {
592 memset(&drvinfo, 0, sizeof(drvinfo));
593 netdev->ethtool_ops->get_drvinfo(netdev, &drvinfo);
594
595 if (strcmp(drvinfo.driver, "bnxt_en"))
596 return false;
597 return true;
598 }
599 return false;
600 }
601
bnxt_re_from_netdev(struct net_device * netdev)602 static struct bnxt_re_dev *bnxt_re_from_netdev(struct net_device *netdev)
603 {
604 struct ib_device *ibdev =
605 ib_device_get_by_netdev(netdev, RDMA_DRIVER_BNXT_RE);
606 if (!ibdev)
607 return NULL;
608
609 return container_of(ibdev, struct bnxt_re_dev, ibdev);
610 }
611
bnxt_re_dev_probe(struct net_device * netdev)612 static struct bnxt_en_dev *bnxt_re_dev_probe(struct net_device *netdev)
613 {
614 struct bnxt_en_dev *en_dev;
615 struct pci_dev *pdev;
616
617 en_dev = bnxt_ulp_probe(netdev);
618 if (IS_ERR(en_dev))
619 return en_dev;
620
621 pdev = en_dev->pdev;
622 if (!pdev)
623 return ERR_PTR(-EINVAL);
624
625 if (!(en_dev->flags & BNXT_EN_FLAG_ROCE_CAP)) {
626 dev_info(&pdev->dev,
627 "%s: probe error: RoCE is not supported on this device",
628 ROCE_DRV_MODULE_NAME);
629 return ERR_PTR(-ENODEV);
630 }
631
632 dev_hold(netdev);
633
634 return en_dev;
635 }
636
hw_rev_show(struct device * device,struct device_attribute * attr,char * buf)637 static ssize_t hw_rev_show(struct device *device, struct device_attribute *attr,
638 char *buf)
639 {
640 struct bnxt_re_dev *rdev =
641 rdma_device_to_drv_device(device, struct bnxt_re_dev, ibdev);
642
643 return sysfs_emit(buf, "0x%x\n", rdev->en_dev->pdev->vendor);
644 }
645 static DEVICE_ATTR_RO(hw_rev);
646
hca_type_show(struct device * device,struct device_attribute * attr,char * buf)647 static ssize_t hca_type_show(struct device *device,
648 struct device_attribute *attr, char *buf)
649 {
650 struct bnxt_re_dev *rdev =
651 rdma_device_to_drv_device(device, struct bnxt_re_dev, ibdev);
652
653 return sysfs_emit(buf, "%s\n", rdev->ibdev.node_desc);
654 }
655 static DEVICE_ATTR_RO(hca_type);
656
657 static struct attribute *bnxt_re_attributes[] = {
658 &dev_attr_hw_rev.attr,
659 &dev_attr_hca_type.attr,
660 NULL
661 };
662
663 static const struct attribute_group bnxt_re_dev_attr_group = {
664 .attrs = bnxt_re_attributes,
665 };
666
667 static const struct ib_device_ops bnxt_re_dev_ops = {
668 .owner = THIS_MODULE,
669 .driver_id = RDMA_DRIVER_BNXT_RE,
670 .uverbs_abi_ver = BNXT_RE_ABI_VERSION,
671
672 .add_gid = bnxt_re_add_gid,
673 .alloc_hw_port_stats = bnxt_re_ib_alloc_hw_port_stats,
674 .alloc_mr = bnxt_re_alloc_mr,
675 .alloc_pd = bnxt_re_alloc_pd,
676 .alloc_ucontext = bnxt_re_alloc_ucontext,
677 .create_ah = bnxt_re_create_ah,
678 .create_cq = bnxt_re_create_cq,
679 .create_qp = bnxt_re_create_qp,
680 .create_srq = bnxt_re_create_srq,
681 .create_user_ah = bnxt_re_create_ah,
682 .dealloc_driver = bnxt_re_dealloc_driver,
683 .dealloc_pd = bnxt_re_dealloc_pd,
684 .dealloc_ucontext = bnxt_re_dealloc_ucontext,
685 .del_gid = bnxt_re_del_gid,
686 .dereg_mr = bnxt_re_dereg_mr,
687 .destroy_ah = bnxt_re_destroy_ah,
688 .destroy_cq = bnxt_re_destroy_cq,
689 .destroy_qp = bnxt_re_destroy_qp,
690 .destroy_srq = bnxt_re_destroy_srq,
691 .device_group = &bnxt_re_dev_attr_group,
692 .get_dev_fw_str = bnxt_re_query_fw_str,
693 .get_dma_mr = bnxt_re_get_dma_mr,
694 .get_hw_stats = bnxt_re_ib_get_hw_stats,
695 .get_link_layer = bnxt_re_get_link_layer,
696 .get_port_immutable = bnxt_re_get_port_immutable,
697 .map_mr_sg = bnxt_re_map_mr_sg,
698 .mmap = bnxt_re_mmap,
699 .modify_qp = bnxt_re_modify_qp,
700 .modify_srq = bnxt_re_modify_srq,
701 .poll_cq = bnxt_re_poll_cq,
702 .post_recv = bnxt_re_post_recv,
703 .post_send = bnxt_re_post_send,
704 .post_srq_recv = bnxt_re_post_srq_recv,
705 .query_ah = bnxt_re_query_ah,
706 .query_device = bnxt_re_query_device,
707 .query_pkey = bnxt_re_query_pkey,
708 .query_port = bnxt_re_query_port,
709 .query_qp = bnxt_re_query_qp,
710 .query_srq = bnxt_re_query_srq,
711 .reg_user_mr = bnxt_re_reg_user_mr,
712 .req_notify_cq = bnxt_re_req_notify_cq,
713 INIT_RDMA_OBJ_SIZE(ib_ah, bnxt_re_ah, ib_ah),
714 INIT_RDMA_OBJ_SIZE(ib_cq, bnxt_re_cq, ib_cq),
715 INIT_RDMA_OBJ_SIZE(ib_pd, bnxt_re_pd, ib_pd),
716 INIT_RDMA_OBJ_SIZE(ib_qp, bnxt_re_qp, ib_qp),
717 INIT_RDMA_OBJ_SIZE(ib_srq, bnxt_re_srq, ib_srq),
718 INIT_RDMA_OBJ_SIZE(ib_ucontext, bnxt_re_ucontext, ib_uctx),
719 };
720
bnxt_re_register_ib(struct bnxt_re_dev * rdev)721 static int bnxt_re_register_ib(struct bnxt_re_dev *rdev)
722 {
723 struct ib_device *ibdev = &rdev->ibdev;
724 int ret;
725
726 /* ib device init */
727 ibdev->node_type = RDMA_NODE_IB_CA;
728 strlcpy(ibdev->node_desc, BNXT_RE_DESC " HCA",
729 strlen(BNXT_RE_DESC) + 5);
730 ibdev->phys_port_cnt = 1;
731
732 addrconf_addr_eui48((u8 *)&ibdev->node_guid, rdev->netdev->dev_addr);
733
734 ibdev->num_comp_vectors = rdev->num_msix - 1;
735 ibdev->dev.parent = &rdev->en_dev->pdev->dev;
736 ibdev->local_dma_lkey = BNXT_QPLIB_RSVD_LKEY;
737
738 ib_set_device_ops(ibdev, &bnxt_re_dev_ops);
739 ret = ib_device_set_netdev(&rdev->ibdev, rdev->netdev, 1);
740 if (ret)
741 return ret;
742
743 dma_set_max_seg_size(&rdev->en_dev->pdev->dev, UINT_MAX);
744 return ib_register_device(ibdev, "bnxt_re%d", &rdev->en_dev->pdev->dev);
745 }
746
bnxt_re_dev_remove(struct bnxt_re_dev * rdev)747 static void bnxt_re_dev_remove(struct bnxt_re_dev *rdev)
748 {
749 dev_put(rdev->netdev);
750 rdev->netdev = NULL;
751 mutex_lock(&bnxt_re_dev_lock);
752 list_del_rcu(&rdev->list);
753 mutex_unlock(&bnxt_re_dev_lock);
754
755 synchronize_rcu();
756 }
757
bnxt_re_dev_add(struct net_device * netdev,struct bnxt_en_dev * en_dev)758 static struct bnxt_re_dev *bnxt_re_dev_add(struct net_device *netdev,
759 struct bnxt_en_dev *en_dev)
760 {
761 struct bnxt_re_dev *rdev;
762
763 /* Allocate bnxt_re_dev instance here */
764 rdev = ib_alloc_device(bnxt_re_dev, ibdev);
765 if (!rdev) {
766 ibdev_err(NULL, "%s: bnxt_re_dev allocation failure!",
767 ROCE_DRV_MODULE_NAME);
768 return NULL;
769 }
770 /* Default values */
771 rdev->netdev = netdev;
772 dev_hold(rdev->netdev);
773 rdev->en_dev = en_dev;
774 rdev->id = rdev->en_dev->pdev->devfn;
775 INIT_LIST_HEAD(&rdev->qp_list);
776 mutex_init(&rdev->qp_lock);
777 atomic_set(&rdev->qp_count, 0);
778 atomic_set(&rdev->cq_count, 0);
779 atomic_set(&rdev->srq_count, 0);
780 atomic_set(&rdev->mr_count, 0);
781 atomic_set(&rdev->mw_count, 0);
782 atomic_set(&rdev->ah_count, 0);
783 atomic_set(&rdev->pd_count, 0);
784 rdev->cosq[0] = 0xFFFF;
785 rdev->cosq[1] = 0xFFFF;
786
787 mutex_lock(&bnxt_re_dev_lock);
788 list_add_tail_rcu(&rdev->list, &bnxt_re_dev_list);
789 mutex_unlock(&bnxt_re_dev_lock);
790 return rdev;
791 }
792
bnxt_re_handle_unaffi_async_event(struct creq_func_event * unaffi_async)793 static int bnxt_re_handle_unaffi_async_event(struct creq_func_event
794 *unaffi_async)
795 {
796 switch (unaffi_async->event) {
797 case CREQ_FUNC_EVENT_EVENT_TX_WQE_ERROR:
798 break;
799 case CREQ_FUNC_EVENT_EVENT_TX_DATA_ERROR:
800 break;
801 case CREQ_FUNC_EVENT_EVENT_RX_WQE_ERROR:
802 break;
803 case CREQ_FUNC_EVENT_EVENT_RX_DATA_ERROR:
804 break;
805 case CREQ_FUNC_EVENT_EVENT_CQ_ERROR:
806 break;
807 case CREQ_FUNC_EVENT_EVENT_TQM_ERROR:
808 break;
809 case CREQ_FUNC_EVENT_EVENT_CFCQ_ERROR:
810 break;
811 case CREQ_FUNC_EVENT_EVENT_CFCS_ERROR:
812 break;
813 case CREQ_FUNC_EVENT_EVENT_CFCC_ERROR:
814 break;
815 case CREQ_FUNC_EVENT_EVENT_CFCM_ERROR:
816 break;
817 case CREQ_FUNC_EVENT_EVENT_TIM_ERROR:
818 break;
819 default:
820 return -EINVAL;
821 }
822 return 0;
823 }
824
bnxt_re_handle_qp_async_event(struct creq_qp_event * qp_event,struct bnxt_re_qp * qp)825 static int bnxt_re_handle_qp_async_event(struct creq_qp_event *qp_event,
826 struct bnxt_re_qp *qp)
827 {
828 struct ib_event event;
829 unsigned int flags;
830
831 if (qp->qplib_qp.state == CMDQ_MODIFY_QP_NEW_STATE_ERR &&
832 rdma_is_kernel_res(&qp->ib_qp.res)) {
833 flags = bnxt_re_lock_cqs(qp);
834 bnxt_qplib_add_flush_qp(&qp->qplib_qp);
835 bnxt_re_unlock_cqs(qp, flags);
836 }
837
838 memset(&event, 0, sizeof(event));
839 if (qp->qplib_qp.srq) {
840 event.device = &qp->rdev->ibdev;
841 event.element.qp = &qp->ib_qp;
842 event.event = IB_EVENT_QP_LAST_WQE_REACHED;
843 }
844
845 if (event.device && qp->ib_qp.event_handler)
846 qp->ib_qp.event_handler(&event, qp->ib_qp.qp_context);
847
848 return 0;
849 }
850
bnxt_re_handle_affi_async_event(struct creq_qp_event * affi_async,void * obj)851 static int bnxt_re_handle_affi_async_event(struct creq_qp_event *affi_async,
852 void *obj)
853 {
854 int rc = 0;
855 u8 event;
856
857 if (!obj)
858 return rc; /* QP was already dead, still return success */
859
860 event = affi_async->event;
861 if (event == CREQ_QP_EVENT_EVENT_QP_ERROR_NOTIFICATION) {
862 struct bnxt_qplib_qp *lib_qp = obj;
863 struct bnxt_re_qp *qp = container_of(lib_qp, struct bnxt_re_qp,
864 qplib_qp);
865 rc = bnxt_re_handle_qp_async_event(affi_async, qp);
866 }
867 return rc;
868 }
869
bnxt_re_aeq_handler(struct bnxt_qplib_rcfw * rcfw,void * aeqe,void * obj)870 static int bnxt_re_aeq_handler(struct bnxt_qplib_rcfw *rcfw,
871 void *aeqe, void *obj)
872 {
873 struct creq_qp_event *affi_async;
874 struct creq_func_event *unaffi_async;
875 u8 type;
876 int rc;
877
878 type = ((struct creq_base *)aeqe)->type;
879 if (type == CREQ_BASE_TYPE_FUNC_EVENT) {
880 unaffi_async = aeqe;
881 rc = bnxt_re_handle_unaffi_async_event(unaffi_async);
882 } else {
883 affi_async = aeqe;
884 rc = bnxt_re_handle_affi_async_event(affi_async, obj);
885 }
886
887 return rc;
888 }
889
bnxt_re_srqn_handler(struct bnxt_qplib_nq * nq,struct bnxt_qplib_srq * handle,u8 event)890 static int bnxt_re_srqn_handler(struct bnxt_qplib_nq *nq,
891 struct bnxt_qplib_srq *handle, u8 event)
892 {
893 struct bnxt_re_srq *srq = container_of(handle, struct bnxt_re_srq,
894 qplib_srq);
895 struct ib_event ib_event;
896 int rc = 0;
897
898 ib_event.device = &srq->rdev->ibdev;
899 ib_event.element.srq = &srq->ib_srq;
900 if (event == NQ_SRQ_EVENT_EVENT_SRQ_THRESHOLD_EVENT)
901 ib_event.event = IB_EVENT_SRQ_LIMIT_REACHED;
902 else
903 ib_event.event = IB_EVENT_SRQ_ERR;
904
905 if (srq->ib_srq.event_handler) {
906 /* Lock event_handler? */
907 (*srq->ib_srq.event_handler)(&ib_event,
908 srq->ib_srq.srq_context);
909 }
910 return rc;
911 }
912
bnxt_re_cqn_handler(struct bnxt_qplib_nq * nq,struct bnxt_qplib_cq * handle)913 static int bnxt_re_cqn_handler(struct bnxt_qplib_nq *nq,
914 struct bnxt_qplib_cq *handle)
915 {
916 struct bnxt_re_cq *cq = container_of(handle, struct bnxt_re_cq,
917 qplib_cq);
918
919 if (cq->ib_cq.comp_handler) {
920 /* Lock comp_handler? */
921 (*cq->ib_cq.comp_handler)(&cq->ib_cq, cq->ib_cq.cq_context);
922 }
923
924 return 0;
925 }
926
927 #define BNXT_RE_GEN_P5_PF_NQ_DB 0x10000
928 #define BNXT_RE_GEN_P5_VF_NQ_DB 0x4000
bnxt_re_get_nqdb_offset(struct bnxt_re_dev * rdev,u16 indx)929 static u32 bnxt_re_get_nqdb_offset(struct bnxt_re_dev *rdev, u16 indx)
930 {
931 return bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx) ?
932 (rdev->is_virtfn ? BNXT_RE_GEN_P5_VF_NQ_DB :
933 BNXT_RE_GEN_P5_PF_NQ_DB) :
934 rdev->msix_entries[indx].db_offset;
935 }
936
bnxt_re_cleanup_res(struct bnxt_re_dev * rdev)937 static void bnxt_re_cleanup_res(struct bnxt_re_dev *rdev)
938 {
939 int i;
940
941 for (i = 1; i < rdev->num_msix; i++)
942 bnxt_qplib_disable_nq(&rdev->nq[i - 1]);
943
944 if (rdev->qplib_res.rcfw)
945 bnxt_qplib_cleanup_res(&rdev->qplib_res);
946 }
947
bnxt_re_init_res(struct bnxt_re_dev * rdev)948 static int bnxt_re_init_res(struct bnxt_re_dev *rdev)
949 {
950 int num_vec_enabled = 0;
951 int rc = 0, i;
952 u32 db_offt;
953
954 bnxt_qplib_init_res(&rdev->qplib_res);
955
956 for (i = 1; i < rdev->num_msix ; i++) {
957 db_offt = bnxt_re_get_nqdb_offset(rdev, i);
958 rc = bnxt_qplib_enable_nq(rdev->en_dev->pdev, &rdev->nq[i - 1],
959 i - 1, rdev->msix_entries[i].vector,
960 db_offt, &bnxt_re_cqn_handler,
961 &bnxt_re_srqn_handler);
962 if (rc) {
963 ibdev_err(&rdev->ibdev,
964 "Failed to enable NQ with rc = 0x%x", rc);
965 goto fail;
966 }
967 num_vec_enabled++;
968 }
969 return 0;
970 fail:
971 for (i = num_vec_enabled; i >= 0; i--)
972 bnxt_qplib_disable_nq(&rdev->nq[i]);
973 return rc;
974 }
975
bnxt_re_free_nq_res(struct bnxt_re_dev * rdev)976 static void bnxt_re_free_nq_res(struct bnxt_re_dev *rdev)
977 {
978 u8 type;
979 int i;
980
981 for (i = 0; i < rdev->num_msix - 1; i++) {
982 type = bnxt_qplib_get_ring_type(rdev->chip_ctx);
983 bnxt_re_net_ring_free(rdev, rdev->nq[i].ring_id, type);
984 bnxt_qplib_free_nq(&rdev->nq[i]);
985 rdev->nq[i].res = NULL;
986 }
987 }
988
bnxt_re_free_res(struct bnxt_re_dev * rdev)989 static void bnxt_re_free_res(struct bnxt_re_dev *rdev)
990 {
991 bnxt_re_free_nq_res(rdev);
992
993 if (rdev->qplib_res.dpi_tbl.max) {
994 bnxt_qplib_dealloc_dpi(&rdev->qplib_res,
995 &rdev->qplib_res.dpi_tbl,
996 &rdev->dpi_privileged);
997 }
998 if (rdev->qplib_res.rcfw) {
999 bnxt_qplib_free_res(&rdev->qplib_res);
1000 rdev->qplib_res.rcfw = NULL;
1001 }
1002 }
1003
bnxt_re_alloc_res(struct bnxt_re_dev * rdev)1004 static int bnxt_re_alloc_res(struct bnxt_re_dev *rdev)
1005 {
1006 struct bnxt_re_ring_attr rattr = {};
1007 int num_vec_created = 0;
1008 int rc = 0, i;
1009 u8 type;
1010
1011 /* Configure and allocate resources for qplib */
1012 rdev->qplib_res.rcfw = &rdev->rcfw;
1013 rc = bnxt_qplib_get_dev_attr(&rdev->rcfw, &rdev->dev_attr,
1014 rdev->is_virtfn);
1015 if (rc)
1016 goto fail;
1017
1018 rc = bnxt_qplib_alloc_res(&rdev->qplib_res, rdev->en_dev->pdev,
1019 rdev->netdev, &rdev->dev_attr);
1020 if (rc)
1021 goto fail;
1022
1023 rc = bnxt_qplib_alloc_dpi(&rdev->qplib_res.dpi_tbl,
1024 &rdev->dpi_privileged,
1025 rdev);
1026 if (rc)
1027 goto dealloc_res;
1028
1029 for (i = 0; i < rdev->num_msix - 1; i++) {
1030 struct bnxt_qplib_nq *nq;
1031
1032 nq = &rdev->nq[i];
1033 nq->hwq.max_elements = BNXT_QPLIB_NQE_MAX_CNT;
1034 rc = bnxt_qplib_alloc_nq(&rdev->qplib_res, &rdev->nq[i]);
1035 if (rc) {
1036 ibdev_err(&rdev->ibdev, "Alloc Failed NQ%d rc:%#x",
1037 i, rc);
1038 goto free_nq;
1039 }
1040 type = bnxt_qplib_get_ring_type(rdev->chip_ctx);
1041 rattr.dma_arr = nq->hwq.pbl[PBL_LVL_0].pg_map_arr;
1042 rattr.pages = nq->hwq.pbl[rdev->nq[i].hwq.level].pg_count;
1043 rattr.type = type;
1044 rattr.mode = RING_ALLOC_REQ_INT_MODE_MSIX;
1045 rattr.depth = BNXT_QPLIB_NQE_MAX_CNT - 1;
1046 rattr.lrid = rdev->msix_entries[i + 1].ring_idx;
1047 rc = bnxt_re_net_ring_alloc(rdev, &rattr, &nq->ring_id);
1048 if (rc) {
1049 ibdev_err(&rdev->ibdev,
1050 "Failed to allocate NQ fw id with rc = 0x%x",
1051 rc);
1052 bnxt_qplib_free_nq(&rdev->nq[i]);
1053 goto free_nq;
1054 }
1055 num_vec_created++;
1056 }
1057 return 0;
1058 free_nq:
1059 for (i = num_vec_created - 1; i >= 0; i--) {
1060 type = bnxt_qplib_get_ring_type(rdev->chip_ctx);
1061 bnxt_re_net_ring_free(rdev, rdev->nq[i].ring_id, type);
1062 bnxt_qplib_free_nq(&rdev->nq[i]);
1063 }
1064 bnxt_qplib_dealloc_dpi(&rdev->qplib_res,
1065 &rdev->qplib_res.dpi_tbl,
1066 &rdev->dpi_privileged);
1067 dealloc_res:
1068 bnxt_qplib_free_res(&rdev->qplib_res);
1069
1070 fail:
1071 rdev->qplib_res.rcfw = NULL;
1072 return rc;
1073 }
1074
bnxt_re_dispatch_event(struct ib_device * ibdev,struct ib_qp * qp,u8 port_num,enum ib_event_type event)1075 static void bnxt_re_dispatch_event(struct ib_device *ibdev, struct ib_qp *qp,
1076 u8 port_num, enum ib_event_type event)
1077 {
1078 struct ib_event ib_event;
1079
1080 ib_event.device = ibdev;
1081 if (qp) {
1082 ib_event.element.qp = qp;
1083 ib_event.event = event;
1084 if (qp->event_handler)
1085 qp->event_handler(&ib_event, qp->qp_context);
1086
1087 } else {
1088 ib_event.element.port_num = port_num;
1089 ib_event.event = event;
1090 ib_dispatch_event(&ib_event);
1091 }
1092 }
1093
1094 #define HWRM_QUEUE_PRI2COS_QCFG_INPUT_FLAGS_IVLAN 0x02
bnxt_re_query_hwrm_pri2cos(struct bnxt_re_dev * rdev,u8 dir,u64 * cid_map)1095 static int bnxt_re_query_hwrm_pri2cos(struct bnxt_re_dev *rdev, u8 dir,
1096 u64 *cid_map)
1097 {
1098 struct hwrm_queue_pri2cos_qcfg_input req = {0};
1099 struct bnxt *bp = netdev_priv(rdev->netdev);
1100 struct hwrm_queue_pri2cos_qcfg_output resp;
1101 struct bnxt_en_dev *en_dev = rdev->en_dev;
1102 struct bnxt_fw_msg fw_msg;
1103 u32 flags = 0;
1104 u8 *qcfgmap, *tmp_map;
1105 int rc = 0, i;
1106
1107 if (!cid_map)
1108 return -EINVAL;
1109
1110 memset(&fw_msg, 0, sizeof(fw_msg));
1111 bnxt_re_init_hwrm_hdr(rdev, (void *)&req,
1112 HWRM_QUEUE_PRI2COS_QCFG, -1, -1);
1113 flags |= (dir & 0x01);
1114 flags |= HWRM_QUEUE_PRI2COS_QCFG_INPUT_FLAGS_IVLAN;
1115 req.flags = cpu_to_le32(flags);
1116 req.port_id = bp->pf.port_id;
1117
1118 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
1119 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
1120 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
1121 if (rc)
1122 return rc;
1123
1124 if (resp.queue_cfg_info) {
1125 ibdev_warn(&rdev->ibdev,
1126 "Asymmetric cos queue configuration detected");
1127 ibdev_warn(&rdev->ibdev,
1128 " on device, QoS may not be fully functional\n");
1129 }
1130 qcfgmap = &resp.pri0_cos_queue_id;
1131 tmp_map = (u8 *)cid_map;
1132 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1133 tmp_map[i] = qcfgmap[i];
1134
1135 return rc;
1136 }
1137
bnxt_re_is_qp1_or_shadow_qp(struct bnxt_re_dev * rdev,struct bnxt_re_qp * qp)1138 static bool bnxt_re_is_qp1_or_shadow_qp(struct bnxt_re_dev *rdev,
1139 struct bnxt_re_qp *qp)
1140 {
1141 return (qp->ib_qp.qp_type == IB_QPT_GSI) ||
1142 (qp == rdev->gsi_ctx.gsi_sqp);
1143 }
1144
bnxt_re_dev_stop(struct bnxt_re_dev * rdev)1145 static void bnxt_re_dev_stop(struct bnxt_re_dev *rdev)
1146 {
1147 int mask = IB_QP_STATE;
1148 struct ib_qp_attr qp_attr;
1149 struct bnxt_re_qp *qp;
1150
1151 qp_attr.qp_state = IB_QPS_ERR;
1152 mutex_lock(&rdev->qp_lock);
1153 list_for_each_entry(qp, &rdev->qp_list, list) {
1154 /* Modify the state of all QPs except QP1/Shadow QP */
1155 if (!bnxt_re_is_qp1_or_shadow_qp(rdev, qp)) {
1156 if (qp->qplib_qp.state !=
1157 CMDQ_MODIFY_QP_NEW_STATE_RESET &&
1158 qp->qplib_qp.state !=
1159 CMDQ_MODIFY_QP_NEW_STATE_ERR) {
1160 bnxt_re_dispatch_event(&rdev->ibdev, &qp->ib_qp,
1161 1, IB_EVENT_QP_FATAL);
1162 bnxt_re_modify_qp(&qp->ib_qp, &qp_attr, mask,
1163 NULL);
1164 }
1165 }
1166 }
1167 mutex_unlock(&rdev->qp_lock);
1168 }
1169
bnxt_re_update_gid(struct bnxt_re_dev * rdev)1170 static int bnxt_re_update_gid(struct bnxt_re_dev *rdev)
1171 {
1172 struct bnxt_qplib_sgid_tbl *sgid_tbl = &rdev->qplib_res.sgid_tbl;
1173 struct bnxt_qplib_gid gid;
1174 u16 gid_idx, index;
1175 int rc = 0;
1176
1177 if (!ib_device_try_get(&rdev->ibdev))
1178 return 0;
1179
1180 if (!sgid_tbl) {
1181 ibdev_err(&rdev->ibdev, "QPLIB: SGID table not allocated");
1182 rc = -EINVAL;
1183 goto out;
1184 }
1185
1186 for (index = 0; index < sgid_tbl->active; index++) {
1187 gid_idx = sgid_tbl->hw_id[index];
1188
1189 if (!memcmp(&sgid_tbl->tbl[index], &bnxt_qplib_gid_zero,
1190 sizeof(bnxt_qplib_gid_zero)))
1191 continue;
1192 /* need to modify the VLAN enable setting of non VLAN GID only
1193 * as setting is done for VLAN GID while adding GID
1194 */
1195 if (sgid_tbl->vlan[index])
1196 continue;
1197
1198 memcpy(&gid, &sgid_tbl->tbl[index], sizeof(gid));
1199
1200 rc = bnxt_qplib_update_sgid(sgid_tbl, &gid, gid_idx,
1201 rdev->qplib_res.netdev->dev_addr);
1202 }
1203 out:
1204 ib_device_put(&rdev->ibdev);
1205 return rc;
1206 }
1207
bnxt_re_get_priority_mask(struct bnxt_re_dev * rdev)1208 static u32 bnxt_re_get_priority_mask(struct bnxt_re_dev *rdev)
1209 {
1210 u32 prio_map = 0, tmp_map = 0;
1211 struct net_device *netdev;
1212 struct dcb_app app;
1213
1214 netdev = rdev->netdev;
1215
1216 memset(&app, 0, sizeof(app));
1217 app.selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE;
1218 app.protocol = ETH_P_IBOE;
1219 tmp_map = dcb_ieee_getapp_mask(netdev, &app);
1220 prio_map = tmp_map;
1221
1222 app.selector = IEEE_8021QAZ_APP_SEL_DGRAM;
1223 app.protocol = ROCE_V2_UDP_DPORT;
1224 tmp_map = dcb_ieee_getapp_mask(netdev, &app);
1225 prio_map |= tmp_map;
1226
1227 return prio_map;
1228 }
1229
bnxt_re_parse_cid_map(u8 prio_map,u8 * cid_map,u16 * cosq)1230 static void bnxt_re_parse_cid_map(u8 prio_map, u8 *cid_map, u16 *cosq)
1231 {
1232 u16 prio;
1233 u8 id;
1234
1235 for (prio = 0, id = 0; prio < 8; prio++) {
1236 if (prio_map & (1 << prio)) {
1237 cosq[id] = cid_map[prio];
1238 id++;
1239 if (id == 2) /* Max 2 tcs supported */
1240 break;
1241 }
1242 }
1243 }
1244
bnxt_re_setup_qos(struct bnxt_re_dev * rdev)1245 static int bnxt_re_setup_qos(struct bnxt_re_dev *rdev)
1246 {
1247 u8 prio_map = 0;
1248 u64 cid_map;
1249 int rc;
1250
1251 /* Get priority for roce */
1252 prio_map = bnxt_re_get_priority_mask(rdev);
1253
1254 if (prio_map == rdev->cur_prio_map)
1255 return 0;
1256 rdev->cur_prio_map = prio_map;
1257 /* Get cosq id for this priority */
1258 rc = bnxt_re_query_hwrm_pri2cos(rdev, 0, &cid_map);
1259 if (rc) {
1260 ibdev_warn(&rdev->ibdev, "no cos for p_mask %x\n", prio_map);
1261 return rc;
1262 }
1263 /* Parse CoS IDs for app priority */
1264 bnxt_re_parse_cid_map(prio_map, (u8 *)&cid_map, rdev->cosq);
1265
1266 /* Config BONO. */
1267 rc = bnxt_qplib_map_tc2cos(&rdev->qplib_res, rdev->cosq);
1268 if (rc) {
1269 ibdev_warn(&rdev->ibdev, "no tc for cos{%x, %x}\n",
1270 rdev->cosq[0], rdev->cosq[1]);
1271 return rc;
1272 }
1273
1274 /* Actual priorities are not programmed as they are already
1275 * done by L2 driver; just enable or disable priority vlan tagging
1276 */
1277 if ((prio_map == 0 && rdev->qplib_res.prio) ||
1278 (prio_map != 0 && !rdev->qplib_res.prio)) {
1279 rdev->qplib_res.prio = prio_map ? true : false;
1280
1281 bnxt_re_update_gid(rdev);
1282 }
1283
1284 return 0;
1285 }
1286
bnxt_re_query_hwrm_intf_version(struct bnxt_re_dev * rdev)1287 static void bnxt_re_query_hwrm_intf_version(struct bnxt_re_dev *rdev)
1288 {
1289 struct bnxt_en_dev *en_dev = rdev->en_dev;
1290 struct hwrm_ver_get_output resp = {0};
1291 struct hwrm_ver_get_input req = {0};
1292 struct bnxt_fw_msg fw_msg;
1293 int rc = 0;
1294
1295 memset(&fw_msg, 0, sizeof(fw_msg));
1296 bnxt_re_init_hwrm_hdr(rdev, (void *)&req,
1297 HWRM_VER_GET, -1, -1);
1298 req.hwrm_intf_maj = HWRM_VERSION_MAJOR;
1299 req.hwrm_intf_min = HWRM_VERSION_MINOR;
1300 req.hwrm_intf_upd = HWRM_VERSION_UPDATE;
1301 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
1302 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
1303 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
1304 if (rc) {
1305 ibdev_err(&rdev->ibdev, "Failed to query HW version, rc = 0x%x",
1306 rc);
1307 return;
1308 }
1309 rdev->qplib_ctx.hwrm_intf_ver =
1310 (u64)le16_to_cpu(resp.hwrm_intf_major) << 48 |
1311 (u64)le16_to_cpu(resp.hwrm_intf_minor) << 32 |
1312 (u64)le16_to_cpu(resp.hwrm_intf_build) << 16 |
1313 le16_to_cpu(resp.hwrm_intf_patch);
1314 }
1315
bnxt_re_ib_init(struct bnxt_re_dev * rdev)1316 static int bnxt_re_ib_init(struct bnxt_re_dev *rdev)
1317 {
1318 int rc = 0;
1319 u32 event;
1320
1321 /* Register ib dev */
1322 rc = bnxt_re_register_ib(rdev);
1323 if (rc) {
1324 pr_err("Failed to register with IB: %#x\n", rc);
1325 return rc;
1326 }
1327 dev_info(rdev_to_dev(rdev), "Device registered successfully");
1328 ib_get_eth_speed(&rdev->ibdev, 1, &rdev->active_speed,
1329 &rdev->active_width);
1330 set_bit(BNXT_RE_FLAG_ISSUE_ROCE_STATS, &rdev->flags);
1331
1332 event = netif_running(rdev->netdev) && netif_carrier_ok(rdev->netdev) ?
1333 IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR;
1334
1335 bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1, event);
1336
1337 return rc;
1338 }
1339
bnxt_re_dev_uninit(struct bnxt_re_dev * rdev)1340 static void bnxt_re_dev_uninit(struct bnxt_re_dev *rdev)
1341 {
1342 u8 type;
1343 int rc;
1344
1345 if (test_and_clear_bit(BNXT_RE_FLAG_QOS_WORK_REG, &rdev->flags))
1346 cancel_delayed_work_sync(&rdev->worker);
1347
1348 if (test_and_clear_bit(BNXT_RE_FLAG_RESOURCES_INITIALIZED,
1349 &rdev->flags))
1350 bnxt_re_cleanup_res(rdev);
1351 if (test_and_clear_bit(BNXT_RE_FLAG_RESOURCES_ALLOCATED, &rdev->flags))
1352 bnxt_re_free_res(rdev);
1353
1354 if (test_and_clear_bit(BNXT_RE_FLAG_RCFW_CHANNEL_EN, &rdev->flags)) {
1355 rc = bnxt_qplib_deinit_rcfw(&rdev->rcfw);
1356 if (rc)
1357 ibdev_warn(&rdev->ibdev,
1358 "Failed to deinitialize RCFW: %#x", rc);
1359 bnxt_re_net_stats_ctx_free(rdev, rdev->qplib_ctx.stats.fw_id);
1360 bnxt_qplib_free_ctx(&rdev->qplib_res, &rdev->qplib_ctx);
1361 bnxt_qplib_disable_rcfw_channel(&rdev->rcfw);
1362 type = bnxt_qplib_get_ring_type(rdev->chip_ctx);
1363 bnxt_re_net_ring_free(rdev, rdev->rcfw.creq.ring_id, type);
1364 bnxt_qplib_free_rcfw_channel(&rdev->rcfw);
1365 }
1366 if (test_and_clear_bit(BNXT_RE_FLAG_GOT_MSIX, &rdev->flags)) {
1367 rc = bnxt_re_free_msix(rdev);
1368 if (rc)
1369 ibdev_warn(&rdev->ibdev,
1370 "Failed to free MSI-X vectors: %#x", rc);
1371 }
1372
1373 bnxt_re_destroy_chip_ctx(rdev);
1374 if (test_and_clear_bit(BNXT_RE_FLAG_NETDEV_REGISTERED, &rdev->flags)) {
1375 rc = bnxt_re_unregister_netdev(rdev);
1376 if (rc)
1377 ibdev_warn(&rdev->ibdev,
1378 "Failed to unregister with netdev: %#x", rc);
1379 }
1380 }
1381
1382 /* worker thread for polling periodic events. Now used for QoS programming*/
bnxt_re_worker(struct work_struct * work)1383 static void bnxt_re_worker(struct work_struct *work)
1384 {
1385 struct bnxt_re_dev *rdev = container_of(work, struct bnxt_re_dev,
1386 worker.work);
1387
1388 bnxt_re_setup_qos(rdev);
1389 schedule_delayed_work(&rdev->worker, msecs_to_jiffies(30000));
1390 }
1391
bnxt_re_dev_init(struct bnxt_re_dev * rdev,u8 wqe_mode)1392 static int bnxt_re_dev_init(struct bnxt_re_dev *rdev, u8 wqe_mode)
1393 {
1394 struct bnxt_qplib_creq_ctx *creq;
1395 struct bnxt_re_ring_attr rattr;
1396 u32 db_offt;
1397 int vid;
1398 u8 type;
1399 int rc;
1400
1401 /* Registered a new RoCE device instance to netdev */
1402 memset(&rattr, 0, sizeof(rattr));
1403 rc = bnxt_re_register_netdev(rdev);
1404 if (rc) {
1405 ibdev_err(&rdev->ibdev,
1406 "Failed to register with netedev: %#x\n", rc);
1407 return -EINVAL;
1408 }
1409 set_bit(BNXT_RE_FLAG_NETDEV_REGISTERED, &rdev->flags);
1410
1411 rc = bnxt_re_setup_chip_ctx(rdev, wqe_mode);
1412 if (rc) {
1413 ibdev_err(&rdev->ibdev, "Failed to get chip context\n");
1414 return -EINVAL;
1415 }
1416
1417 /* Check whether VF or PF */
1418 bnxt_re_get_sriov_func_type(rdev);
1419
1420 rc = bnxt_re_request_msix(rdev);
1421 if (rc) {
1422 ibdev_err(&rdev->ibdev,
1423 "Failed to get MSI-X vectors: %#x\n", rc);
1424 rc = -EINVAL;
1425 goto fail;
1426 }
1427 set_bit(BNXT_RE_FLAG_GOT_MSIX, &rdev->flags);
1428
1429 bnxt_re_query_hwrm_intf_version(rdev);
1430
1431 /* Establish RCFW Communication Channel to initialize the context
1432 * memory for the function and all child VFs
1433 */
1434 rc = bnxt_qplib_alloc_rcfw_channel(&rdev->qplib_res, &rdev->rcfw,
1435 &rdev->qplib_ctx,
1436 BNXT_RE_MAX_QPC_COUNT);
1437 if (rc) {
1438 ibdev_err(&rdev->ibdev,
1439 "Failed to allocate RCFW Channel: %#x\n", rc);
1440 goto fail;
1441 }
1442
1443 type = bnxt_qplib_get_ring_type(rdev->chip_ctx);
1444 creq = &rdev->rcfw.creq;
1445 rattr.dma_arr = creq->hwq.pbl[PBL_LVL_0].pg_map_arr;
1446 rattr.pages = creq->hwq.pbl[creq->hwq.level].pg_count;
1447 rattr.type = type;
1448 rattr.mode = RING_ALLOC_REQ_INT_MODE_MSIX;
1449 rattr.depth = BNXT_QPLIB_CREQE_MAX_CNT - 1;
1450 rattr.lrid = rdev->msix_entries[BNXT_RE_AEQ_IDX].ring_idx;
1451 rc = bnxt_re_net_ring_alloc(rdev, &rattr, &creq->ring_id);
1452 if (rc) {
1453 ibdev_err(&rdev->ibdev, "Failed to allocate CREQ: %#x\n", rc);
1454 goto free_rcfw;
1455 }
1456 db_offt = bnxt_re_get_nqdb_offset(rdev, BNXT_RE_AEQ_IDX);
1457 vid = rdev->msix_entries[BNXT_RE_AEQ_IDX].vector;
1458 rc = bnxt_qplib_enable_rcfw_channel(&rdev->rcfw,
1459 vid, db_offt, rdev->is_virtfn,
1460 &bnxt_re_aeq_handler);
1461 if (rc) {
1462 ibdev_err(&rdev->ibdev, "Failed to enable RCFW channel: %#x\n",
1463 rc);
1464 goto free_ring;
1465 }
1466
1467 rc = bnxt_qplib_get_dev_attr(&rdev->rcfw, &rdev->dev_attr,
1468 rdev->is_virtfn);
1469 if (rc)
1470 goto disable_rcfw;
1471
1472 bnxt_re_set_resource_limits(rdev);
1473
1474 rc = bnxt_qplib_alloc_ctx(&rdev->qplib_res, &rdev->qplib_ctx, 0,
1475 bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx));
1476 if (rc) {
1477 ibdev_err(&rdev->ibdev,
1478 "Failed to allocate QPLIB context: %#x\n", rc);
1479 goto disable_rcfw;
1480 }
1481 rc = bnxt_re_net_stats_ctx_alloc(rdev,
1482 rdev->qplib_ctx.stats.dma_map,
1483 &rdev->qplib_ctx.stats.fw_id);
1484 if (rc) {
1485 ibdev_err(&rdev->ibdev,
1486 "Failed to allocate stats context: %#x\n", rc);
1487 goto free_ctx;
1488 }
1489
1490 rc = bnxt_qplib_init_rcfw(&rdev->rcfw, &rdev->qplib_ctx,
1491 rdev->is_virtfn);
1492 if (rc) {
1493 ibdev_err(&rdev->ibdev,
1494 "Failed to initialize RCFW: %#x\n", rc);
1495 goto free_sctx;
1496 }
1497 set_bit(BNXT_RE_FLAG_RCFW_CHANNEL_EN, &rdev->flags);
1498
1499 /* Resources based on the 'new' device caps */
1500 rc = bnxt_re_alloc_res(rdev);
1501 if (rc) {
1502 ibdev_err(&rdev->ibdev,
1503 "Failed to allocate resources: %#x\n", rc);
1504 goto fail;
1505 }
1506 set_bit(BNXT_RE_FLAG_RESOURCES_ALLOCATED, &rdev->flags);
1507 rc = bnxt_re_init_res(rdev);
1508 if (rc) {
1509 ibdev_err(&rdev->ibdev,
1510 "Failed to initialize resources: %#x\n", rc);
1511 goto fail;
1512 }
1513
1514 set_bit(BNXT_RE_FLAG_RESOURCES_INITIALIZED, &rdev->flags);
1515
1516 if (!rdev->is_virtfn) {
1517 rc = bnxt_re_setup_qos(rdev);
1518 if (rc)
1519 ibdev_info(&rdev->ibdev,
1520 "RoCE priority not yet configured\n");
1521
1522 INIT_DELAYED_WORK(&rdev->worker, bnxt_re_worker);
1523 set_bit(BNXT_RE_FLAG_QOS_WORK_REG, &rdev->flags);
1524 schedule_delayed_work(&rdev->worker, msecs_to_jiffies(30000));
1525 }
1526
1527 return 0;
1528 free_sctx:
1529 bnxt_re_net_stats_ctx_free(rdev, rdev->qplib_ctx.stats.fw_id);
1530 free_ctx:
1531 bnxt_qplib_free_ctx(&rdev->qplib_res, &rdev->qplib_ctx);
1532 disable_rcfw:
1533 bnxt_qplib_disable_rcfw_channel(&rdev->rcfw);
1534 free_ring:
1535 type = bnxt_qplib_get_ring_type(rdev->chip_ctx);
1536 bnxt_re_net_ring_free(rdev, rdev->rcfw.creq.ring_id, type);
1537 free_rcfw:
1538 bnxt_qplib_free_rcfw_channel(&rdev->rcfw);
1539 fail:
1540 bnxt_re_dev_uninit(rdev);
1541
1542 return rc;
1543 }
1544
bnxt_re_dev_unreg(struct bnxt_re_dev * rdev)1545 static void bnxt_re_dev_unreg(struct bnxt_re_dev *rdev)
1546 {
1547 struct net_device *netdev = rdev->netdev;
1548
1549 bnxt_re_dev_remove(rdev);
1550
1551 if (netdev)
1552 dev_put(netdev);
1553 }
1554
bnxt_re_dev_reg(struct bnxt_re_dev ** rdev,struct net_device * netdev)1555 static int bnxt_re_dev_reg(struct bnxt_re_dev **rdev, struct net_device *netdev)
1556 {
1557 struct bnxt_en_dev *en_dev;
1558 int rc = 0;
1559
1560 if (!is_bnxt_re_dev(netdev))
1561 return -ENODEV;
1562
1563 en_dev = bnxt_re_dev_probe(netdev);
1564 if (IS_ERR(en_dev)) {
1565 if (en_dev != ERR_PTR(-ENODEV))
1566 ibdev_err(&(*rdev)->ibdev, "%s: Failed to probe\n",
1567 ROCE_DRV_MODULE_NAME);
1568 rc = PTR_ERR(en_dev);
1569 goto exit;
1570 }
1571 *rdev = bnxt_re_dev_add(netdev, en_dev);
1572 if (!*rdev) {
1573 rc = -ENOMEM;
1574 dev_put(netdev);
1575 goto exit;
1576 }
1577 exit:
1578 return rc;
1579 }
1580
bnxt_re_remove_device(struct bnxt_re_dev * rdev)1581 static void bnxt_re_remove_device(struct bnxt_re_dev *rdev)
1582 {
1583 bnxt_re_dev_uninit(rdev);
1584 pci_dev_put(rdev->en_dev->pdev);
1585 bnxt_re_dev_unreg(rdev);
1586 }
1587
bnxt_re_add_device(struct bnxt_re_dev ** rdev,struct net_device * netdev,u8 wqe_mode)1588 static int bnxt_re_add_device(struct bnxt_re_dev **rdev,
1589 struct net_device *netdev, u8 wqe_mode)
1590 {
1591 int rc;
1592
1593 rc = bnxt_re_dev_reg(rdev, netdev);
1594 if (rc == -ENODEV)
1595 return rc;
1596 if (rc) {
1597 pr_err("Failed to register with the device %s: %#x\n",
1598 netdev->name, rc);
1599 return rc;
1600 }
1601
1602 pci_dev_get((*rdev)->en_dev->pdev);
1603 rc = bnxt_re_dev_init(*rdev, wqe_mode);
1604 if (rc) {
1605 pci_dev_put((*rdev)->en_dev->pdev);
1606 bnxt_re_dev_unreg(*rdev);
1607 }
1608
1609 return rc;
1610 }
1611
bnxt_re_dealloc_driver(struct ib_device * ib_dev)1612 static void bnxt_re_dealloc_driver(struct ib_device *ib_dev)
1613 {
1614 struct bnxt_re_dev *rdev =
1615 container_of(ib_dev, struct bnxt_re_dev, ibdev);
1616
1617 dev_info(rdev_to_dev(rdev), "Unregistering Device");
1618
1619 rtnl_lock();
1620 bnxt_re_remove_device(rdev);
1621 rtnl_unlock();
1622 }
1623
1624 /* Handle all deferred netevents tasks */
bnxt_re_task(struct work_struct * work)1625 static void bnxt_re_task(struct work_struct *work)
1626 {
1627 struct bnxt_re_work *re_work;
1628 struct bnxt_re_dev *rdev;
1629 int rc = 0;
1630
1631 re_work = container_of(work, struct bnxt_re_work, work);
1632 rdev = re_work->rdev;
1633
1634 if (re_work->event == NETDEV_REGISTER) {
1635 rc = bnxt_re_ib_init(rdev);
1636 if (rc) {
1637 ibdev_err(&rdev->ibdev,
1638 "Failed to register with IB: %#x", rc);
1639 rtnl_lock();
1640 bnxt_re_remove_device(rdev);
1641 rtnl_unlock();
1642 goto exit;
1643 }
1644 goto exit;
1645 }
1646
1647 if (!ib_device_try_get(&rdev->ibdev))
1648 goto exit;
1649
1650 switch (re_work->event) {
1651 case NETDEV_UP:
1652 bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1,
1653 IB_EVENT_PORT_ACTIVE);
1654 break;
1655 case NETDEV_DOWN:
1656 bnxt_re_dev_stop(rdev);
1657 break;
1658 case NETDEV_CHANGE:
1659 if (!netif_carrier_ok(rdev->netdev))
1660 bnxt_re_dev_stop(rdev);
1661 else if (netif_carrier_ok(rdev->netdev))
1662 bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1,
1663 IB_EVENT_PORT_ACTIVE);
1664 ib_get_eth_speed(&rdev->ibdev, 1, &rdev->active_speed,
1665 &rdev->active_width);
1666 break;
1667 default:
1668 break;
1669 }
1670 ib_device_put(&rdev->ibdev);
1671 exit:
1672 put_device(&rdev->ibdev.dev);
1673 kfree(re_work);
1674 }
1675
1676 /*
1677 * "Notifier chain callback can be invoked for the same chain from
1678 * different CPUs at the same time".
1679 *
1680 * For cases when the netdev is already present, our call to the
1681 * register_netdevice_notifier() will actually get the rtnl_lock()
1682 * before sending NETDEV_REGISTER and (if up) NETDEV_UP
1683 * events.
1684 *
1685 * But for cases when the netdev is not already present, the notifier
1686 * chain is subjected to be invoked from different CPUs simultaneously.
1687 *
1688 * This is protected by the netdev_mutex.
1689 */
bnxt_re_netdev_event(struct notifier_block * notifier,unsigned long event,void * ptr)1690 static int bnxt_re_netdev_event(struct notifier_block *notifier,
1691 unsigned long event, void *ptr)
1692 {
1693 struct net_device *real_dev, *netdev = netdev_notifier_info_to_dev(ptr);
1694 struct bnxt_re_work *re_work;
1695 struct bnxt_re_dev *rdev;
1696 int rc = 0;
1697 bool sch_work = false;
1698 bool release = true;
1699
1700 real_dev = rdma_vlan_dev_real_dev(netdev);
1701 if (!real_dev)
1702 real_dev = netdev;
1703
1704 rdev = bnxt_re_from_netdev(real_dev);
1705 if (!rdev && event != NETDEV_REGISTER)
1706 return NOTIFY_OK;
1707
1708 if (real_dev != netdev)
1709 goto exit;
1710
1711 switch (event) {
1712 case NETDEV_REGISTER:
1713 if (rdev)
1714 break;
1715 rc = bnxt_re_add_device(&rdev, real_dev,
1716 BNXT_QPLIB_WQE_MODE_STATIC);
1717 if (!rc)
1718 sch_work = true;
1719 release = false;
1720 break;
1721
1722 case NETDEV_UNREGISTER:
1723 ib_unregister_device_queued(&rdev->ibdev);
1724 break;
1725
1726 default:
1727 sch_work = true;
1728 break;
1729 }
1730 if (sch_work) {
1731 /* Allocate for the deferred task */
1732 re_work = kzalloc(sizeof(*re_work), GFP_KERNEL);
1733 if (re_work) {
1734 get_device(&rdev->ibdev.dev);
1735 re_work->rdev = rdev;
1736 re_work->event = event;
1737 re_work->vlan_dev = (real_dev == netdev ?
1738 NULL : netdev);
1739 INIT_WORK(&re_work->work, bnxt_re_task);
1740 queue_work(bnxt_re_wq, &re_work->work);
1741 }
1742 }
1743
1744 exit:
1745 if (rdev && release)
1746 ib_device_put(&rdev->ibdev);
1747 return NOTIFY_DONE;
1748 }
1749
1750 static struct notifier_block bnxt_re_netdev_notifier = {
1751 .notifier_call = bnxt_re_netdev_event
1752 };
1753
bnxt_re_mod_init(void)1754 static int __init bnxt_re_mod_init(void)
1755 {
1756 int rc = 0;
1757
1758 pr_info("%s: %s", ROCE_DRV_MODULE_NAME, version);
1759
1760 bnxt_re_wq = create_singlethread_workqueue("bnxt_re");
1761 if (!bnxt_re_wq)
1762 return -ENOMEM;
1763
1764 INIT_LIST_HEAD(&bnxt_re_dev_list);
1765
1766 rc = register_netdevice_notifier(&bnxt_re_netdev_notifier);
1767 if (rc) {
1768 pr_err("%s: Cannot register to netdevice_notifier",
1769 ROCE_DRV_MODULE_NAME);
1770 goto err_netdev;
1771 }
1772 return 0;
1773
1774 err_netdev:
1775 destroy_workqueue(bnxt_re_wq);
1776
1777 return rc;
1778 }
1779
bnxt_re_mod_exit(void)1780 static void __exit bnxt_re_mod_exit(void)
1781 {
1782 struct bnxt_re_dev *rdev;
1783
1784 unregister_netdevice_notifier(&bnxt_re_netdev_notifier);
1785 if (bnxt_re_wq)
1786 destroy_workqueue(bnxt_re_wq);
1787 list_for_each_entry(rdev, &bnxt_re_dev_list, list) {
1788 /* VF device removal should be called before the removal
1789 * of PF device. Queue VFs unregister first, so that VFs
1790 * shall be removed before the PF during the call of
1791 * ib_unregister_driver.
1792 */
1793 if (rdev->is_virtfn)
1794 ib_unregister_device(&rdev->ibdev);
1795 }
1796 ib_unregister_driver(RDMA_DRIVER_BNXT_RE);
1797 }
1798
1799 module_init(bnxt_re_mod_init);
1800 module_exit(bnxt_re_mod_exit);
1801