1 // SPDX-License-Identifier: ISC
2 /* Copyright (C) 2020 MediaTek Inc.
3 *
4 */
5
6 #include <linux/kernel.h>
7 #include <linux/module.h>
8 #include <linux/pci.h>
9
10 #include "mt7921.h"
11 #include "mac.h"
12 #include "mcu.h"
13 #include "../trace.h"
14
15 static const struct pci_device_id mt7921_pci_device_table[] = {
16 { PCI_DEVICE(PCI_VENDOR_ID_MEDIATEK, 0x7961) },
17 { PCI_DEVICE(PCI_VENDOR_ID_MEDIATEK, 0x7922) },
18 { },
19 };
20
21 static bool mt7921_disable_aspm;
22 module_param_named(disable_aspm, mt7921_disable_aspm, bool, 0644);
23 MODULE_PARM_DESC(disable_aspm, "disable PCI ASPM support");
24
25 static void
mt7921_rx_poll_complete(struct mt76_dev * mdev,enum mt76_rxq_id q)26 mt7921_rx_poll_complete(struct mt76_dev *mdev, enum mt76_rxq_id q)
27 {
28 struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76);
29
30 if (q == MT_RXQ_MAIN)
31 mt7921_irq_enable(dev, MT_INT_RX_DONE_DATA);
32 else if (q == MT_RXQ_MCU_WA)
33 mt7921_irq_enable(dev, MT_INT_RX_DONE_WM2);
34 else
35 mt7921_irq_enable(dev, MT_INT_RX_DONE_WM);
36 }
37
mt7921_irq_handler(int irq,void * dev_instance)38 static irqreturn_t mt7921_irq_handler(int irq, void *dev_instance)
39 {
40 struct mt7921_dev *dev = dev_instance;
41
42 mt76_wr(dev, MT_WFDMA0_HOST_INT_ENA, 0);
43
44 if (!test_bit(MT76_STATE_INITIALIZED, &dev->mphy.state))
45 return IRQ_NONE;
46
47 tasklet_schedule(&dev->irq_tasklet);
48
49 return IRQ_HANDLED;
50 }
51
mt7921_irq_tasklet(unsigned long data)52 static void mt7921_irq_tasklet(unsigned long data)
53 {
54 struct mt7921_dev *dev = (struct mt7921_dev *)data;
55 u32 intr, mask = 0;
56
57 mt76_wr(dev, MT_WFDMA0_HOST_INT_ENA, 0);
58
59 intr = mt76_rr(dev, MT_WFDMA0_HOST_INT_STA);
60 intr &= dev->mt76.mmio.irqmask;
61 mt76_wr(dev, MT_WFDMA0_HOST_INT_STA, intr);
62
63 trace_dev_irq(&dev->mt76, intr, dev->mt76.mmio.irqmask);
64
65 mask |= intr & MT_INT_RX_DONE_ALL;
66 if (intr & MT_INT_TX_DONE_MCU)
67 mask |= MT_INT_TX_DONE_MCU;
68
69 if (intr & MT_INT_MCU_CMD) {
70 u32 intr_sw;
71
72 intr_sw = mt76_rr(dev, MT_MCU_CMD);
73 /* ack MCU2HOST_SW_INT_STA */
74 mt76_wr(dev, MT_MCU_CMD, intr_sw);
75 if (intr_sw & MT_MCU_CMD_WAKE_RX_PCIE) {
76 mask |= MT_INT_RX_DONE_DATA;
77 intr |= MT_INT_RX_DONE_DATA;
78 }
79 }
80
81 mt76_set_irq_mask(&dev->mt76, MT_WFDMA0_HOST_INT_ENA, mask, 0);
82
83 if (intr & MT_INT_TX_DONE_ALL)
84 napi_schedule(&dev->mt76.tx_napi);
85
86 if (intr & MT_INT_RX_DONE_WM)
87 napi_schedule(&dev->mt76.napi[MT_RXQ_MCU]);
88
89 if (intr & MT_INT_RX_DONE_WM2)
90 napi_schedule(&dev->mt76.napi[MT_RXQ_MCU_WA]);
91
92 if (intr & MT_INT_RX_DONE_DATA)
93 napi_schedule(&dev->mt76.napi[MT_RXQ_MAIN]);
94 }
95
mt7921e_init_reset(struct mt7921_dev * dev)96 static int mt7921e_init_reset(struct mt7921_dev *dev)
97 {
98 return mt7921_wpdma_reset(dev, true);
99 }
100
mt7921e_unregister_device(struct mt7921_dev * dev)101 static void mt7921e_unregister_device(struct mt7921_dev *dev)
102 {
103 int i;
104 struct mt76_connac_pm *pm = &dev->pm;
105
106 mt76_unregister_device(&dev->mt76);
107 mt76_for_each_q_rx(&dev->mt76, i)
108 napi_disable(&dev->mt76.napi[i]);
109 cancel_delayed_work_sync(&pm->ps_work);
110 cancel_work_sync(&pm->wake_work);
111
112 mt7921_tx_token_put(dev);
113 mt7921_mcu_drv_pmctrl(dev);
114 mt7921_dma_cleanup(dev);
115 mt7921_wfsys_reset(dev);
116 mt7921_mcu_exit(dev);
117
118 tasklet_disable(&dev->irq_tasklet);
119 mt76_free_device(&dev->mt76);
120 }
121
mt7921_pci_probe(struct pci_dev * pdev,const struct pci_device_id * id)122 static int mt7921_pci_probe(struct pci_dev *pdev,
123 const struct pci_device_id *id)
124 {
125 static const struct mt76_driver_ops drv_ops = {
126 /* txwi_size = txd size + txp size */
127 .txwi_size = MT_TXD_SIZE + sizeof(struct mt7921_txp_common),
128 .drv_flags = MT_DRV_TXWI_NO_FREE | MT_DRV_HW_MGMT_TXQ,
129 .survey_flags = SURVEY_INFO_TIME_TX |
130 SURVEY_INFO_TIME_RX |
131 SURVEY_INFO_TIME_BSS_RX,
132 .token_size = MT7921_TOKEN_SIZE,
133 .tx_prepare_skb = mt7921e_tx_prepare_skb,
134 .tx_complete_skb = mt7921e_tx_complete_skb,
135 .rx_skb = mt7921e_queue_rx_skb,
136 .rx_poll_complete = mt7921_rx_poll_complete,
137 .sta_ps = mt7921_sta_ps,
138 .sta_add = mt7921_mac_sta_add,
139 .sta_assoc = mt7921_mac_sta_assoc,
140 .sta_remove = mt7921_mac_sta_remove,
141 .update_survey = mt7921_update_channel,
142 };
143
144 static const struct mt7921_hif_ops mt7921_pcie_ops = {
145 .init_reset = mt7921e_init_reset,
146 .reset = mt7921e_mac_reset,
147 .mcu_init = mt7921e_mcu_init,
148 .drv_own = mt7921e_mcu_drv_pmctrl,
149 .fw_own = mt7921e_mcu_fw_pmctrl,
150 };
151
152 struct mt7921_dev *dev;
153 struct mt76_dev *mdev;
154 int ret;
155
156 ret = pcim_enable_device(pdev);
157 if (ret)
158 return ret;
159
160 ret = pcim_iomap_regions(pdev, BIT(0), pci_name(pdev));
161 if (ret)
162 return ret;
163
164 pci_set_master(pdev);
165
166 ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
167 if (ret < 0)
168 return ret;
169
170 ret = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
171 if (ret)
172 goto err_free_pci_vec;
173
174 if (mt7921_disable_aspm)
175 mt76_pci_disable_aspm(pdev);
176
177 mdev = mt76_alloc_device(&pdev->dev, sizeof(*dev), &mt7921_ops,
178 &drv_ops);
179 if (!mdev) {
180 ret = -ENOMEM;
181 goto err_free_pci_vec;
182 }
183
184 dev = container_of(mdev, struct mt7921_dev, mt76);
185 dev->hif_ops = &mt7921_pcie_ops;
186
187 mt76_mmio_init(&dev->mt76, pcim_iomap_table(pdev)[0]);
188 tasklet_init(&dev->irq_tasklet, mt7921_irq_tasklet, (unsigned long)dev);
189 mdev->rev = (mt7921_l1_rr(dev, MT_HW_CHIPID) << 16) |
190 (mt7921_l1_rr(dev, MT_HW_REV) & 0xff);
191 dev_err(mdev->dev, "ASIC revision: %04x\n", mdev->rev);
192
193 mt76_wr(dev, MT_WFDMA0_HOST_INT_ENA, 0);
194
195 mt76_wr(dev, MT_PCIE_MAC_INT_ENABLE, 0xff);
196
197 ret = devm_request_irq(mdev->dev, pdev->irq, mt7921_irq_handler,
198 IRQF_SHARED, KBUILD_MODNAME, dev);
199 if (ret)
200 goto err_free_dev;
201
202 ret = mt7921_dma_init(dev);
203 if (ret)
204 goto err_free_irq;
205
206 ret = mt7921_register_device(dev);
207 if (ret)
208 goto err_free_irq;
209
210 return 0;
211
212 err_free_irq:
213 devm_free_irq(&pdev->dev, pdev->irq, dev);
214 err_free_dev:
215 mt76_free_device(&dev->mt76);
216 err_free_pci_vec:
217 pci_free_irq_vectors(pdev);
218
219 return ret;
220 }
221
mt7921_pci_remove(struct pci_dev * pdev)222 static void mt7921_pci_remove(struct pci_dev *pdev)
223 {
224 struct mt76_dev *mdev = pci_get_drvdata(pdev);
225 struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76);
226
227 mt7921e_unregister_device(dev);
228 devm_free_irq(&pdev->dev, pdev->irq, dev);
229 pci_free_irq_vectors(pdev);
230 }
231
232 #ifdef CONFIG_PM
mt7921_pci_suspend(struct pci_dev * pdev,pm_message_t state)233 static int mt7921_pci_suspend(struct pci_dev *pdev, pm_message_t state)
234 {
235 struct mt76_dev *mdev = pci_get_drvdata(pdev);
236 struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76);
237 struct mt76_connac_pm *pm = &dev->pm;
238 bool hif_suspend;
239 int i, err;
240
241 pm->suspended = true;
242 cancel_delayed_work_sync(&pm->ps_work);
243 cancel_work_sync(&pm->wake_work);
244
245 err = mt7921_mcu_drv_pmctrl(dev);
246 if (err < 0)
247 goto restore_suspend;
248
249 hif_suspend = !test_bit(MT76_STATE_SUSPEND, &dev->mphy.state);
250 if (hif_suspend) {
251 err = mt76_connac_mcu_set_hif_suspend(mdev, true);
252 if (err)
253 goto restore_suspend;
254 }
255
256 /* always enable deep sleep during suspend to reduce
257 * power consumption
258 */
259 mt76_connac_mcu_set_deep_sleep(&dev->mt76, true);
260
261 napi_disable(&mdev->tx_napi);
262 mt76_worker_disable(&mdev->tx_worker);
263
264 mt76_for_each_q_rx(mdev, i) {
265 napi_disable(&mdev->napi[i]);
266 }
267
268 pci_enable_wake(pdev, pci_choose_state(pdev, state), true);
269
270 /* wait until dma is idle */
271 mt76_poll(dev, MT_WFDMA0_GLO_CFG,
272 MT_WFDMA0_GLO_CFG_TX_DMA_BUSY |
273 MT_WFDMA0_GLO_CFG_RX_DMA_BUSY, 0, 1000);
274
275 /* put dma disabled */
276 mt76_clear(dev, MT_WFDMA0_GLO_CFG,
277 MT_WFDMA0_GLO_CFG_TX_DMA_EN | MT_WFDMA0_GLO_CFG_RX_DMA_EN);
278
279 /* disable interrupt */
280 mt76_wr(dev, MT_WFDMA0_HOST_INT_ENA, 0);
281 mt76_wr(dev, MT_PCIE_MAC_INT_ENABLE, 0x0);
282 synchronize_irq(pdev->irq);
283 tasklet_kill(&dev->irq_tasklet);
284
285 err = mt7921_mcu_fw_pmctrl(dev);
286 if (err)
287 goto restore_napi;
288
289 pci_save_state(pdev);
290 err = pci_set_power_state(pdev, pci_choose_state(pdev, state));
291 if (err)
292 goto restore_napi;
293
294 return 0;
295
296 restore_napi:
297 mt76_for_each_q_rx(mdev, i) {
298 napi_enable(&mdev->napi[i]);
299 }
300 napi_enable(&mdev->tx_napi);
301
302 if (!pm->ds_enable)
303 mt76_connac_mcu_set_deep_sleep(&dev->mt76, false);
304
305 if (hif_suspend)
306 mt76_connac_mcu_set_hif_suspend(mdev, false);
307
308 restore_suspend:
309 pm->suspended = false;
310
311 return err;
312 }
313
mt7921_pci_resume(struct pci_dev * pdev)314 static int mt7921_pci_resume(struct pci_dev *pdev)
315 {
316 struct mt76_dev *mdev = pci_get_drvdata(pdev);
317 struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76);
318 struct mt76_connac_pm *pm = &dev->pm;
319 int i, err;
320
321 pm->suspended = false;
322 err = pci_set_power_state(pdev, PCI_D0);
323 if (err)
324 return err;
325
326 pci_restore_state(pdev);
327
328 err = mt7921_mcu_drv_pmctrl(dev);
329 if (err < 0)
330 return err;
331
332 mt7921_wpdma_reinit_cond(dev);
333
334 /* enable interrupt */
335 mt76_wr(dev, MT_PCIE_MAC_INT_ENABLE, 0xff);
336 mt7921_irq_enable(dev, MT_INT_RX_DONE_ALL | MT_INT_TX_DONE_ALL |
337 MT_INT_MCU_CMD);
338 mt76_set(dev, MT_MCU2HOST_SW_INT_ENA, MT_MCU_CMD_WAKE_RX_PCIE);
339
340 /* put dma enabled */
341 mt76_set(dev, MT_WFDMA0_GLO_CFG,
342 MT_WFDMA0_GLO_CFG_TX_DMA_EN | MT_WFDMA0_GLO_CFG_RX_DMA_EN);
343
344 mt76_worker_enable(&mdev->tx_worker);
345
346 local_bh_disable();
347 mt76_for_each_q_rx(mdev, i) {
348 napi_enable(&mdev->napi[i]);
349 napi_schedule(&mdev->napi[i]);
350 }
351 napi_enable(&mdev->tx_napi);
352 napi_schedule(&mdev->tx_napi);
353 local_bh_enable();
354
355 /* restore previous ds setting */
356 if (!pm->ds_enable)
357 mt76_connac_mcu_set_deep_sleep(&dev->mt76, false);
358
359 if (!test_bit(MT76_STATE_SUSPEND, &dev->mphy.state))
360 err = mt76_connac_mcu_set_hif_suspend(mdev, false);
361
362 return err;
363 }
364 #endif /* CONFIG_PM */
365
366 struct pci_driver mt7921_pci_driver = {
367 .name = KBUILD_MODNAME,
368 .id_table = mt7921_pci_device_table,
369 .probe = mt7921_pci_probe,
370 .remove = mt7921_pci_remove,
371 #ifdef CONFIG_PM
372 .suspend = mt7921_pci_suspend,
373 .resume = mt7921_pci_resume,
374 #endif /* CONFIG_PM */
375 };
376
377 module_pci_driver(mt7921_pci_driver);
378
379 MODULE_DEVICE_TABLE(pci, mt7921_pci_device_table);
380 MODULE_FIRMWARE(MT7921_FIRMWARE_WM);
381 MODULE_FIRMWARE(MT7921_ROM_PATCH);
382 MODULE_FIRMWARE(MT7922_FIRMWARE_WM);
383 MODULE_FIRMWARE(MT7922_ROM_PATCH);
384 MODULE_AUTHOR("Sean Wang <sean.wang@mediatek.com>");
385 MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");
386 MODULE_LICENSE("Dual BSD/GPL");
387