1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Derived from many drivers using generic_serial interface,
4 * especially serial_tx3912.c by Steven J. Hill and r39xx_serial.c
5 * (was in Linux/VR tree) by Jim Pick.
6 *
7 * Copyright (C) 1999 Harald Koerfgen
8 * Copyright (C) 2000 Jim Pick <jim@jimpick.com>
9 * Copyright (C) 2001 Steven J. Hill (sjhill@realitydiluted.com)
10 * Copyright (C) 2000-2002 Toshiba Corporation
11 *
12 * Serial driver for TX3927/TX4927/TX4925/TX4938 internal SIO controller
13 */
14
15 #include <linux/module.h>
16 #include <linux/ioport.h>
17 #include <linux/init.h>
18 #include <linux/console.h>
19 #include <linux/delay.h>
20 #include <linux/platform_device.h>
21 #include <linux/pci.h>
22 #include <linux/serial_core.h>
23 #include <linux/serial.h>
24 #include <linux/tty.h>
25 #include <linux/tty_flip.h>
26
27 #include <linux/io.h>
28
29 static char *serial_version = "1.11";
30 static char *serial_name = "TX39/49 Serial driver";
31
32 #define PASS_LIMIT 256
33
34 #if !defined(CONFIG_SERIAL_TXX9_STDSERIAL)
35 /* "ttyS" is used for standard serial driver */
36 #define TXX9_TTY_NAME "ttyTX"
37 #define TXX9_TTY_MINOR_START 196
38 #define TXX9_TTY_MAJOR 204
39 #else
40 /* acts like standard serial driver */
41 #define TXX9_TTY_NAME "ttyS"
42 #define TXX9_TTY_MINOR_START 64
43 #define TXX9_TTY_MAJOR TTY_MAJOR
44 #endif
45
46 /* flag aliases */
47 #define UPF_TXX9_HAVE_CTS_LINE UPF_BUGGY_UART
48 #define UPF_TXX9_USE_SCLK UPF_MAGIC_MULTIPLIER
49
50 #ifdef CONFIG_PCI
51 /* support for Toshiba TC86C001 SIO */
52 #define ENABLE_SERIAL_TXX9_PCI
53 #endif
54
55 /*
56 * Number of serial ports
57 */
58 #define UART_NR CONFIG_SERIAL_TXX9_NR_UARTS
59
60 struct uart_txx9_port {
61 struct uart_port port;
62 /* No additional info for now */
63 };
64
65 #define TXX9_REGION_SIZE 0x24
66
67 /* TXX9 Serial Registers */
68 #define TXX9_SILCR 0x00
69 #define TXX9_SIDICR 0x04
70 #define TXX9_SIDISR 0x08
71 #define TXX9_SICISR 0x0c
72 #define TXX9_SIFCR 0x10
73 #define TXX9_SIFLCR 0x14
74 #define TXX9_SIBGR 0x18
75 #define TXX9_SITFIFO 0x1c
76 #define TXX9_SIRFIFO 0x20
77
78 /* SILCR : Line Control */
79 #define TXX9_SILCR_SCS_MASK 0x00000060
80 #define TXX9_SILCR_SCS_IMCLK 0x00000000
81 #define TXX9_SILCR_SCS_IMCLK_BG 0x00000020
82 #define TXX9_SILCR_SCS_SCLK 0x00000040
83 #define TXX9_SILCR_SCS_SCLK_BG 0x00000060
84 #define TXX9_SILCR_UEPS 0x00000010
85 #define TXX9_SILCR_UPEN 0x00000008
86 #define TXX9_SILCR_USBL_MASK 0x00000004
87 #define TXX9_SILCR_USBL_1BIT 0x00000000
88 #define TXX9_SILCR_USBL_2BIT 0x00000004
89 #define TXX9_SILCR_UMODE_MASK 0x00000003
90 #define TXX9_SILCR_UMODE_8BIT 0x00000000
91 #define TXX9_SILCR_UMODE_7BIT 0x00000001
92
93 /* SIDICR : DMA/Int. Control */
94 #define TXX9_SIDICR_TDE 0x00008000
95 #define TXX9_SIDICR_RDE 0x00004000
96 #define TXX9_SIDICR_TIE 0x00002000
97 #define TXX9_SIDICR_RIE 0x00001000
98 #define TXX9_SIDICR_SPIE 0x00000800
99 #define TXX9_SIDICR_CTSAC 0x00000600
100 #define TXX9_SIDICR_STIE_MASK 0x0000003f
101 #define TXX9_SIDICR_STIE_OERS 0x00000020
102 #define TXX9_SIDICR_STIE_CTSS 0x00000010
103 #define TXX9_SIDICR_STIE_RBRKD 0x00000008
104 #define TXX9_SIDICR_STIE_TRDY 0x00000004
105 #define TXX9_SIDICR_STIE_TXALS 0x00000002
106 #define TXX9_SIDICR_STIE_UBRKD 0x00000001
107
108 /* SIDISR : DMA/Int. Status */
109 #define TXX9_SIDISR_UBRK 0x00008000
110 #define TXX9_SIDISR_UVALID 0x00004000
111 #define TXX9_SIDISR_UFER 0x00002000
112 #define TXX9_SIDISR_UPER 0x00001000
113 #define TXX9_SIDISR_UOER 0x00000800
114 #define TXX9_SIDISR_ERI 0x00000400
115 #define TXX9_SIDISR_TOUT 0x00000200
116 #define TXX9_SIDISR_TDIS 0x00000100
117 #define TXX9_SIDISR_RDIS 0x00000080
118 #define TXX9_SIDISR_STIS 0x00000040
119 #define TXX9_SIDISR_RFDN_MASK 0x0000001f
120
121 /* SICISR : Change Int. Status */
122 #define TXX9_SICISR_OERS 0x00000020
123 #define TXX9_SICISR_CTSS 0x00000010
124 #define TXX9_SICISR_RBRKD 0x00000008
125 #define TXX9_SICISR_TRDY 0x00000004
126 #define TXX9_SICISR_TXALS 0x00000002
127 #define TXX9_SICISR_UBRKD 0x00000001
128
129 /* SIFCR : FIFO Control */
130 #define TXX9_SIFCR_SWRST 0x00008000
131 #define TXX9_SIFCR_RDIL_MASK 0x00000180
132 #define TXX9_SIFCR_RDIL_1 0x00000000
133 #define TXX9_SIFCR_RDIL_4 0x00000080
134 #define TXX9_SIFCR_RDIL_8 0x00000100
135 #define TXX9_SIFCR_RDIL_12 0x00000180
136 #define TXX9_SIFCR_RDIL_MAX 0x00000180
137 #define TXX9_SIFCR_TDIL_MASK 0x00000018
138 #define TXX9_SIFCR_TDIL_1 0x00000000
139 #define TXX9_SIFCR_TDIL_4 0x00000001
140 #define TXX9_SIFCR_TDIL_8 0x00000010
141 #define TXX9_SIFCR_TDIL_MAX 0x00000010
142 #define TXX9_SIFCR_TFRST 0x00000004
143 #define TXX9_SIFCR_RFRST 0x00000002
144 #define TXX9_SIFCR_FRSTE 0x00000001
145 #define TXX9_SIO_TX_FIFO 8
146 #define TXX9_SIO_RX_FIFO 16
147
148 /* SIFLCR : Flow Control */
149 #define TXX9_SIFLCR_RCS 0x00001000
150 #define TXX9_SIFLCR_TES 0x00000800
151 #define TXX9_SIFLCR_RTSSC 0x00000200
152 #define TXX9_SIFLCR_RSDE 0x00000100
153 #define TXX9_SIFLCR_TSDE 0x00000080
154 #define TXX9_SIFLCR_RTSTL_MASK 0x0000001e
155 #define TXX9_SIFLCR_RTSTL_MAX 0x0000001e
156 #define TXX9_SIFLCR_TBRK 0x00000001
157
158 /* SIBGR : Baudrate Control */
159 #define TXX9_SIBGR_BCLK_MASK 0x00000300
160 #define TXX9_SIBGR_BCLK_T0 0x00000000
161 #define TXX9_SIBGR_BCLK_T2 0x00000100
162 #define TXX9_SIBGR_BCLK_T4 0x00000200
163 #define TXX9_SIBGR_BCLK_T6 0x00000300
164 #define TXX9_SIBGR_BRD_MASK 0x000000ff
165
sio_in(struct uart_txx9_port * up,int offset)166 static inline unsigned int sio_in(struct uart_txx9_port *up, int offset)
167 {
168 switch (up->port.iotype) {
169 default:
170 return __raw_readl(up->port.membase + offset);
171 case UPIO_PORT:
172 return inl(up->port.iobase + offset);
173 }
174 }
175
176 static inline void
sio_out(struct uart_txx9_port * up,int offset,int value)177 sio_out(struct uart_txx9_port *up, int offset, int value)
178 {
179 switch (up->port.iotype) {
180 default:
181 __raw_writel(value, up->port.membase + offset);
182 break;
183 case UPIO_PORT:
184 outl(value, up->port.iobase + offset);
185 break;
186 }
187 }
188
189 static inline void
sio_mask(struct uart_txx9_port * up,int offset,unsigned int value)190 sio_mask(struct uart_txx9_port *up, int offset, unsigned int value)
191 {
192 sio_out(up, offset, sio_in(up, offset) & ~value);
193 }
194 static inline void
sio_set(struct uart_txx9_port * up,int offset,unsigned int value)195 sio_set(struct uart_txx9_port *up, int offset, unsigned int value)
196 {
197 sio_out(up, offset, sio_in(up, offset) | value);
198 }
199
200 static inline void
sio_quot_set(struct uart_txx9_port * up,int quot)201 sio_quot_set(struct uart_txx9_port *up, int quot)
202 {
203 quot >>= 1;
204 if (quot < 256)
205 sio_out(up, TXX9_SIBGR, quot | TXX9_SIBGR_BCLK_T0);
206 else if (quot < (256 << 2))
207 sio_out(up, TXX9_SIBGR, (quot >> 2) | TXX9_SIBGR_BCLK_T2);
208 else if (quot < (256 << 4))
209 sio_out(up, TXX9_SIBGR, (quot >> 4) | TXX9_SIBGR_BCLK_T4);
210 else if (quot < (256 << 6))
211 sio_out(up, TXX9_SIBGR, (quot >> 6) | TXX9_SIBGR_BCLK_T6);
212 else
213 sio_out(up, TXX9_SIBGR, 0xff | TXX9_SIBGR_BCLK_T6);
214 }
215
to_uart_txx9_port(struct uart_port * port)216 static struct uart_txx9_port *to_uart_txx9_port(struct uart_port *port)
217 {
218 return container_of(port, struct uart_txx9_port, port);
219 }
220
serial_txx9_stop_tx(struct uart_port * port)221 static void serial_txx9_stop_tx(struct uart_port *port)
222 {
223 struct uart_txx9_port *up = to_uart_txx9_port(port);
224 sio_mask(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
225 }
226
serial_txx9_start_tx(struct uart_port * port)227 static void serial_txx9_start_tx(struct uart_port *port)
228 {
229 struct uart_txx9_port *up = to_uart_txx9_port(port);
230 sio_set(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
231 }
232
serial_txx9_stop_rx(struct uart_port * port)233 static void serial_txx9_stop_rx(struct uart_port *port)
234 {
235 struct uart_txx9_port *up = to_uart_txx9_port(port);
236 up->port.read_status_mask &= ~TXX9_SIDISR_RDIS;
237 }
238
serial_txx9_initialize(struct uart_port * port)239 static void serial_txx9_initialize(struct uart_port *port)
240 {
241 struct uart_txx9_port *up = to_uart_txx9_port(port);
242 unsigned int tmout = 10000;
243
244 sio_out(up, TXX9_SIFCR, TXX9_SIFCR_SWRST);
245 /* TX4925 BUG WORKAROUND. Accessing SIOC register
246 * immediately after soft reset causes bus error. */
247 udelay(1);
248 while ((sio_in(up, TXX9_SIFCR) & TXX9_SIFCR_SWRST) && --tmout)
249 udelay(1);
250 /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
251 sio_set(up, TXX9_SIFCR,
252 TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1);
253 /* initial settings */
254 sio_out(up, TXX9_SILCR,
255 TXX9_SILCR_UMODE_8BIT | TXX9_SILCR_USBL_1BIT |
256 ((up->port.flags & UPF_TXX9_USE_SCLK) ?
257 TXX9_SILCR_SCS_SCLK_BG : TXX9_SILCR_SCS_IMCLK_BG));
258 sio_quot_set(up, uart_get_divisor(port, 9600));
259 sio_out(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSTL_MAX /* 15 */);
260 sio_out(up, TXX9_SIDICR, 0);
261 }
262
263 static inline void
receive_chars(struct uart_txx9_port * up,unsigned int * status)264 receive_chars(struct uart_txx9_port *up, unsigned int *status)
265 {
266 unsigned char ch;
267 unsigned int disr = *status;
268 int max_count = 256;
269 char flag;
270 unsigned int next_ignore_status_mask;
271
272 do {
273 ch = sio_in(up, TXX9_SIRFIFO);
274 flag = TTY_NORMAL;
275 up->port.icount.rx++;
276
277 /* mask out RFDN_MASK bit added by previous overrun */
278 next_ignore_status_mask =
279 up->port.ignore_status_mask & ~TXX9_SIDISR_RFDN_MASK;
280 if (unlikely(disr & (TXX9_SIDISR_UBRK | TXX9_SIDISR_UPER |
281 TXX9_SIDISR_UFER | TXX9_SIDISR_UOER))) {
282 /*
283 * For statistics only
284 */
285 if (disr & TXX9_SIDISR_UBRK) {
286 disr &= ~(TXX9_SIDISR_UFER | TXX9_SIDISR_UPER);
287 up->port.icount.brk++;
288 /*
289 * We do the SysRQ and SAK checking
290 * here because otherwise the break
291 * may get masked by ignore_status_mask
292 * or read_status_mask.
293 */
294 if (uart_handle_break(&up->port))
295 goto ignore_char;
296 } else if (disr & TXX9_SIDISR_UPER)
297 up->port.icount.parity++;
298 else if (disr & TXX9_SIDISR_UFER)
299 up->port.icount.frame++;
300 if (disr & TXX9_SIDISR_UOER) {
301 up->port.icount.overrun++;
302 /*
303 * The receiver read buffer still hold
304 * a char which caused overrun.
305 * Ignore next char by adding RFDN_MASK
306 * to ignore_status_mask temporarily.
307 */
308 next_ignore_status_mask |=
309 TXX9_SIDISR_RFDN_MASK;
310 }
311
312 /*
313 * Mask off conditions which should be ingored.
314 */
315 disr &= up->port.read_status_mask;
316
317 if (disr & TXX9_SIDISR_UBRK) {
318 flag = TTY_BREAK;
319 } else if (disr & TXX9_SIDISR_UPER)
320 flag = TTY_PARITY;
321 else if (disr & TXX9_SIDISR_UFER)
322 flag = TTY_FRAME;
323 }
324 if (uart_handle_sysrq_char(&up->port, ch))
325 goto ignore_char;
326
327 uart_insert_char(&up->port, disr, TXX9_SIDISR_UOER, ch, flag);
328
329 ignore_char:
330 up->port.ignore_status_mask = next_ignore_status_mask;
331 disr = sio_in(up, TXX9_SIDISR);
332 } while (!(disr & TXX9_SIDISR_UVALID) && (max_count-- > 0));
333
334 tty_flip_buffer_push(&up->port.state->port);
335
336 *status = disr;
337 }
338
transmit_chars(struct uart_txx9_port * up)339 static inline void transmit_chars(struct uart_txx9_port *up)
340 {
341 struct circ_buf *xmit = &up->port.state->xmit;
342 int count;
343
344 if (up->port.x_char) {
345 sio_out(up, TXX9_SITFIFO, up->port.x_char);
346 up->port.icount.tx++;
347 up->port.x_char = 0;
348 return;
349 }
350 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
351 serial_txx9_stop_tx(&up->port);
352 return;
353 }
354
355 count = TXX9_SIO_TX_FIFO;
356 do {
357 sio_out(up, TXX9_SITFIFO, xmit->buf[xmit->tail]);
358 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
359 up->port.icount.tx++;
360 if (uart_circ_empty(xmit))
361 break;
362 } while (--count > 0);
363
364 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
365 uart_write_wakeup(&up->port);
366
367 if (uart_circ_empty(xmit))
368 serial_txx9_stop_tx(&up->port);
369 }
370
serial_txx9_interrupt(int irq,void * dev_id)371 static irqreturn_t serial_txx9_interrupt(int irq, void *dev_id)
372 {
373 int pass_counter = 0;
374 struct uart_txx9_port *up = dev_id;
375 unsigned int status;
376
377 while (1) {
378 spin_lock(&up->port.lock);
379 status = sio_in(up, TXX9_SIDISR);
380 if (!(sio_in(up, TXX9_SIDICR) & TXX9_SIDICR_TIE))
381 status &= ~TXX9_SIDISR_TDIS;
382 if (!(status & (TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
383 TXX9_SIDISR_TOUT))) {
384 spin_unlock(&up->port.lock);
385 break;
386 }
387
388 if (status & TXX9_SIDISR_RDIS)
389 receive_chars(up, &status);
390 if (status & TXX9_SIDISR_TDIS)
391 transmit_chars(up);
392 /* Clear TX/RX Int. Status */
393 sio_mask(up, TXX9_SIDISR,
394 TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
395 TXX9_SIDISR_TOUT);
396 spin_unlock(&up->port.lock);
397
398 if (pass_counter++ > PASS_LIMIT)
399 break;
400 }
401
402 return pass_counter ? IRQ_HANDLED : IRQ_NONE;
403 }
404
serial_txx9_tx_empty(struct uart_port * port)405 static unsigned int serial_txx9_tx_empty(struct uart_port *port)
406 {
407 struct uart_txx9_port *up = to_uart_txx9_port(port);
408 unsigned long flags;
409 unsigned int ret;
410
411 spin_lock_irqsave(&up->port.lock, flags);
412 ret = (sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS) ? TIOCSER_TEMT : 0;
413 spin_unlock_irqrestore(&up->port.lock, flags);
414
415 return ret;
416 }
417
serial_txx9_get_mctrl(struct uart_port * port)418 static unsigned int serial_txx9_get_mctrl(struct uart_port *port)
419 {
420 struct uart_txx9_port *up = to_uart_txx9_port(port);
421 unsigned int ret;
422
423 /* no modem control lines */
424 ret = TIOCM_CAR | TIOCM_DSR;
425 ret |= (sio_in(up, TXX9_SIFLCR) & TXX9_SIFLCR_RTSSC) ? 0 : TIOCM_RTS;
426 ret |= (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS) ? 0 : TIOCM_CTS;
427
428 return ret;
429 }
430
serial_txx9_set_mctrl(struct uart_port * port,unsigned int mctrl)431 static void serial_txx9_set_mctrl(struct uart_port *port, unsigned int mctrl)
432 {
433 struct uart_txx9_port *up = to_uart_txx9_port(port);
434
435 if (mctrl & TIOCM_RTS)
436 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
437 else
438 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
439 }
440
serial_txx9_break_ctl(struct uart_port * port,int break_state)441 static void serial_txx9_break_ctl(struct uart_port *port, int break_state)
442 {
443 struct uart_txx9_port *up = to_uart_txx9_port(port);
444 unsigned long flags;
445
446 spin_lock_irqsave(&up->port.lock, flags);
447 if (break_state == -1)
448 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
449 else
450 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
451 spin_unlock_irqrestore(&up->port.lock, flags);
452 }
453
454 #if defined(CONFIG_SERIAL_TXX9_CONSOLE) || defined(CONFIG_CONSOLE_POLL)
455 /*
456 * Wait for transmitter & holding register to empty
457 */
wait_for_xmitr(struct uart_txx9_port * up)458 static void wait_for_xmitr(struct uart_txx9_port *up)
459 {
460 unsigned int tmout = 10000;
461
462 /* Wait up to 10ms for the character(s) to be sent. */
463 while (--tmout &&
464 !(sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS))
465 udelay(1);
466
467 /* Wait up to 1s for flow control if necessary */
468 if (up->port.flags & UPF_CONS_FLOW) {
469 tmout = 1000000;
470 while (--tmout &&
471 (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS))
472 udelay(1);
473 }
474 }
475 #endif
476
477 #ifdef CONFIG_CONSOLE_POLL
478 /*
479 * Console polling routines for writing and reading from the uart while
480 * in an interrupt or debug context.
481 */
482
serial_txx9_get_poll_char(struct uart_port * port)483 static int serial_txx9_get_poll_char(struct uart_port *port)
484 {
485 unsigned int ier;
486 unsigned char c;
487 struct uart_txx9_port *up = to_uart_txx9_port(port);
488
489 /*
490 * First save the IER then disable the interrupts
491 */
492 ier = sio_in(up, TXX9_SIDICR);
493 sio_out(up, TXX9_SIDICR, 0);
494
495 while (sio_in(up, TXX9_SIDISR) & TXX9_SIDISR_UVALID)
496 ;
497
498 c = sio_in(up, TXX9_SIRFIFO);
499
500 /*
501 * Finally, clear RX interrupt status
502 * and restore the IER
503 */
504 sio_mask(up, TXX9_SIDISR, TXX9_SIDISR_RDIS);
505 sio_out(up, TXX9_SIDICR, ier);
506 return c;
507 }
508
509
serial_txx9_put_poll_char(struct uart_port * port,unsigned char c)510 static void serial_txx9_put_poll_char(struct uart_port *port, unsigned char c)
511 {
512 unsigned int ier;
513 struct uart_txx9_port *up = to_uart_txx9_port(port);
514
515 /*
516 * First save the IER then disable the interrupts
517 */
518 ier = sio_in(up, TXX9_SIDICR);
519 sio_out(up, TXX9_SIDICR, 0);
520
521 wait_for_xmitr(up);
522 /*
523 * Send the character out.
524 */
525 sio_out(up, TXX9_SITFIFO, c);
526
527 /*
528 * Finally, wait for transmitter to become empty
529 * and restore the IER
530 */
531 wait_for_xmitr(up);
532 sio_out(up, TXX9_SIDICR, ier);
533 }
534
535 #endif /* CONFIG_CONSOLE_POLL */
536
serial_txx9_startup(struct uart_port * port)537 static int serial_txx9_startup(struct uart_port *port)
538 {
539 struct uart_txx9_port *up = to_uart_txx9_port(port);
540 unsigned long flags;
541 int retval;
542
543 /*
544 * Clear the FIFO buffers and disable them.
545 * (they will be reenabled in set_termios())
546 */
547 sio_set(up, TXX9_SIFCR,
548 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
549 /* clear reset */
550 sio_mask(up, TXX9_SIFCR,
551 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
552 sio_out(up, TXX9_SIDICR, 0);
553
554 /*
555 * Clear the interrupt registers.
556 */
557 sio_out(up, TXX9_SIDISR, 0);
558
559 retval = request_irq(up->port.irq, serial_txx9_interrupt,
560 IRQF_SHARED, "serial_txx9", up);
561 if (retval)
562 return retval;
563
564 /*
565 * Now, initialize the UART
566 */
567 spin_lock_irqsave(&up->port.lock, flags);
568 serial_txx9_set_mctrl(&up->port, up->port.mctrl);
569 spin_unlock_irqrestore(&up->port.lock, flags);
570
571 /* Enable RX/TX */
572 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
573
574 /*
575 * Finally, enable interrupts.
576 */
577 sio_set(up, TXX9_SIDICR, TXX9_SIDICR_RIE);
578
579 return 0;
580 }
581
serial_txx9_shutdown(struct uart_port * port)582 static void serial_txx9_shutdown(struct uart_port *port)
583 {
584 struct uart_txx9_port *up = to_uart_txx9_port(port);
585 unsigned long flags;
586
587 /*
588 * Disable interrupts from this port
589 */
590 sio_out(up, TXX9_SIDICR, 0); /* disable all intrs */
591
592 spin_lock_irqsave(&up->port.lock, flags);
593 serial_txx9_set_mctrl(&up->port, up->port.mctrl);
594 spin_unlock_irqrestore(&up->port.lock, flags);
595
596 /*
597 * Disable break condition
598 */
599 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
600
601 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
602 if (up->port.cons && up->port.line == up->port.cons->index) {
603 free_irq(up->port.irq, up);
604 return;
605 }
606 #endif
607 /* reset FIFOs */
608 sio_set(up, TXX9_SIFCR,
609 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
610 /* clear reset */
611 sio_mask(up, TXX9_SIFCR,
612 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
613
614 /* Disable RX/TX */
615 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
616
617 free_irq(up->port.irq, up);
618 }
619
620 static void
serial_txx9_set_termios(struct uart_port * port,struct ktermios * termios,struct ktermios * old)621 serial_txx9_set_termios(struct uart_port *port, struct ktermios *termios,
622 struct ktermios *old)
623 {
624 struct uart_txx9_port *up = to_uart_txx9_port(port);
625 unsigned int cval, fcr = 0;
626 unsigned long flags;
627 unsigned int baud, quot;
628
629 /*
630 * We don't support modem control lines.
631 */
632 termios->c_cflag &= ~(HUPCL | CMSPAR);
633 termios->c_cflag |= CLOCAL;
634
635 cval = sio_in(up, TXX9_SILCR);
636 /* byte size and parity */
637 cval &= ~TXX9_SILCR_UMODE_MASK;
638 switch (termios->c_cflag & CSIZE) {
639 case CS7:
640 cval |= TXX9_SILCR_UMODE_7BIT;
641 break;
642 default:
643 case CS5: /* not supported */
644 case CS6: /* not supported */
645 case CS8:
646 cval |= TXX9_SILCR_UMODE_8BIT;
647 break;
648 }
649
650 cval &= ~TXX9_SILCR_USBL_MASK;
651 if (termios->c_cflag & CSTOPB)
652 cval |= TXX9_SILCR_USBL_2BIT;
653 else
654 cval |= TXX9_SILCR_USBL_1BIT;
655 cval &= ~(TXX9_SILCR_UPEN | TXX9_SILCR_UEPS);
656 if (termios->c_cflag & PARENB)
657 cval |= TXX9_SILCR_UPEN;
658 if (!(termios->c_cflag & PARODD))
659 cval |= TXX9_SILCR_UEPS;
660
661 /*
662 * Ask the core to calculate the divisor for us.
663 */
664 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16/2);
665 quot = uart_get_divisor(port, baud);
666
667 /* Set up FIFOs */
668 /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
669 fcr = TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1;
670
671 /*
672 * Ok, we're now changing the port state. Do it with
673 * interrupts disabled.
674 */
675 spin_lock_irqsave(&up->port.lock, flags);
676
677 /*
678 * Update the per-port timeout.
679 */
680 uart_update_timeout(port, termios->c_cflag, baud);
681
682 up->port.read_status_mask = TXX9_SIDISR_UOER |
683 TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS;
684 if (termios->c_iflag & INPCK)
685 up->port.read_status_mask |= TXX9_SIDISR_UFER | TXX9_SIDISR_UPER;
686 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
687 up->port.read_status_mask |= TXX9_SIDISR_UBRK;
688
689 /*
690 * Characteres to ignore
691 */
692 up->port.ignore_status_mask = 0;
693 if (termios->c_iflag & IGNPAR)
694 up->port.ignore_status_mask |= TXX9_SIDISR_UPER | TXX9_SIDISR_UFER;
695 if (termios->c_iflag & IGNBRK) {
696 up->port.ignore_status_mask |= TXX9_SIDISR_UBRK;
697 /*
698 * If we're ignoring parity and break indicators,
699 * ignore overruns too (for real raw support).
700 */
701 if (termios->c_iflag & IGNPAR)
702 up->port.ignore_status_mask |= TXX9_SIDISR_UOER;
703 }
704
705 /*
706 * ignore all characters if CREAD is not set
707 */
708 if ((termios->c_cflag & CREAD) == 0)
709 up->port.ignore_status_mask |= TXX9_SIDISR_RDIS;
710
711 /* CTS flow control flag */
712 if ((termios->c_cflag & CRTSCTS) &&
713 (up->port.flags & UPF_TXX9_HAVE_CTS_LINE)) {
714 sio_set(up, TXX9_SIFLCR,
715 TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
716 } else {
717 sio_mask(up, TXX9_SIFLCR,
718 TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
719 }
720
721 sio_out(up, TXX9_SILCR, cval);
722 sio_quot_set(up, quot);
723 sio_out(up, TXX9_SIFCR, fcr);
724
725 serial_txx9_set_mctrl(&up->port, up->port.mctrl);
726 spin_unlock_irqrestore(&up->port.lock, flags);
727 }
728
729 static void
serial_txx9_pm(struct uart_port * port,unsigned int state,unsigned int oldstate)730 serial_txx9_pm(struct uart_port *port, unsigned int state,
731 unsigned int oldstate)
732 {
733 /*
734 * If oldstate was -1 this is called from
735 * uart_configure_port(). In this case do not initialize the
736 * port now, because the port was already initialized (for
737 * non-console port) or should not be initialized here (for
738 * console port). If we initialized the port here we lose
739 * serial console settings.
740 */
741 if (state == 0 && oldstate != -1)
742 serial_txx9_initialize(port);
743 }
744
serial_txx9_request_resource(struct uart_txx9_port * up)745 static int serial_txx9_request_resource(struct uart_txx9_port *up)
746 {
747 unsigned int size = TXX9_REGION_SIZE;
748 int ret = 0;
749
750 switch (up->port.iotype) {
751 default:
752 if (!up->port.mapbase)
753 break;
754
755 if (!request_mem_region(up->port.mapbase, size, "serial_txx9")) {
756 ret = -EBUSY;
757 break;
758 }
759
760 if (up->port.flags & UPF_IOREMAP) {
761 up->port.membase = ioremap(up->port.mapbase, size);
762 if (!up->port.membase) {
763 release_mem_region(up->port.mapbase, size);
764 ret = -ENOMEM;
765 }
766 }
767 break;
768
769 case UPIO_PORT:
770 if (!request_region(up->port.iobase, size, "serial_txx9"))
771 ret = -EBUSY;
772 break;
773 }
774 return ret;
775 }
776
serial_txx9_release_resource(struct uart_txx9_port * up)777 static void serial_txx9_release_resource(struct uart_txx9_port *up)
778 {
779 unsigned int size = TXX9_REGION_SIZE;
780
781 switch (up->port.iotype) {
782 default:
783 if (!up->port.mapbase)
784 break;
785
786 if (up->port.flags & UPF_IOREMAP) {
787 iounmap(up->port.membase);
788 up->port.membase = NULL;
789 }
790
791 release_mem_region(up->port.mapbase, size);
792 break;
793
794 case UPIO_PORT:
795 release_region(up->port.iobase, size);
796 break;
797 }
798 }
799
serial_txx9_release_port(struct uart_port * port)800 static void serial_txx9_release_port(struct uart_port *port)
801 {
802 struct uart_txx9_port *up = to_uart_txx9_port(port);
803 serial_txx9_release_resource(up);
804 }
805
serial_txx9_request_port(struct uart_port * port)806 static int serial_txx9_request_port(struct uart_port *port)
807 {
808 struct uart_txx9_port *up = to_uart_txx9_port(port);
809 return serial_txx9_request_resource(up);
810 }
811
serial_txx9_config_port(struct uart_port * port,int uflags)812 static void serial_txx9_config_port(struct uart_port *port, int uflags)
813 {
814 struct uart_txx9_port *up = to_uart_txx9_port(port);
815 int ret;
816
817 /*
818 * Find the region that we can probe for. This in turn
819 * tells us whether we can probe for the type of port.
820 */
821 ret = serial_txx9_request_resource(up);
822 if (ret < 0)
823 return;
824 port->type = PORT_TXX9;
825 up->port.fifosize = TXX9_SIO_TX_FIFO;
826
827 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
828 if (up->port.line == up->port.cons->index)
829 return;
830 #endif
831 serial_txx9_initialize(port);
832 }
833
834 static const char *
serial_txx9_type(struct uart_port * port)835 serial_txx9_type(struct uart_port *port)
836 {
837 return "txx9";
838 }
839
840 static const struct uart_ops serial_txx9_pops = {
841 .tx_empty = serial_txx9_tx_empty,
842 .set_mctrl = serial_txx9_set_mctrl,
843 .get_mctrl = serial_txx9_get_mctrl,
844 .stop_tx = serial_txx9_stop_tx,
845 .start_tx = serial_txx9_start_tx,
846 .stop_rx = serial_txx9_stop_rx,
847 .break_ctl = serial_txx9_break_ctl,
848 .startup = serial_txx9_startup,
849 .shutdown = serial_txx9_shutdown,
850 .set_termios = serial_txx9_set_termios,
851 .pm = serial_txx9_pm,
852 .type = serial_txx9_type,
853 .release_port = serial_txx9_release_port,
854 .request_port = serial_txx9_request_port,
855 .config_port = serial_txx9_config_port,
856 #ifdef CONFIG_CONSOLE_POLL
857 .poll_get_char = serial_txx9_get_poll_char,
858 .poll_put_char = serial_txx9_put_poll_char,
859 #endif
860 };
861
862 static struct uart_txx9_port serial_txx9_ports[UART_NR];
863
serial_txx9_register_ports(struct uart_driver * drv,struct device * dev)864 static void __init serial_txx9_register_ports(struct uart_driver *drv,
865 struct device *dev)
866 {
867 int i;
868
869 for (i = 0; i < UART_NR; i++) {
870 struct uart_txx9_port *up = &serial_txx9_ports[i];
871
872 up->port.line = i;
873 up->port.ops = &serial_txx9_pops;
874 up->port.dev = dev;
875 if (up->port.iobase || up->port.mapbase)
876 uart_add_one_port(drv, &up->port);
877 }
878 }
879
880 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
881
serial_txx9_console_putchar(struct uart_port * port,int ch)882 static void serial_txx9_console_putchar(struct uart_port *port, int ch)
883 {
884 struct uart_txx9_port *up = to_uart_txx9_port(port);
885
886 wait_for_xmitr(up);
887 sio_out(up, TXX9_SITFIFO, ch);
888 }
889
890 /*
891 * Print a string to the serial port trying not to disturb
892 * any possible real use of the port...
893 *
894 * The console_lock must be held when we get here.
895 */
896 static void
serial_txx9_console_write(struct console * co,const char * s,unsigned int count)897 serial_txx9_console_write(struct console *co, const char *s, unsigned int count)
898 {
899 struct uart_txx9_port *up = &serial_txx9_ports[co->index];
900 unsigned int ier, flcr;
901
902 /*
903 * First save the UER then disable the interrupts
904 */
905 ier = sio_in(up, TXX9_SIDICR);
906 sio_out(up, TXX9_SIDICR, 0);
907 /*
908 * Disable flow-control if enabled (and unnecessary)
909 */
910 flcr = sio_in(up, TXX9_SIFLCR);
911 if (!(up->port.flags & UPF_CONS_FLOW) && (flcr & TXX9_SIFLCR_TES))
912 sio_out(up, TXX9_SIFLCR, flcr & ~TXX9_SIFLCR_TES);
913
914 uart_console_write(&up->port, s, count, serial_txx9_console_putchar);
915
916 /*
917 * Finally, wait for transmitter to become empty
918 * and restore the IER
919 */
920 wait_for_xmitr(up);
921 sio_out(up, TXX9_SIFLCR, flcr);
922 sio_out(up, TXX9_SIDICR, ier);
923 }
924
serial_txx9_console_setup(struct console * co,char * options)925 static int __init serial_txx9_console_setup(struct console *co, char *options)
926 {
927 struct uart_port *port;
928 struct uart_txx9_port *up;
929 int baud = 9600;
930 int bits = 8;
931 int parity = 'n';
932 int flow = 'n';
933
934 /*
935 * Check whether an invalid uart number has been specified, and
936 * if so, search for the first available port that does have
937 * console support.
938 */
939 if (co->index >= UART_NR)
940 co->index = 0;
941 up = &serial_txx9_ports[co->index];
942 port = &up->port;
943 if (!port->ops)
944 return -ENODEV;
945
946 serial_txx9_initialize(&up->port);
947
948 if (options)
949 uart_parse_options(options, &baud, &parity, &bits, &flow);
950
951 return uart_set_options(port, co, baud, parity, bits, flow);
952 }
953
954 static struct uart_driver serial_txx9_reg;
955 static struct console serial_txx9_console = {
956 .name = TXX9_TTY_NAME,
957 .write = serial_txx9_console_write,
958 .device = uart_console_device,
959 .setup = serial_txx9_console_setup,
960 .flags = CON_PRINTBUFFER,
961 .index = -1,
962 .data = &serial_txx9_reg,
963 };
964
serial_txx9_console_init(void)965 static int __init serial_txx9_console_init(void)
966 {
967 register_console(&serial_txx9_console);
968 return 0;
969 }
970 console_initcall(serial_txx9_console_init);
971
972 #define SERIAL_TXX9_CONSOLE &serial_txx9_console
973 #else
974 #define SERIAL_TXX9_CONSOLE NULL
975 #endif
976
977 static struct uart_driver serial_txx9_reg = {
978 .owner = THIS_MODULE,
979 .driver_name = "serial_txx9",
980 .dev_name = TXX9_TTY_NAME,
981 .major = TXX9_TTY_MAJOR,
982 .minor = TXX9_TTY_MINOR_START,
983 .nr = UART_NR,
984 .cons = SERIAL_TXX9_CONSOLE,
985 };
986
early_serial_txx9_setup(struct uart_port * port)987 int __init early_serial_txx9_setup(struct uart_port *port)
988 {
989 if (port->line >= ARRAY_SIZE(serial_txx9_ports))
990 return -ENODEV;
991
992 serial_txx9_ports[port->line].port = *port;
993 serial_txx9_ports[port->line].port.ops = &serial_txx9_pops;
994 serial_txx9_ports[port->line].port.flags |=
995 UPF_BOOT_AUTOCONF | UPF_FIXED_PORT;
996 return 0;
997 }
998
999 static DEFINE_MUTEX(serial_txx9_mutex);
1000
1001 /**
1002 * serial_txx9_register_port - register a serial port
1003 * @port: serial port template
1004 *
1005 * Configure the serial port specified by the request.
1006 *
1007 * The port is then probed and if necessary the IRQ is autodetected
1008 * If this fails an error is returned.
1009 *
1010 * On success the port is ready to use and the line number is returned.
1011 */
serial_txx9_register_port(struct uart_port * port)1012 static int serial_txx9_register_port(struct uart_port *port)
1013 {
1014 int i;
1015 struct uart_txx9_port *uart;
1016 int ret = -ENOSPC;
1017
1018 mutex_lock(&serial_txx9_mutex);
1019 for (i = 0; i < UART_NR; i++) {
1020 uart = &serial_txx9_ports[i];
1021 if (uart_match_port(&uart->port, port)) {
1022 uart_remove_one_port(&serial_txx9_reg, &uart->port);
1023 break;
1024 }
1025 }
1026 if (i == UART_NR) {
1027 /* Find unused port */
1028 for (i = 0; i < UART_NR; i++) {
1029 uart = &serial_txx9_ports[i];
1030 if (!(uart->port.iobase || uart->port.mapbase))
1031 break;
1032 }
1033 }
1034 if (i < UART_NR) {
1035 uart->port.iobase = port->iobase;
1036 uart->port.membase = port->membase;
1037 uart->port.irq = port->irq;
1038 uart->port.uartclk = port->uartclk;
1039 uart->port.iotype = port->iotype;
1040 uart->port.flags = port->flags
1041 | UPF_BOOT_AUTOCONF | UPF_FIXED_PORT;
1042 uart->port.mapbase = port->mapbase;
1043 if (port->dev)
1044 uart->port.dev = port->dev;
1045 ret = uart_add_one_port(&serial_txx9_reg, &uart->port);
1046 if (ret == 0)
1047 ret = uart->port.line;
1048 }
1049 mutex_unlock(&serial_txx9_mutex);
1050 return ret;
1051 }
1052
1053 /**
1054 * serial_txx9_unregister_port - remove a txx9 serial port at runtime
1055 * @line: serial line number
1056 *
1057 * Remove one serial port. This may not be called from interrupt
1058 * context. We hand the port back to the our control.
1059 */
serial_txx9_unregister_port(int line)1060 static void serial_txx9_unregister_port(int line)
1061 {
1062 struct uart_txx9_port *uart = &serial_txx9_ports[line];
1063
1064 mutex_lock(&serial_txx9_mutex);
1065 uart_remove_one_port(&serial_txx9_reg, &uart->port);
1066 uart->port.flags = 0;
1067 uart->port.type = PORT_UNKNOWN;
1068 uart->port.iobase = 0;
1069 uart->port.mapbase = 0;
1070 uart->port.membase = NULL;
1071 uart->port.dev = NULL;
1072 mutex_unlock(&serial_txx9_mutex);
1073 }
1074
1075 /*
1076 * Register a set of serial devices attached to a platform device.
1077 */
serial_txx9_probe(struct platform_device * dev)1078 static int serial_txx9_probe(struct platform_device *dev)
1079 {
1080 struct uart_port *p = dev_get_platdata(&dev->dev);
1081 struct uart_port port;
1082 int ret, i;
1083
1084 memset(&port, 0, sizeof(struct uart_port));
1085 for (i = 0; p && p->uartclk != 0; p++, i++) {
1086 port.iobase = p->iobase;
1087 port.membase = p->membase;
1088 port.irq = p->irq;
1089 port.uartclk = p->uartclk;
1090 port.iotype = p->iotype;
1091 port.flags = p->flags;
1092 port.mapbase = p->mapbase;
1093 port.dev = &dev->dev;
1094 port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_TXX9_CONSOLE);
1095 ret = serial_txx9_register_port(&port);
1096 if (ret < 0) {
1097 dev_err(&dev->dev, "unable to register port at index %d "
1098 "(IO%lx MEM%llx IRQ%d): %d\n", i,
1099 p->iobase, (unsigned long long)p->mapbase,
1100 p->irq, ret);
1101 }
1102 }
1103 return 0;
1104 }
1105
1106 /*
1107 * Remove serial ports registered against a platform device.
1108 */
serial_txx9_remove(struct platform_device * dev)1109 static int serial_txx9_remove(struct platform_device *dev)
1110 {
1111 int i;
1112
1113 for (i = 0; i < UART_NR; i++) {
1114 struct uart_txx9_port *up = &serial_txx9_ports[i];
1115
1116 if (up->port.dev == &dev->dev)
1117 serial_txx9_unregister_port(i);
1118 }
1119 return 0;
1120 }
1121
1122 #ifdef CONFIG_PM
serial_txx9_suspend(struct platform_device * dev,pm_message_t state)1123 static int serial_txx9_suspend(struct platform_device *dev, pm_message_t state)
1124 {
1125 int i;
1126
1127 for (i = 0; i < UART_NR; i++) {
1128 struct uart_txx9_port *up = &serial_txx9_ports[i];
1129
1130 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
1131 uart_suspend_port(&serial_txx9_reg, &up->port);
1132 }
1133
1134 return 0;
1135 }
1136
serial_txx9_resume(struct platform_device * dev)1137 static int serial_txx9_resume(struct platform_device *dev)
1138 {
1139 int i;
1140
1141 for (i = 0; i < UART_NR; i++) {
1142 struct uart_txx9_port *up = &serial_txx9_ports[i];
1143
1144 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
1145 uart_resume_port(&serial_txx9_reg, &up->port);
1146 }
1147
1148 return 0;
1149 }
1150 #endif
1151
1152 static struct platform_driver serial_txx9_plat_driver = {
1153 .probe = serial_txx9_probe,
1154 .remove = serial_txx9_remove,
1155 #ifdef CONFIG_PM
1156 .suspend = serial_txx9_suspend,
1157 .resume = serial_txx9_resume,
1158 #endif
1159 .driver = {
1160 .name = "serial_txx9",
1161 },
1162 };
1163
1164 #ifdef ENABLE_SERIAL_TXX9_PCI
1165 /*
1166 * Probe one serial board. Unfortunately, there is no rhyme nor reason
1167 * to the arrangement of serial ports on a PCI card.
1168 */
1169 static int
pciserial_txx9_init_one(struct pci_dev * dev,const struct pci_device_id * ent)1170 pciserial_txx9_init_one(struct pci_dev *dev, const struct pci_device_id *ent)
1171 {
1172 struct uart_port port;
1173 int line;
1174 int rc;
1175
1176 rc = pci_enable_device(dev);
1177 if (rc)
1178 return rc;
1179
1180 memset(&port, 0, sizeof(port));
1181 port.ops = &serial_txx9_pops;
1182 port.flags |= UPF_TXX9_HAVE_CTS_LINE;
1183 port.uartclk = 66670000;
1184 port.irq = dev->irq;
1185 port.iotype = UPIO_PORT;
1186 port.iobase = pci_resource_start(dev, 1);
1187 port.dev = &dev->dev;
1188 line = serial_txx9_register_port(&port);
1189 if (line < 0) {
1190 printk(KERN_WARNING "Couldn't register serial port %s: %d\n", pci_name(dev), line);
1191 pci_disable_device(dev);
1192 return line;
1193 }
1194 pci_set_drvdata(dev, &serial_txx9_ports[line]);
1195
1196 return 0;
1197 }
1198
pciserial_txx9_remove_one(struct pci_dev * dev)1199 static void pciserial_txx9_remove_one(struct pci_dev *dev)
1200 {
1201 struct uart_txx9_port *up = pci_get_drvdata(dev);
1202
1203 if (up) {
1204 serial_txx9_unregister_port(up->port.line);
1205 pci_disable_device(dev);
1206 }
1207 }
1208
1209 #ifdef CONFIG_PM
pciserial_txx9_suspend_one(struct pci_dev * dev,pm_message_t state)1210 static int pciserial_txx9_suspend_one(struct pci_dev *dev, pm_message_t state)
1211 {
1212 struct uart_txx9_port *up = pci_get_drvdata(dev);
1213
1214 if (up)
1215 uart_suspend_port(&serial_txx9_reg, &up->port);
1216 pci_save_state(dev);
1217 pci_set_power_state(dev, pci_choose_state(dev, state));
1218 return 0;
1219 }
1220
pciserial_txx9_resume_one(struct pci_dev * dev)1221 static int pciserial_txx9_resume_one(struct pci_dev *dev)
1222 {
1223 struct uart_txx9_port *up = pci_get_drvdata(dev);
1224
1225 pci_set_power_state(dev, PCI_D0);
1226 pci_restore_state(dev);
1227 if (up)
1228 uart_resume_port(&serial_txx9_reg, &up->port);
1229 return 0;
1230 }
1231 #endif
1232
1233 static const struct pci_device_id serial_txx9_pci_tbl[] = {
1234 { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC86C001_MISC) },
1235 { 0, }
1236 };
1237
1238 static struct pci_driver serial_txx9_pci_driver = {
1239 .name = "serial_txx9",
1240 .probe = pciserial_txx9_init_one,
1241 .remove = pciserial_txx9_remove_one,
1242 #ifdef CONFIG_PM
1243 .suspend = pciserial_txx9_suspend_one,
1244 .resume = pciserial_txx9_resume_one,
1245 #endif
1246 .id_table = serial_txx9_pci_tbl,
1247 };
1248
1249 MODULE_DEVICE_TABLE(pci, serial_txx9_pci_tbl);
1250 #endif /* ENABLE_SERIAL_TXX9_PCI */
1251
1252 static struct platform_device *serial_txx9_plat_devs;
1253
serial_txx9_init(void)1254 static int __init serial_txx9_init(void)
1255 {
1256 int ret;
1257
1258 printk(KERN_INFO "%s version %s\n", serial_name, serial_version);
1259
1260 ret = uart_register_driver(&serial_txx9_reg);
1261 if (ret)
1262 goto out;
1263
1264 serial_txx9_plat_devs = platform_device_alloc("serial_txx9", -1);
1265 if (!serial_txx9_plat_devs) {
1266 ret = -ENOMEM;
1267 goto unreg_uart_drv;
1268 }
1269
1270 ret = platform_device_add(serial_txx9_plat_devs);
1271 if (ret)
1272 goto put_dev;
1273
1274 serial_txx9_register_ports(&serial_txx9_reg,
1275 &serial_txx9_plat_devs->dev);
1276
1277 ret = platform_driver_register(&serial_txx9_plat_driver);
1278 if (ret)
1279 goto del_dev;
1280
1281 #ifdef ENABLE_SERIAL_TXX9_PCI
1282 ret = pci_register_driver(&serial_txx9_pci_driver);
1283 if (ret) {
1284 platform_driver_unregister(&serial_txx9_plat_driver);
1285 }
1286 #endif
1287 if (ret == 0)
1288 goto out;
1289
1290 del_dev:
1291 platform_device_del(serial_txx9_plat_devs);
1292 put_dev:
1293 platform_device_put(serial_txx9_plat_devs);
1294 unreg_uart_drv:
1295 uart_unregister_driver(&serial_txx9_reg);
1296 out:
1297 return ret;
1298 }
1299
serial_txx9_exit(void)1300 static void __exit serial_txx9_exit(void)
1301 {
1302 int i;
1303
1304 #ifdef ENABLE_SERIAL_TXX9_PCI
1305 pci_unregister_driver(&serial_txx9_pci_driver);
1306 #endif
1307 platform_driver_unregister(&serial_txx9_plat_driver);
1308 platform_device_unregister(serial_txx9_plat_devs);
1309 for (i = 0; i < UART_NR; i++) {
1310 struct uart_txx9_port *up = &serial_txx9_ports[i];
1311 if (up->port.iobase || up->port.mapbase)
1312 uart_remove_one_port(&serial_txx9_reg, &up->port);
1313 }
1314
1315 uart_unregister_driver(&serial_txx9_reg);
1316 }
1317
1318 module_init(serial_txx9_init);
1319 module_exit(serial_txx9_exit);
1320
1321 MODULE_LICENSE("GPL");
1322 MODULE_DESCRIPTION("TX39/49 serial driver");
1323
1324 MODULE_ALIAS_CHARDEV_MAJOR(TXX9_TTY_MAJOR);
1325