1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (C) 2019 MediaTek Inc.
4 *
5 * Author:
6 * Min Guo <min.guo@mediatek.com>
7 * Yonglong Wu <yonglong.wu@mediatek.com>
8 */
9
10 #include <linux/clk.h>
11 #include <linux/dma-mapping.h>
12 #include <linux/module.h>
13 #include <linux/of_platform.h>
14 #include <linux/platform_device.h>
15 #include <linux/usb/role.h>
16 #include <linux/usb/usb_phy_generic.h>
17 #include "musb_core.h"
18 #include "musb_dma.h"
19
20 #define USB_L1INTS 0x00a0
21 #define USB_L1INTM 0x00a4
22 #define MTK_MUSB_TXFUNCADDR 0x0480
23
24 /* MediaTek controller toggle enable and status reg */
25 #define MUSB_RXTOG 0x80
26 #define MUSB_RXTOGEN 0x82
27 #define MUSB_TXTOG 0x84
28 #define MUSB_TXTOGEN 0x86
29 #define MTK_TOGGLE_EN GENMASK(15, 0)
30
31 #define TX_INT_STATUS BIT(0)
32 #define RX_INT_STATUS BIT(1)
33 #define USBCOM_INT_STATUS BIT(2)
34 #define DMA_INT_STATUS BIT(3)
35
36 #define DMA_INTR_STATUS_MSK GENMASK(7, 0)
37 #define DMA_INTR_UNMASK_SET_MSK GENMASK(31, 24)
38
39 struct mtk_glue {
40 struct device *dev;
41 struct musb *musb;
42 struct platform_device *musb_pdev;
43 struct platform_device *usb_phy;
44 struct phy *phy;
45 struct usb_phy *xceiv;
46 enum phy_mode phy_mode;
47 struct clk *main;
48 struct clk *mcu;
49 struct clk *univpll;
50 enum usb_role role;
51 struct usb_role_switch *role_sw;
52 };
53
mtk_musb_clks_get(struct mtk_glue * glue)54 static int mtk_musb_clks_get(struct mtk_glue *glue)
55 {
56 struct device *dev = glue->dev;
57
58 glue->main = devm_clk_get(dev, "main");
59 if (IS_ERR(glue->main)) {
60 dev_err(dev, "fail to get main clock\n");
61 return PTR_ERR(glue->main);
62 }
63
64 glue->mcu = devm_clk_get(dev, "mcu");
65 if (IS_ERR(glue->mcu)) {
66 dev_err(dev, "fail to get mcu clock\n");
67 return PTR_ERR(glue->mcu);
68 }
69
70 glue->univpll = devm_clk_get(dev, "univpll");
71 if (IS_ERR(glue->univpll)) {
72 dev_err(dev, "fail to get univpll clock\n");
73 return PTR_ERR(glue->univpll);
74 }
75
76 return 0;
77 }
78
mtk_musb_clks_enable(struct mtk_glue * glue)79 static int mtk_musb_clks_enable(struct mtk_glue *glue)
80 {
81 int ret;
82
83 ret = clk_prepare_enable(glue->main);
84 if (ret) {
85 dev_err(glue->dev, "failed to enable main clock\n");
86 goto err_main_clk;
87 }
88
89 ret = clk_prepare_enable(glue->mcu);
90 if (ret) {
91 dev_err(glue->dev, "failed to enable mcu clock\n");
92 goto err_mcu_clk;
93 }
94
95 ret = clk_prepare_enable(glue->univpll);
96 if (ret) {
97 dev_err(glue->dev, "failed to enable univpll clock\n");
98 goto err_univpll_clk;
99 }
100
101 return 0;
102
103 err_univpll_clk:
104 clk_disable_unprepare(glue->mcu);
105 err_mcu_clk:
106 clk_disable_unprepare(glue->main);
107 err_main_clk:
108 return ret;
109 }
110
mtk_musb_clks_disable(struct mtk_glue * glue)111 static void mtk_musb_clks_disable(struct mtk_glue *glue)
112 {
113 clk_disable_unprepare(glue->univpll);
114 clk_disable_unprepare(glue->mcu);
115 clk_disable_unprepare(glue->main);
116 }
117
mtk_otg_switch_set(struct mtk_glue * glue,enum usb_role role)118 static int mtk_otg_switch_set(struct mtk_glue *glue, enum usb_role role)
119 {
120 struct musb *musb = glue->musb;
121 u8 devctl = readb(musb->mregs + MUSB_DEVCTL);
122 enum usb_role new_role;
123
124 if (role == glue->role)
125 return 0;
126
127 switch (role) {
128 case USB_ROLE_HOST:
129 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
130 glue->phy_mode = PHY_MODE_USB_HOST;
131 new_role = USB_ROLE_HOST;
132 if (glue->role == USB_ROLE_NONE)
133 phy_power_on(glue->phy);
134
135 devctl |= MUSB_DEVCTL_SESSION;
136 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
137 MUSB_HST_MODE(musb);
138 break;
139 case USB_ROLE_DEVICE:
140 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
141 glue->phy_mode = PHY_MODE_USB_DEVICE;
142 new_role = USB_ROLE_DEVICE;
143 devctl &= ~MUSB_DEVCTL_SESSION;
144 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
145 if (glue->role == USB_ROLE_NONE)
146 phy_power_on(glue->phy);
147
148 MUSB_DEV_MODE(musb);
149 break;
150 case USB_ROLE_NONE:
151 glue->phy_mode = PHY_MODE_USB_OTG;
152 new_role = USB_ROLE_NONE;
153 devctl &= ~MUSB_DEVCTL_SESSION;
154 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
155 if (glue->role != USB_ROLE_NONE)
156 phy_power_off(glue->phy);
157
158 break;
159 default:
160 dev_err(glue->dev, "Invalid State\n");
161 return -EINVAL;
162 }
163
164 glue->role = new_role;
165 phy_set_mode(glue->phy, glue->phy_mode);
166
167 return 0;
168 }
169
musb_usb_role_sx_set(struct usb_role_switch * sw,enum usb_role role)170 static int musb_usb_role_sx_set(struct usb_role_switch *sw, enum usb_role role)
171 {
172 return mtk_otg_switch_set(usb_role_switch_get_drvdata(sw), role);
173 }
174
musb_usb_role_sx_get(struct usb_role_switch * sw)175 static enum usb_role musb_usb_role_sx_get(struct usb_role_switch *sw)
176 {
177 struct mtk_glue *glue = usb_role_switch_get_drvdata(sw);
178
179 return glue->role;
180 }
181
mtk_otg_switch_init(struct mtk_glue * glue)182 static int mtk_otg_switch_init(struct mtk_glue *glue)
183 {
184 struct usb_role_switch_desc role_sx_desc = { 0 };
185
186 role_sx_desc.set = musb_usb_role_sx_set;
187 role_sx_desc.get = musb_usb_role_sx_get;
188 role_sx_desc.allow_userspace_control = true;
189 role_sx_desc.fwnode = dev_fwnode(glue->dev);
190 role_sx_desc.driver_data = glue;
191 glue->role_sw = usb_role_switch_register(glue->dev, &role_sx_desc);
192
193 return PTR_ERR_OR_ZERO(glue->role_sw);
194 }
195
mtk_otg_switch_exit(struct mtk_glue * glue)196 static void mtk_otg_switch_exit(struct mtk_glue *glue)
197 {
198 return usb_role_switch_unregister(glue->role_sw);
199 }
200
generic_interrupt(int irq,void * __hci)201 static irqreturn_t generic_interrupt(int irq, void *__hci)
202 {
203 unsigned long flags;
204 irqreturn_t retval = IRQ_NONE;
205 struct musb *musb = __hci;
206
207 spin_lock_irqsave(&musb->lock, flags);
208 musb->int_usb = musb_clearb(musb->mregs, MUSB_INTRUSB);
209 musb->int_rx = musb_clearw(musb->mregs, MUSB_INTRRX);
210 musb->int_tx = musb_clearw(musb->mregs, MUSB_INTRTX);
211
212 if ((musb->int_usb & MUSB_INTR_RESET) && !is_host_active(musb)) {
213 /* ep0 FADDR must be 0 when (re)entering peripheral mode */
214 musb_ep_select(musb->mregs, 0);
215 musb_writeb(musb->mregs, MUSB_FADDR, 0);
216 }
217
218 if (musb->int_usb || musb->int_tx || musb->int_rx)
219 retval = musb_interrupt(musb);
220
221 spin_unlock_irqrestore(&musb->lock, flags);
222
223 return retval;
224 }
225
mtk_musb_interrupt(int irq,void * dev_id)226 static irqreturn_t mtk_musb_interrupt(int irq, void *dev_id)
227 {
228 irqreturn_t retval = IRQ_NONE;
229 struct musb *musb = (struct musb *)dev_id;
230 u32 l1_ints;
231
232 l1_ints = musb_readl(musb->mregs, USB_L1INTS) &
233 musb_readl(musb->mregs, USB_L1INTM);
234
235 if (l1_ints & (TX_INT_STATUS | RX_INT_STATUS | USBCOM_INT_STATUS))
236 retval = generic_interrupt(irq, musb);
237
238 #if defined(CONFIG_USB_INVENTRA_DMA)
239 if (l1_ints & DMA_INT_STATUS)
240 retval = dma_controller_irq(irq, musb->dma_controller);
241 #endif
242 return retval;
243 }
244
mtk_musb_busctl_offset(u8 epnum,u16 offset)245 static u32 mtk_musb_busctl_offset(u8 epnum, u16 offset)
246 {
247 return MTK_MUSB_TXFUNCADDR + offset + 8 * epnum;
248 }
249
mtk_musb_clearb(void __iomem * addr,unsigned int offset)250 static u8 mtk_musb_clearb(void __iomem *addr, unsigned int offset)
251 {
252 u8 data;
253
254 /* W1C */
255 data = musb_readb(addr, offset);
256 musb_writeb(addr, offset, data);
257 return data;
258 }
259
mtk_musb_clearw(void __iomem * addr,unsigned int offset)260 static u16 mtk_musb_clearw(void __iomem *addr, unsigned int offset)
261 {
262 u16 data;
263
264 /* W1C */
265 data = musb_readw(addr, offset);
266 musb_writew(addr, offset, data);
267 return data;
268 }
269
mtk_musb_set_mode(struct musb * musb,u8 mode)270 static int mtk_musb_set_mode(struct musb *musb, u8 mode)
271 {
272 struct device *dev = musb->controller;
273 struct mtk_glue *glue = dev_get_drvdata(dev->parent);
274 enum phy_mode new_mode;
275 enum usb_role new_role;
276
277 switch (mode) {
278 case MUSB_HOST:
279 new_mode = PHY_MODE_USB_HOST;
280 new_role = USB_ROLE_HOST;
281 break;
282 case MUSB_PERIPHERAL:
283 new_mode = PHY_MODE_USB_DEVICE;
284 new_role = USB_ROLE_DEVICE;
285 break;
286 case MUSB_OTG:
287 new_mode = PHY_MODE_USB_OTG;
288 new_role = USB_ROLE_NONE;
289 break;
290 default:
291 dev_err(glue->dev, "Invalid mode request\n");
292 return -EINVAL;
293 }
294
295 if (glue->phy_mode == new_mode)
296 return 0;
297
298 if (musb->port_mode != MUSB_OTG) {
299 dev_err(glue->dev, "Does not support changing modes\n");
300 return -EINVAL;
301 }
302
303 mtk_otg_switch_set(glue, new_role);
304 return 0;
305 }
306
mtk_musb_init(struct musb * musb)307 static int mtk_musb_init(struct musb *musb)
308 {
309 struct device *dev = musb->controller;
310 struct mtk_glue *glue = dev_get_drvdata(dev->parent);
311 int ret;
312
313 glue->musb = musb;
314 musb->phy = glue->phy;
315 musb->xceiv = glue->xceiv;
316 musb->is_host = false;
317 musb->isr = mtk_musb_interrupt;
318
319 /* Set TX/RX toggle enable */
320 musb_writew(musb->mregs, MUSB_TXTOGEN, MTK_TOGGLE_EN);
321 musb_writew(musb->mregs, MUSB_RXTOGEN, MTK_TOGGLE_EN);
322
323 if (musb->port_mode == MUSB_OTG) {
324 ret = mtk_otg_switch_init(glue);
325 if (ret)
326 return ret;
327 }
328
329 ret = phy_init(glue->phy);
330 if (ret)
331 goto err_phy_init;
332
333 ret = phy_power_on(glue->phy);
334 if (ret)
335 goto err_phy_power_on;
336
337 phy_set_mode(glue->phy, glue->phy_mode);
338
339 #if defined(CONFIG_USB_INVENTRA_DMA)
340 musb_writel(musb->mregs, MUSB_HSDMA_INTR,
341 DMA_INTR_STATUS_MSK | DMA_INTR_UNMASK_SET_MSK);
342 #endif
343 musb_writel(musb->mregs, USB_L1INTM, TX_INT_STATUS | RX_INT_STATUS |
344 USBCOM_INT_STATUS | DMA_INT_STATUS);
345 return 0;
346
347 err_phy_power_on:
348 phy_exit(glue->phy);
349 err_phy_init:
350 mtk_otg_switch_exit(glue);
351 return ret;
352 }
353
mtk_musb_get_toggle(struct musb_qh * qh,int is_out)354 static u16 mtk_musb_get_toggle(struct musb_qh *qh, int is_out)
355 {
356 struct musb *musb = qh->hw_ep->musb;
357 u8 epnum = qh->hw_ep->epnum;
358 u16 toggle;
359
360 toggle = musb_readw(musb->mregs, is_out ? MUSB_TXTOG : MUSB_RXTOG);
361 return toggle & (1 << epnum);
362 }
363
mtk_musb_set_toggle(struct musb_qh * qh,int is_out,struct urb * urb)364 static u16 mtk_musb_set_toggle(struct musb_qh *qh, int is_out, struct urb *urb)
365 {
366 struct musb *musb = qh->hw_ep->musb;
367 u8 epnum = qh->hw_ep->epnum;
368 u16 value, toggle;
369
370 toggle = usb_gettoggle(urb->dev, qh->epnum, is_out);
371
372 if (is_out) {
373 value = musb_readw(musb->mregs, MUSB_TXTOG);
374 value |= toggle << epnum;
375 musb_writew(musb->mregs, MUSB_TXTOG, value);
376 } else {
377 value = musb_readw(musb->mregs, MUSB_RXTOG);
378 value |= toggle << epnum;
379 musb_writew(musb->mregs, MUSB_RXTOG, value);
380 }
381
382 return 0;
383 }
384
mtk_musb_exit(struct musb * musb)385 static int mtk_musb_exit(struct musb *musb)
386 {
387 struct device *dev = musb->controller;
388 struct mtk_glue *glue = dev_get_drvdata(dev->parent);
389
390 mtk_otg_switch_exit(glue);
391 phy_power_off(glue->phy);
392 phy_exit(glue->phy);
393 mtk_musb_clks_disable(glue);
394
395 pm_runtime_put_sync(dev);
396 pm_runtime_disable(dev);
397 return 0;
398 }
399
400 static const struct musb_platform_ops mtk_musb_ops = {
401 .quirks = MUSB_DMA_INVENTRA,
402 .init = mtk_musb_init,
403 .get_toggle = mtk_musb_get_toggle,
404 .set_toggle = mtk_musb_set_toggle,
405 .exit = mtk_musb_exit,
406 #ifdef CONFIG_USB_INVENTRA_DMA
407 .dma_init = musbhs_dma_controller_create_noirq,
408 .dma_exit = musbhs_dma_controller_destroy,
409 #endif
410 .clearb = mtk_musb_clearb,
411 .clearw = mtk_musb_clearw,
412 .busctl_offset = mtk_musb_busctl_offset,
413 .set_mode = mtk_musb_set_mode,
414 };
415
416 #define MTK_MUSB_MAX_EP_NUM 8
417 #define MTK_MUSB_RAM_BITS 11
418
419 static struct musb_fifo_cfg mtk_musb_mode_cfg[] = {
420 { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, },
421 { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, },
422 { .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 512, },
423 { .hw_ep_num = 2, .style = FIFO_RX, .maxpacket = 512, },
424 { .hw_ep_num = 3, .style = FIFO_TX, .maxpacket = 512, },
425 { .hw_ep_num = 3, .style = FIFO_RX, .maxpacket = 512, },
426 { .hw_ep_num = 4, .style = FIFO_TX, .maxpacket = 512, },
427 { .hw_ep_num = 4, .style = FIFO_RX, .maxpacket = 512, },
428 { .hw_ep_num = 5, .style = FIFO_TX, .maxpacket = 512, },
429 { .hw_ep_num = 5, .style = FIFO_RX, .maxpacket = 512, },
430 { .hw_ep_num = 6, .style = FIFO_TX, .maxpacket = 1024, },
431 { .hw_ep_num = 6, .style = FIFO_RX, .maxpacket = 1024, },
432 { .hw_ep_num = 7, .style = FIFO_TX, .maxpacket = 512, },
433 { .hw_ep_num = 7, .style = FIFO_RX, .maxpacket = 64, },
434 };
435
436 static const struct musb_hdrc_config mtk_musb_hdrc_config = {
437 .fifo_cfg = mtk_musb_mode_cfg,
438 .fifo_cfg_size = ARRAY_SIZE(mtk_musb_mode_cfg),
439 .multipoint = true,
440 .dyn_fifo = true,
441 .num_eps = MTK_MUSB_MAX_EP_NUM,
442 .ram_bits = MTK_MUSB_RAM_BITS,
443 };
444
445 static const struct platform_device_info mtk_dev_info = {
446 .name = "musb-hdrc",
447 .id = PLATFORM_DEVID_AUTO,
448 .dma_mask = DMA_BIT_MASK(32),
449 };
450
mtk_musb_probe(struct platform_device * pdev)451 static int mtk_musb_probe(struct platform_device *pdev)
452 {
453 struct musb_hdrc_platform_data *pdata;
454 struct mtk_glue *glue;
455 struct platform_device_info pinfo;
456 struct device *dev = &pdev->dev;
457 struct device_node *np = dev->of_node;
458 int ret;
459
460 glue = devm_kzalloc(dev, sizeof(*glue), GFP_KERNEL);
461 if (!glue)
462 return -ENOMEM;
463
464 glue->dev = dev;
465 pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
466 if (!pdata)
467 return -ENOMEM;
468
469 ret = of_platform_populate(np, NULL, NULL, dev);
470 if (ret) {
471 dev_err(dev, "failed to create child devices at %p\n", np);
472 return ret;
473 }
474
475 ret = mtk_musb_clks_get(glue);
476 if (ret)
477 return ret;
478
479 pdata->config = &mtk_musb_hdrc_config;
480 pdata->platform_ops = &mtk_musb_ops;
481 pdata->mode = usb_get_dr_mode(dev);
482
483 if (IS_ENABLED(CONFIG_USB_MUSB_HOST))
484 pdata->mode = USB_DR_MODE_HOST;
485 else if (IS_ENABLED(CONFIG_USB_MUSB_GADGET))
486 pdata->mode = USB_DR_MODE_PERIPHERAL;
487
488 switch (pdata->mode) {
489 case USB_DR_MODE_HOST:
490 glue->phy_mode = PHY_MODE_USB_HOST;
491 glue->role = USB_ROLE_HOST;
492 break;
493 case USB_DR_MODE_PERIPHERAL:
494 glue->phy_mode = PHY_MODE_USB_DEVICE;
495 glue->role = USB_ROLE_DEVICE;
496 break;
497 case USB_DR_MODE_OTG:
498 glue->phy_mode = PHY_MODE_USB_OTG;
499 glue->role = USB_ROLE_NONE;
500 break;
501 default:
502 dev_err(&pdev->dev, "Error 'dr_mode' property\n");
503 return -EINVAL;
504 }
505
506 glue->phy = devm_of_phy_get_by_index(dev, np, 0);
507 if (IS_ERR(glue->phy)) {
508 dev_err(dev, "fail to getting phy %ld\n",
509 PTR_ERR(glue->phy));
510 return PTR_ERR(glue->phy);
511 }
512
513 glue->usb_phy = usb_phy_generic_register();
514 if (IS_ERR(glue->usb_phy)) {
515 dev_err(dev, "fail to registering usb-phy %ld\n",
516 PTR_ERR(glue->usb_phy));
517 return PTR_ERR(glue->usb_phy);
518 }
519
520 glue->xceiv = devm_usb_get_phy(dev, USB_PHY_TYPE_USB2);
521 if (IS_ERR(glue->xceiv)) {
522 ret = PTR_ERR(glue->xceiv);
523 dev_err(dev, "fail to getting usb-phy %d\n", ret);
524 goto err_unregister_usb_phy;
525 }
526
527 platform_set_drvdata(pdev, glue);
528 pm_runtime_enable(dev);
529 pm_runtime_get_sync(dev);
530
531 ret = mtk_musb_clks_enable(glue);
532 if (ret)
533 goto err_enable_clk;
534
535 pinfo = mtk_dev_info;
536 pinfo.parent = dev;
537 pinfo.res = pdev->resource;
538 pinfo.num_res = pdev->num_resources;
539 pinfo.data = pdata;
540 pinfo.size_data = sizeof(*pdata);
541
542 glue->musb_pdev = platform_device_register_full(&pinfo);
543 if (IS_ERR(glue->musb_pdev)) {
544 ret = PTR_ERR(glue->musb_pdev);
545 dev_err(dev, "failed to register musb device: %d\n", ret);
546 goto err_device_register;
547 }
548
549 return 0;
550
551 err_device_register:
552 mtk_musb_clks_disable(glue);
553 err_enable_clk:
554 pm_runtime_put_sync(dev);
555 pm_runtime_disable(dev);
556 err_unregister_usb_phy:
557 usb_phy_generic_unregister(glue->usb_phy);
558 return ret;
559 }
560
mtk_musb_remove(struct platform_device * pdev)561 static int mtk_musb_remove(struct platform_device *pdev)
562 {
563 struct mtk_glue *glue = platform_get_drvdata(pdev);
564 struct platform_device *usb_phy = glue->usb_phy;
565
566 platform_device_unregister(glue->musb_pdev);
567 usb_phy_generic_unregister(usb_phy);
568
569 return 0;
570 }
571
572 #ifdef CONFIG_OF
573 static const struct of_device_id mtk_musb_match[] = {
574 {.compatible = "mediatek,mtk-musb",},
575 {},
576 };
577 MODULE_DEVICE_TABLE(of, mtk_musb_match);
578 #endif
579
580 static struct platform_driver mtk_musb_driver = {
581 .probe = mtk_musb_probe,
582 .remove = mtk_musb_remove,
583 .driver = {
584 .name = "musb-mtk",
585 .of_match_table = of_match_ptr(mtk_musb_match),
586 },
587 };
588
589 module_platform_driver(mtk_musb_driver);
590
591 MODULE_DESCRIPTION("MediaTek MUSB Glue Layer");
592 MODULE_AUTHOR("Min Guo <min.guo@mediatek.com>");
593 MODULE_LICENSE("GPL v2");
594